call_address_operand, const_8bit_operand.
* config/mn10300/mn10300.c (call_address_operand,
const_8bit_operand, const_1f_operand): Move to predicates.md.
* config/mn10300/mn10300.h (PREDICATE_CODES): Remove.
* config/mn10300/mn10300.md: Include predicates.md.
* config/mn10300/predicates.md: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@96712
138bc75d-0d04-0410-961f-
82ee72b054a4
+2005-03-18 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/mn10300/mn10300-protos.h: Remove the prototypes for
+ call_address_operand, const_8bit_operand.
+ * config/mn10300/mn10300.c (call_address_operand,
+ const_8bit_operand, const_1f_operand): Move to predicates.md.
+ * config/mn10300/mn10300.h (PREDICATE_CODES): Remove.
+ * config/mn10300/mn10300.md: Include predicates.md.
+ * config/mn10300/predicates.md: New.
+
2005-03-18 Joseph S. Myers <joseph@codesourcery.com>
* c-common.c, c-decl.c, c-format.c, c-typeck.c: Use %D for
extern const char *output_tst (rtx, rtx);
extern int store_multiple_operation (rtx, enum machine_mode);
extern int symbolic_operand (rtx, enum machine_mode);
-extern int call_address_operand (rtx, enum machine_mode);
extern int impossible_plus_operand (rtx, enum machine_mode);
-extern int const_8bit_operand (rtx, enum machine_mode);
extern bool mn10300_wide_const_load_uses_clr (rtx operands[2]);
#endif /* RTX_CODE */
return mask;
}
-/* Return true if OP is a valid call operand. */
-
-int
-call_address_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- if (flag_pic)
- return (EXTRA_CONSTRAINT (op, 'S') || GET_CODE (op) == REG);
-
- return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
-}
-
/* What (if any) secondary registers are needed to move IN with mode
MODE into a register in register class CLASS.
return 0;
}
-/* Return 1 if X is a CONST_INT that is only 8 bits wide. This is used
- for the btst insn which may examine memory or a register (the memory
- variant only allows an unsigned 8 bit integer). */
-int
-const_8bit_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return (GET_CODE (op) == CONST_INT
- && INTVAL (op) >= 0
- && INTVAL (op) < 256);
-}
-
-/* Return true if the operand is the 1.0f constant. */
-int
-const_1f_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return (op == CONST1_RTX (SFmode));
-}
-
/* Similarly, but when using a zero_extract pattern for a btst where
the source operand might end up in memory. */
int
#define FILE_ASM_OP "\t.file\n"
-#define PREDICATE_CODES \
- {"const_1f_operand", {CONST_INT, CONST_DOUBLE}}, \
- {"const_8bit_operand", {CONST_INT}}, \
- {"call_address_operand", {SYMBOL_REF, REG, UNSPEC}},
-
typedef struct mn10300_cc_status_mdep
{
int fpCC;
;; GCC machine description for Matsushita MN10300
-;; Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
+;; Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
;; Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
(UNSPEC_GOTOFF 3)
(UNSPEC_PLT 4)
])
+
+(include "predicates.md")
\f
;; ----------------------------------------------------------------------
;; MOVE INSTRUCTIONS
--- /dev/null
+;; Predicate definitions for Matsushita MN10300.
+;; Copyright (C) 2005 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to
+;; the Free Software Foundation, 59 Temple Place - Suite 330,
+;; Boston, MA 02111-1307, USA.
+
+;; Return true if the operand is the 1.0f constant.
+
+(define_predicate "const_1f_operand"
+ (match_code "const_int,const_double")
+{
+ return (op == CONST1_RTX (SFmode));
+})
+
+;; Return 1 if X is a CONST_INT that is only 8 bits wide. This is
+;; used for the btst insn which may examine memory or a register (the
+;; memory variant only allows an unsigned 8 bit integer).
+
+(define_predicate "const_8bit_operand"
+ (match_code "const_int")
+{
+ return (GET_CODE (op) == CONST_INT
+ && INTVAL (op) >= 0
+ && INTVAL (op) < 256);
+})
+
+;; Return true if OP is a valid call operand.
+
+(define_predicate "call_address_operand"
+ (match_code "symbol_ref,reg,unspec")
+{
+ if (flag_pic)
+ return (EXTRA_CONSTRAINT (op, 'S') || GET_CODE (op) == REG);
+
+ return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
+})