Support for AVX512

diff --git a/timidity/optcode.c b/timidity/optcode.c
index bc5ae2a..23550af 100644 (file)
--- a/timidity/optcode.c
+++ b/timidity/optcode.c
@@ -33,7 +33,9 @@
 
 const char *arch_string =
 #ifdef IX64CPU
-       #if USE_X64_EXT_INTRIN == 9
+       #if USE_X64_EXT_INTRIN == 10
+               "[x64 AVX512(F, CD, VL, DQ, BW)]"
+       #elif USE_X64_EXT_INTRIN == 9
                "[x64 AVX2]"
        #elif USE_X64_EXT_INTRIN == 8
                "[x64 AVX]"
@@ -55,7 +57,9 @@ const char *arch_string =
                "[x64]"
        #endif
 #elif defined(IX86CPU)
-       #if USE_X86_EXT_INTRIN == 9
+       #if USE_X86_EXT_INTRIN == 10
+               "[x86 AVX512(F, CD, VL, DQ, BW)]"
+       #elif USE_X86_EXT_INTRIN == 9
                "[x86 AVX2]"
        #elif USE_X86_EXT_INTRIN == 8
                "[x86 AVX]"

diff --git a/timidity/optcode.h b/timidity/optcode.h
index ab812fb..866707a 100644 (file)
--- a/timidity/optcode.h
+++ b/timidity/optcode.h
@@ -130,6 +130,7 @@ AVX2
 //#define USE_SSE42 // \83e\83X\83g\97p
 //#define USE_AVX // \83e\83X\83g\97p
 //#define USE_AVX2 // \83e\83X\83g\97p
+//#define USE_AVX512 // \83e\83X\83g\97p
 
 /* x86 extension define */
 /* 
@@ -145,6 +146,7 @@ AVX2
   USE_SSE4 (SSE4.1 +SSE4.2
   USE_AVX  // include PCLMULQDQ
   USE_AVX2 // include FMA BMI1 BMI2 F16C RDRAND
+  USE_AVX512 // F, CD, VL, DQ, BW
 */
 /* x86 AMD extension define */
 /*     
@@ -169,6 +171,7 @@ enum{
        X86_SSE42,
        X86_AVX,
        X86_AVX2,
+       X86_AVX512,
 };
 //x86 AMD extension number
 enum{
@@ -213,9 +216,14 @@ enum{
 #ifndef __AVX2__
 #undef  USE_AVX2
 #endif
+#if !defined(__AVX512F__) || !defined(__AVX512CD__) || !defined(__AVX512VL__) || !defined(__AVX512DQ__) || !defined(__AVX512BW__)
+#undef  USE_AVX512
+#endif
 #endif /* __GNUC__ */
 
-#if defined(USE_AVX2) // _MSC_VER >= 1700 VC2013?
+#if defined(USE_AVX512) // _MSC_VER >= 1910 VC2017?
+#define USE_X86_EXT_INTRIN  10  // F, CD, VL, DQ, BW
+#elif defined(USE_AVX2) // _MSC_VER >= 1700 VC2013?
 #define USE_X86_EXT_INTRIN  9
 #elif defined(USE_AVX) // _MSC_VER >= 1600 VC2010?
 #define USE_X86_EXT_INTRIN  8
@@ -241,7 +249,9 @@ enum{
 #undef USE_PENTIUM_4
 #endif
 
-#if defined(USE_AVX2) // _MSC_VER >= 1700 VC2013?
+#if defined(USE_AVX512) // _MSC_VER >= 1910 VC2017?
+#define USE_X64_EXT_INTRIN  10  // F, CD, VL, DQ, BW
+#elif defined(USE_AVX2) // _MSC_VER >= 1700 VC2013?
 #define USE_X64_EXT_INTRIN  9
 #elif defined(USE_AVX) // _MSC_VER >= 1600 VC2010?
 #define USE_X64_EXT_INTRIN  8
@@ -279,7 +289,9 @@ enum{
 #define USE_X86_AMD_EXT_INTRIN  0
 #endif
 
-#if defined(USE_AVX2)
+#if defined(USE_AVX512)
+#define USE_X86_EXT_ASM     10  // F, CD, VL, DQ, BW
+#elif defined(USE_AVX2)
 #define USE_X86_EXT_ASM     9
 #elif defined(USE_AVX)
 #define USE_X86_EXT_ASM     8
@@ -301,7 +313,9 @@ enum{
 #define USE_X86_EXT_ASM     0
 #endif
 
-#if defined(USE_AVX2)
+#if defined(USE_AVX512)
+#define USE_X64_EXT_ASM     10  // F, CD, VL, DQ, BW
+#elif defined(USE_AVX2)
 #define USE_X64_EXT_ASM     9
 #elif defined(USE_AVX)
 #define USE_X64_EXT_ASM     8