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* config/rs6000/rs6000.md (ctrdi): Allocate pseudo for FPR
authordje <dje@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 30 Jun 2002 01:44:43 +0000 (01:44 +0000)
committerdje <dje@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 30 Jun 2002 01:44:43 +0000 (01:44 +0000)
        constraint in define_expand, not splitter.
        Formatting.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55110 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/rs6000/rs6000.md

index a1ec75b..60cd8b8 100644 (file)
@@ -1,3 +1,9 @@
+2002-06-29  David Edelsohn  <edelsohn@gnu.org>
+
+       * config/rs6000/rs6000.md (ctrdi): Allocate pseudo for FPR
+       constraint in define_expand, not splitter.
+       Formatting.
+
 2002-06-29  Aldy Hernandez  <aldyh@redhat.com>
 
         * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
index 9b7ba97..4520f58 100644 (file)
                   (plus:DI (match_dup 0)
                            (const_int -1)))
              (clobber (match_scratch:CC 2 ""))
-             (clobber (match_scratch:DI 3 ""))])]
+             (clobber (match_scratch:DI 3 ""))
+             (clobber (match_dup 4))])]
   "TARGET_POWERPC64"
-  "")
+  "
+{ operands[4] = gen_reg_rtx (DImode); }")
 
 ;; We need to be able to do this for any operand, including MEM, or we
 ;; will cause reload to blow up since we don't allow output reloads on
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64"
   "*
 {
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64"
   "*
 {
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
   "*
 {
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
   "*
 {
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64"
   "*
 {
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
-   (clobber (match_scratch:DI 4 "=X,X,r,r"))]
+   (clobber (match_scratch:DI 4 "=X,X,r,r"))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" "=X,X,X,o"))]
   "TARGET_POWERPC64"
   "*
 {
        (if_then_else (match_operator 2 "comparison_operator"
                                      [(match_operand:DI 1 "gpc_reg_operand" "")
                                       (const_int 1)])
-                     (match_operand 5 "" "")
-                     (match_operand 6 "" "")))
+                     (match_operand 6 "" "")
+                     (match_operand 7 "" "")))
    (set (match_operand:DI 0 "gpc_reg_operand" "")
        (plus:DI (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 ""))
-   (clobber (match_scratch:DI 4 ""))]
+   (clobber (match_scratch:DI 4 ""))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
   "TARGET_POWERPC64 && reload_completed && INT_REGNO_P (REGNO (operands[0]))"
   [(parallel [(set (match_dup 3)
                   (compare:CC (plus:DI (match_dup 1)
              (set (match_dup 0)
                   (plus:DI (match_dup 1)
                            (const_int -1)))])
-   (set (pc) (if_then_else (match_dup 7)
-                          (match_dup 5)
-                          (match_dup 6)))]
+   (set (pc) (if_then_else (match_dup 8)
+                          (match_dup 6)
+                          (match_dup 7)))]
   "
-{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
+{ operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
                         const0_rtx); }")
 
 (define_split
        (if_then_else (match_operator 2 "comparison_operator"
                                      [(match_operand:DI 1 "gpc_reg_operand" "")
                                       (const_int 1)])
-                     (match_operand 5 "" "")
-                     (match_operand 6 "" "")))
+                     (match_operand 6 "" "")
+                     (match_operand 7 "" "")))
    (set (match_operand:DI 0 "nonimmediate_operand" "")
        (plus:DI (match_dup 1) (const_int -1)))
    (clobber (match_scratch:CC 3 ""))
-   (clobber (match_scratch:DI 4 ""))]
+   (clobber (match_scratch:DI 4 ""))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
   "TARGET_POWERPC64 && reload_completed
    && ! gpc_reg_operand (operands[0], DImode)"
   [(parallel [(set (match_dup 3)
                            (const_int -1)))])
    (set (match_dup 0)
        (match_dup 4))
-   (set (pc) (if_then_else (match_dup 7)
-                          (match_dup 5)
-                          (match_dup 6)))]
+   (set (pc) (if_then_else (match_dup 8)
+                          (match_dup 6)
+                          (match_dup 7)))]
   "
-{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
+{ operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
                         const0_rtx); }")
 
 (define_split
        (if_then_else (match_operator 2 "comparison_operator"
                                     [(match_operand:DI 1 "gpc_reg_operand" "")
                                      (const_int 1)])
-                    (match_operand 5 "" "")
-                    (match_operand 6 "" "")))
+                    (match_operand 6 "" "")
+                    (match_operand 7 "" "")))
    (set (match_operand:DI 0 "gpc_reg_operand" "")
        (plus:DI (match_dup 1)
                (const_int -1)))
    (clobber (match_scratch:CC 3 ""))
-   (clobber (match_scratch:DI 4 ""))]
+   (clobber (match_scratch:DI 4 ""))
+   (clobber (match_operand:DI 5 "nonimmediate_operand" ""))]
   "TARGET_POWERPC64 && reload_completed && FP_REGNO_P (REGNO (operands[0]))"
-  [(set (match_dup 8)
+  [(set (match_dup 5)
        (match_dup 1))
    (set (match_dup 4)
-       (match_dup 8))
+       (match_dup 5))
    (parallel [(set (match_dup 3)
                   (compare:CC (plus:DI (match_dup 4)
                                        (const_int -1))
              (set (match_dup 4)
                   (plus:DI (match_dup 4)
                            (const_int -1)))])
-   (set (match_dup 8)
+   (set (match_dup 5)
        (match_dup 4))
    (set (match_dup 0)
-       (match_dup 8))
-   (set (pc) (if_then_else (match_dup 7)
-                          (match_dup 5)
-                          (match_dup 6)))]
+       (match_dup 5))
+   (set (pc) (if_then_else (match_dup 8)
+                          (match_dup 6)
+                          (match_dup 7)))]
   "
 {
-  operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
+  operands[8] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
                         const0_rtx);
-  operands[8] = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
 }")
 
 \f
 ; faster; for instance, on the 601 and 750.
 
 (define_expand "movsi_to_cr_one"
- [(set (match_operand:CC 0 "cc_reg_operand" "=y")
-       (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
-                  (match_dup 2)] 20))]
- ""
- "operands[2] = GEN_INT (1 << (75 - REGNO (operands[0])));")
 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+        (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+                   (match_dup 2)] 20))]
 ""
 "operands[2] = GEN_INT (1 << (75 - REGNO (operands[0])));")
 
 (define_insn "*movsi_to_cr"
- [(match_parallel 0 "mtcrf_operation"
-                  [(set (match_operand:CC 1 "cc_reg_operand" "=y")
-                               (unspec:CC [(match_operand:SI 2 "gpc_reg_operand" "r")
-                                   (match_operand 3 "immediate_operand" "n")]
 [(match_parallel 0 "mtcrf_operation"
+                  [(set (match_operand:CC 1 "cc_reg_operand" "=y")
+                        (unspec:CC [(match_operand:SI 2 "gpc_reg_operand" "r")
+                                    (match_operand 3 "immediate_operand" "n")]
                         20))])]
  ""
  "*
 ; code that actually corresponds to the powerpc load-string.
 
 (define_insn "*lmw"
- [(match_parallel 0 "lmw_operation"
-                 [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
-                               (match_operand:SI 2 "memory_operand" "m"))])]
- "TARGET_MULTIPLE"
- "{lm|lmw} %1,%2")
 [(match_parallel 0 "lmw_operation"
+                  [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                                (match_operand:SI 2 "memory_operand" "m"))])]
 "TARGET_MULTIPLE"
 "{lm|lmw} %1,%2")
  
 (define_insn "*return_internal_si"
   [(return)