2014-01-25 Walter Lee <walt@tilera.com>

            Backport from mainline
            2014-01-25  Walter Lee  <walt@tilera.com>

            * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier
            insns before bundling.
            * config/tilegx/tilegx.md (tile_network_barrier): Update
            comment.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@207102 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 651068f..81ce918 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,6 +3,16 @@
        Backport from mainline
        2014-01-25  Walter Lee  <walt@tilera.com>
 
+       * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier
+       insns before bundling.
+       * config/tilegx/tilegx.md (tile_network_barrier): Update
+       comment.
+
+2014-01-25  Walter Lee  <walt@tilera.com>
+
+       Backport from mainline
+       2014-01-25  Walter Lee  <walt@tilera.com>
+
        * config/tilegx/tilegx.c (tilegx_expand_builtin): Set
        PREFETCH_SCHEDULE_BARRIER_P to true for prefetches.
        * config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto.

diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index e7ab948..be0027d 100644 (file)
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -4333,10 +4333,12 @@ tilegx_gen_bundles (void)
   basic_block bb;
   FOR_EACH_BB (bb)
     {
-      rtx insn, next;
+      rtx insn, next, prev;
       rtx end = NEXT_INSN (BB_END (bb));
 
-      for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next)
+      prev = NULL_RTX;
+      for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn;
+          prev = insn, insn = next)
        {
          next = next_insn_to_bundle (NEXT_INSN (insn), end);
 
@@ -4361,6 +4363,18 @@ tilegx_gen_bundles (void)
                  PUT_MODE (insn, SImode);
                }
            }
+
+         /* Delete barrier insns, because they can mess up the
+            emitting of bundle braces.  If it is end-of-bundle, then
+            the previous insn must be marked end-of-bundle.  */
+         if (get_attr_type (insn) == TYPE_NOTHING) {
+           if (GET_MODE (insn) == QImode && prev != NULL
+               && GET_MODE (prev) == SImode)
+             {
+               PUT_MODE (prev, QImode);
+             }
+           delete_insn (insn);
+         }
        }
     }
 }

diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md
index 5a16fec..dd45811 100644 (file)
--- a/gcc/config/tilegx/tilegx.md
+++ b/gcc/config/tilegx/tilegx.md
@@ -4924,10 +4924,8 @@
 \f
 ;; Network intrinsics
 
-;; Note the "pseudo" text is handled specially by the
-;; asm_output_opcode routine.  If the output is an empty string, the
-;; instruction would bypass the asm_output_opcode routine, bypassing
-;; the bundle handling code.
+;; Note the this barrier is of type "nothing," which is deleted after
+;; the final scheduling pass so that nothing is emitted for it.
 (define_insn "tilegx_network_barrier"
   [(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)]
   ""