* config/mips/mips.md (*clear_upper32_dext): New pattern.

testsuite/
	* gcc.target/mips/ext-4.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@150316 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9357738..17a3e96 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2009-07-31  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * config/mips/mips.md (*clear_upper32_dext): New pattern.
+
 2009-07-31  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/bsd.h (ASM_BYTE): New define.

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index af429ca..02e9937 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2785,7 +2785,7 @@
   [(set (match_operand:DI 0 "register_operand" "=d,d")
         (and:DI (match_operand:DI 1 "nonimmediate_operand" "d,W")
                (const_int 4294967295)))]
-  "TARGET_64BIT"
+  "TARGET_64BIT && !ISA_HAS_EXT_INS"
 {
   if (which_alternative == 0)
     return "#";
@@ -2802,6 +2802,21 @@
   [(set_attr "move_type" "shift_shift,load")
    (set_attr "mode" "DI")])
 
+(define_insn "*clear_upper32_dext"
+  [(set (match_operand:DI 0 "register_operand" "=d,d")
+        (and:DI (match_operand:DI 1 "nonimmediate_operand" "d,W")
+               (const_int 4294967295)))]
+  "TARGET_64BIT && ISA_HAS_EXT_INS"
+{
+  if (which_alternative == 0)
+    return "dext\t%0,%1,0,32";
+
+  operands[1] = gen_lowpart (SImode, operands[1]);
+  return "lwu\t%0,%1";
+}
+  [(set_attr "move_type" "arith,load")
+   (set_attr "mode" "DI")])
+
 (define_expand "zero_extend<SHORT:mode><GPR:mode>2"
   [(set (match_operand:GPR 0 "register_operand")
         (zero_extend:GPR (match_operand:SHORT 1 "nonimmediate_operand")))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c38a075..2cfe47b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2009-07-31  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * gcc.target/mips/ext-4.c: New test.
+
 2009-07-30  Sebastian Pop  <sebastian.pop@amd.com>
 
        * g++.dg/tree-ssa/pr33615.C: Fix pattern for lim.

diff --git a/gcc/testsuite/gcc.target/mips/ext-4.c b/gcc/testsuite/gcc.target/mips/ext-4.c
new file mode 100644 (file)
index 0000000..15e2029
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/ext-4.c
@@ -0,0 +1,11 @@
+/* For MIPS64r2 use DEXT rather than DSLL/DSRL for clear_upper32.  */
+/* { dg-do compile } */
+/* { dg-options "-O isa_rev>=2 -mgp64" } */
+/* { dg-final { scan-assembler "\tdext\t" } } */
+/* { dg-final { scan-assembler-not "sll" } } */
+
+unsigned long long
+f (unsigned long long i)
+{
+  return i & 0xffffffffull;
+}