if (intval == 0xff
&& (!TARGET_PENTIUM || optimize_size
|| (GET_CODE (operands[0]) == MEM
- && memory_address_length (XEXP (operands[0], 0)) != 0)))
+ && memory_address_info (XEXP (operands[0], 0), 1))))
return AS1 (not%B0,%b0);
if (intval != INTVAL (operands[2]))
if (intval == 0xff
&& (!TARGET_PENTIUM || optimize_size
|| (GET_CODE (operands[0]) == MEM
- && memory_address_length (XEXP (operands[0], 0)) != 0)))
+ && memory_address_info (XEXP (operands[0], 0), 1))))
return AS1 (not%B0,%h0);
operands[2] = GEN_INT (intval);
if (INTVAL (operands[2]) == 0xff
&& (!TARGET_PENTIUM || optimize_size
|| (GET_CODE (operands[0]) == MEM
- && memory_address_length (XEXP (operands[0], 0)) != 0)))
+ && memory_address_info (XEXP (operands[0], 0), 1))))
return AS1 (not%B0,%b0);
return AS2 (xor%B0,%2,%b0);
if (INTVAL (operands[2]) == 0xff
&& (!TARGET_PENTIUM || optimize_size
|| (GET_CODE (operands[0]) == MEM
- && memory_address_length (XEXP (operands[0], 0)) != 0)))
+ && memory_address_info (XEXP (operands[0], 0), 1))))
return AS1 (not%B0,%h0);
return AS2 (xor%B0,%2,%h0);
(not:SI (match_operand:SI 1 "nonimmediate_operand" "0")))]
""
"*
-/* A Pentium NOT is not pariable. Output it only in case of complex
- memory address, because XOR will be inpariable anyway because
- of immediate/displacement rule. */
+{
+ /* A Pentium NOT is not pariable. Output it only in case of complex
+ memory address, because XOR will be inpariable anyway because
+ of immediate/displacement rule. */
-if (TARGET_PENTIUM && !optimize_size
- && (GET_CODE (operands[0]) != MEM
- || memory_address_length (XEXP (operands[0], 0)) == 0))
- {
- rtx xops[2];
- xops[0] = operands[0];
- xops[1] = GEN_INT (0xffffffff);
- output_asm_insn (AS2 (xor%L0,%1,%0), xops);
- RET;
- }
-else
- return AS1 (not%L0,%0);")
+ if (TARGET_PENTIUM && !optimize_size
+ && (GET_CODE (operands[0]) != MEM
+ || memory_address_info (XEXP (operands[0], 0), 1) == 0))
+ {
+ rtx xops[2];
+ xops[0] = operands[0];
+ xops[1] = GEN_INT (0xffffffff);
+ output_asm_insn (AS2 (xor%L0,%1,%0), xops);
+ RET;
+ }
+ else
+ return AS1 (not%L0,%0);
+}")
(define_insn "one_cmplhi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(not:HI (match_operand:HI 1 "nonimmediate_operand" "0")))]
""
"*
-/* A Pentium NOT is not pariable. Output it only in case of complex
- memory address, because XOR will be inpariable anyway because
- of immediate/displacement rule. */
+{
+ /* A Pentium NOT is not pariable. Output it only in case of complex
+ memory address, because XOR will be inpariable anyway because
+ of immediate/displacement rule. */
-if (TARGET_PENTIUM && !optimize_size
- && (GET_CODE (operands[0]) != MEM
- || memory_address_length (XEXP (operands[0], 0)) == 0))
- {
- rtx xops[2];
- xops[0] = operands[0];
- xops[1] = GEN_INT (0xffff);
- if (REG_P (operands[0])
- && i386_cc_probably_useless_p (insn))
- {
- CC_STATUS_INIT;
- output_asm_insn (AS2 (xor%L0,%1,%k0), xops);
- }
- else
- output_asm_insn (AS2 (xor%W0,%1,%0), xops);
- RET;
- }
-else
- {
- if (REG_P (operands[0])
- && i386_cc_probably_useless_p (insn))
- {
- CC_STATUS_INIT;
- return AS1 (not%L0,%k0);
- }
- return AS1 (not%W0,%0);
- }")
+ if (TARGET_PENTIUM && !optimize_size
+ && (GET_CODE (operands[0]) != MEM
+ || memory_address_info (XEXP (operands[0], 0), 1) == 0))
+ {
+ rtx xops[2];
+ xops[0] = operands[0];
+ xops[1] = GEN_INT (0xffff);
+ if (REG_P (operands[0])
+ && i386_cc_probably_useless_p (insn))
+ {
+ CC_STATUS_INIT;
+ output_asm_insn (AS2 (xor%L0,%1,%k0), xops);
+ }
+ else
+ output_asm_insn (AS2 (xor%W0,%1,%0), xops);
+ RET;
+ }
+ else
+ {
+ if (REG_P (operands[0])
+ && i386_cc_probably_useless_p (insn))
+ {
+ CC_STATUS_INIT;
+ return AS1 (not%L0,%k0);
+ }
+ return AS1 (not%W0,%0);
+ }
+}")
(define_insn "one_cmplqi2"
[(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(not:QI (match_operand:QI 1 "nonimmediate_operand" "0")))]
""
"*
-/* A Pentium NOT is not pariable. Output it only in case of complex
- memory address, because XOR will be inpariable anyway because
- of immediate/displacement rule. */
+{
+ /* A Pentium NOT is not pariable. Output it only in case of complex
+ memory address, because XOR will be inpariable anyway because
+ of immediate/displacement rule. */
-if (TARGET_PENTIUM && !optimize_size
- && (GET_CODE (operands[0]) != MEM
- || memory_address_length (XEXP (operands[0], 0)) == 0))
- {
- rtx xops[2];
- xops[0] = operands[0];
- xops[1] = GEN_INT (0xff);
- output_asm_insn (AS2 (xor%B0,%1,%0), xops);
- RET;
- }
-else
- return AS1 (not%B0,%0);")
+ if (TARGET_PENTIUM && !optimize_size
+ && (GET_CODE (operands[0]) != MEM
+ || memory_address_info (XEXP (operands[0], 0), 1) == 0))
+ {
+ rtx xops[2];
+ xops[0] = operands[0];
+ xops[1] = GEN_INT (0xff);
+ output_asm_insn (AS2 (xor%B0,%1,%0), xops);
+ RET;
+ }
+ else
+ return AS1 (not%B0,%0);
+}")
\f
;;- arithmetic shift instructions
mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]);
operands[1] = GEN_INT (mask);
- if (! REG_P (operands[0]) || QI_REG_P (operands[0])
+ if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
/* A Pentium test is pairable only with eax. Not with ah or al. */
&& (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM
|| optimize_size))