* combine.c (simplify_shift_const_1) <case SUBREG>: Only use
SUBREG_REG if both modes are of MODE_INT class.
* g++.dg/other/i386-8.C: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163551
138bc75d-0d04-0410-961f-
82ee72b054a4
+2010-08-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/45400
+ * combine.c (simplify_shift_const_1) <case SUBREG>: Only use
+ SUBREG_REG if both modes are of MODE_INT class.
+
2010-08-25 Julian Brown <julian@codesourcery.com>
* config/arm/arm.c (arm_issue_rate): Return 2 for Cortex-A5.
> GET_MODE_SIZE (GET_MODE (varop)))
&& (unsigned int) ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
- == mode_words)
+ == mode_words
+ && GET_MODE_CLASS (GET_MODE (varop)) == MODE_INT
+ && GET_MODE_CLASS (GET_MODE (SUBREG_REG (varop))) == MODE_INT)
{
varop = SUBREG_REG (varop);
if (GET_MODE_SIZE (GET_MODE (varop)) > GET_MODE_SIZE (mode))
+2010-08-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/45400
+ * g++.dg/other/i386-8.C: New test.
+
2010-08-25 Richard Guenther <rguenther@suse.de>
* gcc.dg/alias-8.c: Adjust.
--- /dev/null
+// PR rtl-optimization/45400
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-options "-O2 -msse2" }
+// { dg-options "-O2 -msse2 -fpic" { target fpic } }
+// { dg-require-effective-target sse2 }
+
+#include <xmmintrin.h>
+
+static inline unsigned short
+bar (unsigned short x)
+{
+ return ((x << 8) | (x >> 8));
+}
+
+unsigned int
+foo (float *x, short *y)
+{
+ __m128 a = _mm_set_ps1 (32767.5f);
+ __m128 b = _mm_mul_ps (_mm_load_ps (x), a);
+ __m64 c = _mm_cvtps_pi16 (b);
+ __builtin_memcpy (y, &c, sizeof (short) * 4);
+ y[0] = bar (y[0]);
+}