}
\f
-/* Return appropriate code to load up an 8 byte integer or
- floating point value */
-
-const char *
-output_move_double (rtx * operands)
-{
- enum machine_mode mode = GET_MODE (operands[0]);
- rtx dst = operands[0];
- rtx src = operands[1];
-
- if (register_operand (dst, mode)
- && register_operand (src, mode))
- {
- if (REGNO (src) + 1 == REGNO (dst))
- return "mov %R1,%R0\n\tmov %1,%0";
- else
- return "mov %1,%0\n\tmov %R1,%R0";
- }
-
- /* Storing 0 */
- if (GET_CODE (dst) == MEM
- && ((GET_CODE (src) == CONST_INT && INTVAL (src) == 0)
- || (GET_CODE (src) == CONST_DOUBLE && CONST_DOUBLE_OK_FOR_G (src))))
- return "st.w %.,%0\n\tst.w %.,%R0";
-
- if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
- {
- HOST_WIDE_INT high_low[2];
- int i;
- rtx xop[10];
-
- if (GET_CODE (src) == CONST_DOUBLE)
- const_double_split (src, &high_low[1], &high_low[0]);
- else
- {
- high_low[0] = INTVAL (src);
- high_low[1] = (INTVAL (src) >= 0) ? 0 : -1;
- }
-
- for (i = 0; i < 2; i++)
- {
- xop[0] = gen_rtx_REG (SImode, REGNO (dst)+i);
- xop[1] = GEN_INT (high_low[i]);
- output_asm_insn (output_move_single (xop), xop);
- }
-
- return "";
- }
-
- if (GET_CODE (src) == MEM)
- {
- int ptrreg = -1;
- int dreg = REGNO (dst);
- rtx inside = XEXP (src, 0);
-
- if (GET_CODE (inside) == REG)
- ptrreg = REGNO (inside);
- else if (GET_CODE (inside) == SUBREG)
- ptrreg = subreg_regno (inside);
- else if (GET_CODE (inside) == PLUS)
- ptrreg = REGNO (XEXP (inside, 0));
- else if (GET_CODE (inside) == LO_SUM)
- ptrreg = REGNO (XEXP (inside, 0));
-
- if (dreg == ptrreg)
- return "ld.w %R1,%R0\n\tld.w %1,%0";
- }
-
- if (GET_CODE (src) == MEM)
- return "ld.w %1,%0\n\tld.w %R1,%R0";
-
- if (GET_CODE (dst) == MEM)
- return "st.w %1,%0\n\tst.w %R1,%R0";
-
- return "mov %1,%0\n\tmov %R1,%R0";
-}
-
-\f
/* Return maximum offset supported for a short EP memory reference of mode
MODE and signedness UNSIGNEDP. */
if (init_stack_alloc)
emit_insn (gen_addsi3 (stack_pointer_rtx,
stack_pointer_rtx,
- GEN_INT (-init_stack_alloc)));
+ GEN_INT (- (signed) init_stack_alloc)));
/* Save the return pointer first. */
if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM)
int offset;
unsigned int size = get_frame_size ();
long reg_saved = 0;
- unsigned int actual_fsize = compute_frame_size (size, ®_saved);
+ int actual_fsize = compute_frame_size (size, ®_saved);
unsigned int init_stack_free = 0;
rtx restore_regs[32];
rtx restore_all;
if (TARGET_PROLOG_FUNCTION
&& num_restore > 0
- && actual_fsize >= default_stack
+ && actual_fsize >= (signed) default_stack
&& !interrupt_handler)
{
int alloc_stack = (4 * num_restore) + default_stack;
if (actual_fsize && !CONST_OK_FOR_K (-actual_fsize))
init_stack_free = 4 * num_restore;
else
- init_stack_free = actual_fsize;
+ init_stack_free = (signed) actual_fsize;
/* Deallocate the rest of the stack if it is > 32K. */
if (actual_fsize > init_stack_free)
;; GCC machine description for NEC V850
-;; Copyright (C) 1996, 1997, 1998, 1999, 2002, 2004, 2005
+;; Copyright (C) 1996, 1997, 1998, 1999, 2002, 2004, 2005, 2007
;; Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
(set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
(set_attr "type" "other,other,other,load,other,load,other,other,other")])
-
-
-(define_expand "movdi"
- [(set (match_operand:DI 0 "general_operand" "")
- (match_operand:DI 1 "general_operand" ""))]
- ""
- "
-{
- /* One of the ops has to be in a register or 0 */
- if (!register_operand (operand0, DImode)
- && !reg_or_0_operand (operand1, DImode))
- operands[1] = copy_to_mode_reg (DImode, operand1);
-}")
-
-(define_insn "*movdi_internal"
- [(set (match_operand:DI 0 "general_operand" "=r,r,r,r,r,m,m,r")
- (match_operand:DI 1 "general_operand" "Jr,K,L,i,m,r,IG,iF"))]
- "register_operand (operands[0], DImode)
- || reg_or_0_operand (operands[1], DImode)"
- "* return output_move_double (operands);"
- [(set_attr "length" "4,8,8,16,8,8,8,16")
- (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
- (set_attr "type" "other,other,other,other,load,other,other,other")])
-
-(define_expand "movsf"
- [(set (match_operand:SF 0 "general_operand" "")
- (match_operand:SF 1 "general_operand" ""))]
- ""
- "
-{
- /* One of the ops has to be in a register or 0 */
- if (!register_operand (operand0, SFmode)
- && !reg_or_0_operand (operand1, SFmode))
- operands[1] = copy_to_mode_reg (SFmode, operand1);
-}")
-
(define_insn "*movsf_internal"
[(set (match_operand:SF 0 "general_operand" "=r,r,r,r,r,Q,r,m,m,r")
(match_operand:SF 1 "general_operand" "Jr,K,L,n,Q,Ir,m,r,IG,iF"))]
(set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
(set_attr "type" "other,other,other,other,load,other,load,other,other,other")])
-(define_expand "movdf"
- [(set (match_operand:DF 0 "general_operand" "")
- (match_operand:DF 1 "general_operand" ""))]
- ""
- "
-{
- /* One of the ops has to be in a register or 0 */
- if (!register_operand (operand0, DFmode)
- && !reg_or_0_operand (operand1, DFmode))
- operands[1] = copy_to_mode_reg (DFmode, operand1);
-}")
-
-(define_insn "*movdf_internal"
- [(set (match_operand:DF 0 "general_operand" "=r,r,r,r,r,m,m,r")
- (match_operand:DF 1 "general_operand" "Jr,K,L,i,m,r,IG,iF"))]
- "register_operand (operands[0], DFmode)
- || reg_or_0_operand (operands[1], DFmode)"
- "* return output_move_double (operands);"
- [(set_attr "length" "4,8,8,16,8,8,8,16")
- (set_attr "cc" "none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")
- (set_attr "type" "other,other,other,other,load,other,other,other")])
-
\f
;; ----------------------------------------------------------------------
;; TEST INSTRUCTIONS