2001-10-31 Kazu Hirata <kazu@hxi.com>

	* builtins.def: Fix comment typos.
	* config/alpha.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/avr/avr.h: Likewise.
	* config/d30v/d30v.c: Likewise.
	* config/d30v/d30v.h: Likewise.
	* config/d30v/d30v.md: Likewise.
	* config/dsp16xx/dsp16xx.c: Likewise.
	* config/fr30/fr30.c: Likewise.
	* config/fr30/fr30.md: Likewise.
	* config/i386/i386.c: Likewise.
	* config/i860/i860.c: Likewise.
	* config/i960/i960.c: Likewise.
	* config/ia64/ia64.c: Likewise.
	* config/mips/mips.c: Likewise.
	* config/pa/pa.c: Likewise.
	* config/rs6000/rs6000.c: Likewise.
	* config/s390/s390.c: Likewise.
	* config/sparc/sparc.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@46676 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 886212a..ce28052 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,25 @@
+2001-10-31  Kazu Hirata  <kazu@hxi.com>
+
+       * builtins.def: Fix comment typos.
+       * config/alpha.c: Likewise.
+       * config/arm/arm.c: Likewise.
+       * config/avr/avr.h: Likewise.
+       * config/d30v/d30v.c: Likewise.
+       * config/d30v/d30v.h: Likewise.
+       * config/d30v/d30v.md: Likewise.
+       * config/dsp16xx/dsp16xx.c: Likewise.
+       * config/fr30/fr30.c: Likewise.
+       * config/fr30/fr30.md: Likewise.
+       * config/i386/i386.c: Likewise.
+       * config/i860/i860.c: Likewise.
+       * config/i960/i960.c: Likewise.
+       * config/ia64/ia64.c: Likewise.
+       * config/mips/mips.c: Likewise.
+       * config/pa/pa.c: Likewise.
+       * config/rs6000/rs6000.c: Likewise.
+       * config/s390/s390.c: Likewise.
+       * config/sparc/sparc.c: Likewise.
+
 2001-10-30  Kazu Hirata  <kazu@hxi.com>
 
        * config/mips/elf.h: Fix comment formatting.

diff --git a/gcc/builtins.def b/gcc/builtins.def
index c1426e7..204da8e 100644 (file)
--- a/gcc/builtins.def
+++ b/gcc/builtins.def
@@ -72,7 +72,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 
 /* A library builtin (like __builtin_strchr) is a builtin equivalent
    of an ANSI/ISO standard library function.  In addition to the
-   `__builtin' version, we will create a an ordinary version (e.g,
+   `__builtin' version, we will create an ordinary version (e.g,
    `strchr') as well.  If we cannot compute the answer using the
    builtin function, we will fall back to the standard library
    version. */

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 1aacc55..4affac3 100644 (file)
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1305,7 +1305,7 @@ reg_no_subreg_operand (op, mode)
   return register_operand (op, mode);
 }
 
-/* Recognize a addition operation that includes a constant.  Used to
+/* Recognize an addition operation that includes a constant.  Used to
    convince reload to canonize (plus (plus reg c1) c2) during register
    elimination.  */
 

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 30a7313..92baca1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -5219,7 +5219,7 @@ struct minipool_node
      pushing fixes for forward references, all entries are sorted in order
      of increasing max_address.  */
   HOST_WIDE_INT max_address;
-  /* Similarly for a entry inserted for a backwards ref.  */
+  /* Similarly for an entry inserted for a backwards ref.  */
   HOST_WIDE_INT min_address;
   /* The number of fixes referencing this entry.  This can become zero
      if we "unpush" an entry.  In this case we ignore the entry when we

diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 7a89ad5..15b2a29 100644 (file)
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -791,7 +791,7 @@ enum reg_class {
    class of registers.  In that case, secondary reload registers are
    not needed and would not be helpful.  Instead, a stack location
    must be used to perform the copy and the `movM' pattern should use
-   memory as a intermediate storage.  This case often occurs between
+   memory as an intermediate storage.  This case often occurs between
    floating-point and general registers.  */
 
 /* `SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)'

diff --git a/gcc/config/d30v/d30v.c b/gcc/config/d30v/d30v.c
index a5d8745..5d3d7cb 100644 (file)
--- a/gcc/config/d30v/d30v.c
+++ b/gcc/config/d30v/d30v.c
@@ -2461,7 +2461,7 @@ d30v_output_function_epilogue (stream, size)
 \f
 
 /* Called after register allocation to add any instructions needed for
-   the epilogue.  Using a epilogue insn is favored compared to putting
+   the epilogue.  Using an epilogue insn is favored compared to putting
    all of the instructions in output_function_prologue(), since it
    allows the scheduler to intermix instructions with the saves of the
    caller saved registers.  In some cases, it might be necessary to

diff --git a/gcc/config/d30v/d30v.h b/gcc/config/d30v/d30v.h
index 46e89cd..783455f 100644 (file)
--- a/gcc/config/d30v/d30v.h
+++ b/gcc/config/d30v/d30v.h
@@ -1649,7 +1649,7 @@ extern enum reg_class reg_class_from_letter[];
    registers can only be copied to memory and not to another class of
    registers.  In that case, secondary reload registers are not needed and
    would not be helpful.  Instead, a stack location must be used to perform the
-   copy and the `movM' pattern should use memory as a intermediate storage.
+   copy and the `movM' pattern should use memory as an intermediate storage.
    This case often occurs between floating-point and general registers.  */
 
 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)                         \
@@ -1962,7 +1962,7 @@ typedef struct d30v_stack {
    value of 4096 is suitable for most systems.  */
 /* #define STACK_CHECK_PROBE_INTERVAL */
 
-/* A integer which is nonzero if GNU CC should perform the stack probe as a
+/* An integer which is nonzero if GNU CC should perform the stack probe as a
    load instruction and zero if GNU CC should use a store instruction.  The
    default is zero, which is the most efficient choice on most systems.  */
 /* #define STACK_CHECK_PROBE_LOAD */

diff --git a/gcc/config/d30v/d30v.md b/gcc/config/d30v/d30v.md
index 4f62f3c..c8832ee 100644 (file)
--- a/gcc/config/d30v/d30v.md
+++ b/gcc/config/d30v/d30v.md
@@ -2949,7 +2949,7 @@
 }")
 
 ;; Called after register allocation to add any instructions needed for the
-;; epilogue.  Using a epilogue insn is favored compared to putting all of the
+;; epilogue.  Using an epilogue insn is favored compared to putting all of the
 ;; instructions in output_function_epilogue (), since it allows the scheduler
 ;; to intermix instructions with the saves of the caller saved registers.  In
 ;; some cases, it might be necessary to emit a barrier instruction as the last

diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c
index c362e93..5604d4d 100644 (file)
--- a/gcc/config/dsp16xx/dsp16xx.c
+++ b/gcc/config/dsp16xx/dsp16xx.c
@@ -2392,7 +2392,7 @@ dsp16xx_address_cost (addr)
 
    On the dsp1610 the first four words of args are normally in registers
    and the rest are pushed. If we a long or on float mode, the argument
-   must begin on a even register boundary
+   must begin on an even register boundary
 
    Note that FUNCTION_ARG and FUNCTION_INCOMING_ARG were different.
    For structures that are passed in memory, but could have been

diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c
index 5fca233..275efcd 100644 (file)
--- a/gcc/config/fr30/fr30.c
+++ b/gcc/config/fr30/fr30.c
@@ -332,7 +332,7 @@ fr30_expand_prologue ()
 }
 
 /* Called after register allocation to add any instructions needed for the
-   epilogue.  Using a epilogue insn is favored compared to putting all of the
+   epilogue.  Using an epilogue insn is favored compared to putting all of the
    instructions in output_function_epilogue(), since it allows the scheduler
    to intermix instructions with the restores of the caller saved registers.
    In some cases, it might be necessary to emit a barrier instruction as the

diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md
index bf3ae73..18621e4 100644 (file)
--- a/gcc/config/fr30/fr30.md
+++ b/gcc/config/fr30/fr30.md
@@ -1372,7 +1372,7 @@
 )
 
 ;; Called after register allocation to add any instructions needed for the
-;; epilogue.  Using a epilogue insn is favored compared to putting all of the
+;; epilogue.  Using an epilogue insn is favored compared to putting all of the
 ;; instructions in output_function_epilogue(), since it allows the scheduler
 ;; to intermix instructions with the restores of the caller saved registers.
 ;; In some cases, it might be necessary to emit a barrier instruction as the

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 79aceb6..9bd0ed7 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -9008,7 +9008,7 @@ ix86_expand_movstr (dst, src, count_exp, align_exp)
   if (GET_CODE (align_exp) == CONST_INT)
     align = INTVAL (align_exp);
 
-  /* This simple hack avoids all inlining code and simplifies code bellow.  */
+  /* This simple hack avoids all inlining code and simplifies code below.  */
   if (!TARGET_ALIGN_STRINGOPS)
     align = 64;
 
@@ -9229,7 +9229,7 @@ ix86_expand_clrstr (src, count_exp, align_exp)
   if (GET_CODE (align_exp) == CONST_INT)
     align = INTVAL (align_exp);
 
-  /* This simple hack avoids all inlining code and simplifies code bellow.  */
+  /* This simple hack avoids all inlining code and simplifies code below.  */
   if (!TARGET_ALIGN_STRINGOPS)
     align = 32;
 

diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c
index ead357a..26a82f1 100644 (file)
--- a/gcc/config/i860/i860.c
+++ b/gcc/config/i860/i860.c
@@ -466,7 +466,7 @@ load_operand (op, mode)
   return (memory_operand (op, mode) || indexed_operand (op, mode));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in add/subtract insns.  */
 
 int
@@ -477,7 +477,7 @@ small_int (op, mode)
   return (GET_CODE (op) == CONST_INT && SMALL_INT (op));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in logic insns.  */
 
 int

diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c
index fe8f0da..bb839e2 100644 (file)
--- a/gcc/config/i960/i960.c
+++ b/gcc/config/i960/i960.c
@@ -183,7 +183,7 @@ signed_arith_operand (op, mode)
   return (register_operand (op, mode) || signed_literal (op, mode));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns.  */
 
 int

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 1146f13..aef598b 100644 (file)
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -2275,7 +2275,7 @@ ia64_expand_prologue ()
 }
 
 /* Called after register allocation to add any instructions needed for the
-   epilogue.  Using a epilogue insn is favored compared to putting all of the
+   epilogue.  Using an epilogue insn is favored compared to putting all of the
    instructions in output_function_prologue(), since it allows the scheduler
    to intermix instructions with the saves of the caller saved registers.  In
    some cases, it might be necessary to emit a barrier instruction as the last

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index db16529..51a4453 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -509,7 +509,7 @@ arith32_operand (op, mode)
   return register_operand (op, mode);
 }
 
-/* Return truth value of whether OP is a integer which fits in 16 bits  */
+/* Return truth value of whether OP is an integer which fits in 16 bits.  */
 
 int
 small_int (op, mode)

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 1449fca..3c63a4a 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -497,7 +497,7 @@ arith_double_operand (op, mode)
                  == ((CONST_DOUBLE_LOW (op) & 0x1000) == 0))));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns, or
    is an integer register.  */
 
@@ -519,7 +519,7 @@ ireg_operand (op, mode)
   return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32);
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in three-address insns.  */
 
 int

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 117bb18..a87e4ef 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -604,7 +604,7 @@ short_cint_operand (op, mode)
          && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'));
 }
 
-/* Similar for a unsigned D field.  */
+/* Similar for an unsigned D field.  */
 
 int
 u_short_cint_operand (op, mode)

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 594f068..334abbe 100644 (file)
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1559,8 +1559,8 @@ print_operand_address (file, addr)
     'N': print the second word of a DImode operand.
     'M': print the second word of a TImode operand.
 
-    'b': print integer X as if it's a unsigned byte.
-    'x': print integer X as if it's a unsigned word.
+    'b': print integer X as if it's an unsigned byte.
+    'x': print integer X as if it's an unsigned word.
     'h': print integer X as if it's a signed word.  */
 
 void

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 1cb61c7..876e358 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1119,7 +1119,7 @@ arith10_double_operand (op, mode)
              && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x200) < 0x400));
 }
 
-/* Return truth value of whether OP is a integer which fits the
+/* Return truth value of whether OP is an integer which fits the
    range constraining immediate operands in most three-address insns,
    which have a 13 bit immediate field.  */