PR target/56903
* config/i386/i386.c (ix86_hard_regno_mode_ok): Add
lra_in_progress for return.
2013-04-12 Vladimir Makarov <vmakarov@redhat.com>
PR target/56903
* gcc.target/i386/pr56903.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197927
138bc75d-0d04-0410-961f-
82ee72b054a4
+2013-04-12 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR target/56903
+ * config/i386/i386.c (ix86_hard_regno_mode_ok): Add
+ lra_in_progress for return.
+
2013-04-12 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (mov_scc,mov_negscc,mov_notscc): Convert
return true;
if (!TARGET_PARTIAL_REG_STALL)
return true;
+ /* LRA checks if the hard register is OK for the given mode.
+ QImode values can live in non-QI regs, so we allow all
+ registers here. */
+ if (lra_in_progress)
+ return true;
return !can_create_pseudo_p ();
}
/* We handle both integer and floats in the general purpose registers. */
+2013-04-12 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR target/56903
+ * gcc.target/i386/pr56903.c: New test.
+
2013-04-12 Janus Weil <janus@gcc.gnu.org>
PR fortran/56261
--- /dev/null
+/* PR rtl-optimization/56903 */
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+/* { dg-additional-options "-march=pentium3" { target ia32 } } */
+
+int a, *b, c;
+struct S { int s : 1; } *fn1 (void);
+extern int fn3 (void), fn4 (int *);
+
+void
+fn2 (void)
+{
+ int e = fn3 ();
+ char f = c + fn1 ()->s * 4;
+ if (*b && f == e)
+ a = *b;
+ fn4 (b);
+}