Scan 256bit AVX register.

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gcc.target/i386/recip-vec-sqrtf-avx.c: Scan 256bit AVX
	register.
	* gcc.target/i386/recip-vec-divf-avx.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@165456 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 753a523..fd0ea91 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gcc.target/i386/recip-vec-sqrtf-avx.c: Scan 256bit AVX
+       register.
+       * gcc.target/i386/recip-vec-divf-avx.c: Likewise.
+
 2010-10-14  Andrey Belevantsev  <abel@ispras.ru>
 
        * gcc.target/ia64/20101005.c: New test.

diff --git a/gcc/testsuite/gcc.target/i386/recip-vec-divf-avx.c b/gcc/testsuite/gcc.target/i386/recip-vec-divf-avx.c
index 29ed276..62eb903 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/recip-vec-divf-avx.c
+++ b/gcc/testsuite/gcc.target/i386/recip-vec-divf-avx.c
@@ -13,4 +13,4 @@ void t1(void)
    r[i] = a[i] / b[i];
 }
 
-/* { dg-final { scan-assembler "vrcpps" } } */
+/* { dg-final { scan-assembler "vrcpps\[ \\t\]+\[^\n\]*%ymm" } } */

diff --git a/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf-avx.c b/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf-avx.c
index 6caa3c0..a9bb6f1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf-avx.c
+++ b/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf-avx.c
@@ -31,4 +31,4 @@ void t3(void)
    r[i] = sqrtf (a[i]);
 }
 
-/* { dg-final { scan-assembler-times "vrsqrtps" 3 } } */
+/* { dg-final { scan-assembler-times "vrsqrtps\[ \\t\]+\[^\n\]*%ymm" 3 } } */