"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
{
if (TARGET_32BIT)
- emit_insn (gen_load_macho_picbase_si (operands[0], operands[1]));
+ emit_insn (gen_load_macho_picbase_si (operands[1]));
else
- emit_insn (gen_load_macho_picbase_di (operands[0], operands[1]));
+ emit_insn (gen_load_macho_picbase_di (operands[1]));
DONE;
})
(define_insn "load_macho_picbase_si"
- [(set (match_operand:SI 0 "register_operand" "=l")
- (unspec:SI [(match_operand:SI 1 "immediate_operand" "s")
+ [(set (reg:SI 65)
+ (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
- "bcl 20,31,%1\\n%1:"
+ "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_macho_picbase_di"
- [(set (match_operand:DI 0 "register_operand" "=l")
- (unspec:DI [(match_operand:DI 1 "immediate_operand" "s")
+ [(set (reg:DI 65)
+ (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
- "bcl 20,31,%1\\n%1:"
+ "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
[(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l,c,*l"))
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
- (clobber (match_scratch:SI 3 "=l,l,l,l"))]
+ (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
{
return "b%T0l";
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
{
(call (mem:SI (match_operand:DI 1 "register_operand" "c,*l,c,*l"))
(match_operand 2 "" "g,g,g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
- (clobber (match_scratch:SI 4 "=l,l,l,l"))]
+ (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_DARWIN"
{
return "b%T1l";
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 4 "=l,l"))]
+ (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
{
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" ""))
(use (match_operand 2 "immediate_operand" "O,n"))
- (use (match_operand:SI 3 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (use (match_operand:SI 4 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
[(call (mem:SI (match_operand:DI 0 "call_operand" "s,c")) ; 64
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
- (use (match_operand:SI 3 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT && DEFAULT_ABI == ABI_DARWIN"
"*
(call (mem:SI (match_operand:DI 1 "call_operand" "s,c"))
(match_operand 2 "" "")))
(use (match_operand:SI 3 "" ""))
- (use (match_operand:SI 4 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT && DEFAULT_ABI == ABI_DARWIN"
"*
rs6000_emit_move (got, gsym, Pmode);
else
{
- rtx tempLR, tmp3, mem;
+ rtx tmp3, mem;
rtx first, last;
- tempLR = gen_reg_rtx (Pmode);
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
tmp3 = gen_reg_rtx (Pmode);
mem = gen_const_mem (Pmode, tmp1);
- first = emit_insn (gen_load_toc_v4_PIC_1b (tempLR, gsym));
- emit_move_insn (tmp1, tempLR);
+ first = emit_insn (gen_load_toc_v4_PIC_1b (gsym));
+ emit_move_insn (tmp1,
+ gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
emit_move_insn (tmp2, mem);
emit_insn (gen_addsi3 (tmp3, tmp1, tmp2));
last = emit_move_insn (got, tmp3);
if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)
{
char buf[30];
- rtx lab, tmp1, tmp2, got, tempLR;
+ rtx lab, tmp1, tmp2, got;
ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
lab = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
}
- tempLR = (fromprolog
- ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
- : gen_reg_rtx (Pmode));
- insn = emit_insn (gen_load_toc_v4_PIC_1 (tempLR, lab));
+ insn = emit_insn (gen_load_toc_v4_PIC_1 (lab));
if (fromprolog)
rs6000_maybe_dead (insn);
- insn = emit_move_insn (tmp1, tempLR);
+ insn = emit_move_insn (tmp1,
+ gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
if (fromprolog)
rs6000_maybe_dead (insn);
insn = emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab));
}
else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1)
{
- rtx tempLR = (fromprolog
- ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
- : gen_reg_rtx (Pmode));
-
- insn = emit_insn (gen_load_toc_v4_pic_si (tempLR));
+ insn = emit_insn (gen_load_toc_v4_pic_si ());
if (fromprolog)
rs6000_maybe_dead (insn);
- insn = emit_move_insn (dest, tempLR);
+ insn = emit_move_insn (dest,
+ gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
if (fromprolog)
rs6000_maybe_dead (insn);
}
else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2)
{
char buf[30];
- rtx tempLR = (fromprolog
- ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
- : gen_reg_rtx (Pmode));
rtx temp0 = (fromprolog
? gen_rtx_REG (Pmode, 0)
: gen_reg_rtx (Pmode));
ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
symL = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
- rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR,
- symF)));
- rs6000_maybe_dead (emit_move_insn (dest, tempLR));
+ rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (symF)));
+ rs6000_maybe_dead (emit_move_insn (dest,
+ gen_rtx_REG (Pmode,
+ LINK_REGISTER_REGNUM)));
rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest,
symL,
symF)));
rtx tocsym;
tocsym = gen_rtx_SYMBOL_REF (Pmode, toc_label_name);
- emit_insn (gen_load_toc_v4_PIC_1b (tempLR, tocsym));
- emit_move_insn (dest, tempLR);
+ emit_insn (gen_load_toc_v4_PIC_1b (tocsym));
+ emit_move_insn (dest,
+ gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
emit_move_insn (temp0, gen_rtx_MEM (Pmode, dest));
}
insn = emit_insn (gen_addsi3 (dest, temp0, dest));
(lshiftrt:DI (mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4)))
(const_int 32))))
- (clobber (match_scratch:SI 0 "=l"))]
+ (clobber (reg:SI 65))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mulh"
[(set_attr "type" "imul")])
[(set (reg:DI 3)
(mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4))))
- (clobber (match_scratch:SI 0 "=l"))
+ (clobber (reg:SI 65))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mull"
(div:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(mod:SI (reg:SI 3) (reg:SI 4)))
- (clobber (match_scratch:SI 0 "=l"))
+ (clobber (reg:SI 65))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __divss"
(udiv:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(umod:SI (reg:SI 3) (reg:SI 4)))
- (clobber (match_scratch:SI 0 "=l"))
+ (clobber (reg:SI 65))
(clobber (reg:SI 0))
- (clobber (match_scratch:CC 1 "=x"))
+ (clobber (match_scratch:CC 0 "=x"))
(clobber (reg:CC 69))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __divus"
(define_insn "quoss_call"
[(set (reg:SI 3)
(div:SI (reg:SI 3) (reg:SI 4)))
- (clobber (match_scratch:SI 0 "=l"))]
+ (clobber (reg:SI 65))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __quoss"
[(set_attr "type" "idiv")])
(define_insn "quous_call"
[(set (reg:SI 3)
(udiv:SI (reg:SI 3) (reg:SI 4)))
- (clobber (match_scratch:SI 0 "=l"))
+ (clobber (reg:SI 65))
(clobber (reg:SI 0))
- (clobber (match_scratch:CC 1 "=x"))
+ (clobber (match_scratch:CC 0 "=x"))
(clobber (reg:CC 69))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __quous"
[(set_attr "type" "load")])
(define_insn "load_toc_v4_pic_si"
- [(set (match_operand:SI 0 "register_operand" "=l")
+ [(set (reg:SI 65)
(unspec:SI [(const_int 0)] UNSPEC_TOC))]
"DEFAULT_ABI == ABI_V4 && flag_pic == 1 && TARGET_32BIT"
"bl _GLOBAL_OFFSET_TABLE_@local-4"
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1"
- [(set (match_operand:SI 0 "register_operand" "=l")
- (match_operand:SI 1 "immediate_operand" "s"))
- (use (unspec [(match_dup 1)] UNSPEC_TOC))]
+ [(set (reg:SI 65)
+ (match_operand:SI 0 "immediate_operand" "s"))
+ (use (unspec [(match_dup 0)] UNSPEC_TOC))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX
&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"
- "bcl 20,31,%1\\n%1:"
+ "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1b"
- [(set (match_operand:SI 0 "register_operand" "=l")
- (unspec:SI [(match_operand:SI 1 "immediate_operand" "s")]
+ [(set (reg:SI 65)
+ (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")]
UNSPEC_TOCPTR))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"
- "bcl 20,31,$+8\\n\\t.long %1-$"
+ "bcl 20,31,$+8\\n\\t.long %0-$"
[(set_attr "type" "branch")
(set_attr "length" "8")])
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
"TARGET_32BIT"
"
{ operands[2] = gen_reg_rtx (SImode); }")
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
"TARGET_64BIT"
"
{ operands[2] = gen_reg_rtx (DImode); }")
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
"TARGET_32BIT"
"
{ operands[3] = gen_reg_rtx (SImode); }")
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
"TARGET_64BIT"
"
{ operands[3] = gen_reg_rtx (DImode); }")
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
""
"
{
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
- (clobber (scratch:SI))])]
+ (clobber (reg:SI 65))])]
""
"
{
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 4 "=l,l"))]
+ (clobber (reg:SI 65))]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 4 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
- (clobber (match_scratch:SI 2 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
- (clobber (match_scratch:SI 3 "=l"))]
+ (clobber (reg:SI 65))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
- (clobber (match_scratch:SI 2 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
- (clobber (match_scratch:SI 3 "=l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
- (clobber (match_scratch:SI 4 "=l"))]
+ (clobber (reg:SI 65))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
- (clobber (match_scratch:SI 4 "=l"))]
+ (clobber (reg:SI 65))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
[(call (mem:SI (match_operand:P 0 "register_operand" "c,*l,c,*l"))
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
- (clobber (match_scratch:SI 3 "=l,l,l,l"))]
+ (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 3 "=l,l"))]
+ (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[2]) & CALL_LONG) == 0))"
(call (mem:SI (match_operand:P 1 "register_operand" "c,*l,c,*l"))
(match_operand 2 "" "g,g,g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
- (clobber (match_scratch:SI 4 "=l,l,l,l"))]
+ (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (clobber (match_scratch:SI 4 "=l,l"))]
+ (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[3]) & CALL_LONG) == 0))"
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
- (use (match_operand 3 "" ""))
+ (use (reg:SI 65))
(return)])]
""
"
gcc_assert (GET_CODE (operands[1]) == CONST_INT);
operands[0] = XEXP (operands[0], 0);
- operands[3] = gen_reg_rtx (SImode);
-
}")
;; this and similar patterns must be marked as using LR, otherwise
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (use (match_operand:SI 3 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (use (match_operand:SI 3 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (use (match_operand:SI 4 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (use (match_operand:SI 4 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
- (use (match_operand:SI 3 "register_operand" "l"))
+ (use (reg:SI 65))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
- (use (match_operand:SI 3 "register_operand" "l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
- (use (match_operand:SI 4 "register_operand" "l"))
+ (use (reg:SI 65))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
- (use (match_operand:SI 4 "register_operand" "l"))
+ (use (reg:SI 65))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" ""))
(use (match_operand 2 "immediate_operand" "O,n"))
- (use (match_operand:SI 3 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
- (use (match_operand 4 "" ""))
+ (use (reg:SI 65))
(return)])]
""
"
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
operands[1] = XEXP (operands[1], 0);
- operands[4] = gen_reg_rtx (SImode);
-
}")
(define_insn "*sibcall_value_nonlocal_sysv<mode>"
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (use (match_operand:SI 4 "register_operand" "l,l"))
+ (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
(define_insn "*save_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (match_operand:P 1 "register_operand" "=l"))
- (use (match_operand:P 2 "call_operand" "s"))
- (set (match_operand:DF 3 "memory_operand" "=m")
- (match_operand:DF 4 "gpc_reg_operand" "f"))])]
+ [(clobber (reg:P 65))
+ (use (match_operand:P 1 "call_operand" "s"))
+ (set (match_operand:DF 2 "memory_operand" "=m")
+ (match_operand:DF 3 "gpc_reg_operand" "f"))])]
""
- "bl %z2"
+ "bl %z1"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
[(return)
- (use (match_operand:P 1 "register_operand" "l"))
- (use (match_operand:P 2 "call_operand" "s"))
- (set (match_operand:DF 3 "gpc_reg_operand" "=f")
- (match_operand:DF 4 "memory_operand" "m"))])]
+ (use (reg:P 65))
+ (use (match_operand:P 1 "call_operand" "s"))
+ (set (match_operand:DF 2 "gpc_reg_operand" "=f")
+ (match_operand:DF 3 "memory_operand" "m"))])]
""
- "b %z2")
+ "b %z1")
; This is used in compiling the unwind routines.
(define_expand "eh_return"