%{!mno-power: %{mpowerpc*: -m601}} \
%{!mno-power: %{!mpowerpc*: %{!mpower2: -mpwr}}}} \
%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
-%{mcpu=604: -mppc}"
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc}"
/* Define the options for the binder: Start text at 512, align all segments
to 512 bytes, and warn if there is text relocation.
#undef ASM_SPEC
#define ASM_SPEC "-u \
%{!mcpu*: \
- %{mpower: %{!mpowerpc*: %{!mpower2: -mpwr}}} \
%{mpower2: -mpwrx} \
- %{mno-power: %{mpowerpc*: -mppc}} \
- %{mno-power: %{!mpowerpc*: -mcom}} \
- %{!mno-power: %{mpowerpc*: -m601}} \
- %{!mno-power: %{!mpowerpc*: %{!mpower2: -mpwr}}}} \
+ %{mpowerpc*: %{!mpower: -mppc}} \
+ %{mpower: %{!mpower2: -mpwr}} \
+ %{mpowerpc*: %{mpower: -m601}} \
+ %{!mpowerpc*: %{!mpower*: -mcom}}} \
%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
-%{mcpu=604: -mppc}"
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc}"
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
+-Asystem(unix) -Asystem(aix)"
+
+#undef CPP_SPEC
+#define CPP_SPEC "\
+%{posix: -D_POSIX_SOURCE} \
+%{!mcpu*: \
+ %{mpower: %{!mpower2: -D_ARCH_PWR}} \
+ %{mpower2: -D_ARCH_PWR2} \
+ %{mpowerpc*: -D_ARCH_PPC} \
+ %{!mpower*: -D_ARCH_COM}} \
+%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
+%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
+%{mcpu=powerpc: -D_ARCH_PPC} \
+%{mcpu=rios: -D_ARCH_PWR} \
+%{mcpu=rios1: -D_ARCH_PWR} \
+%{mcpu=rios2: -D_ARCH_PWR2} \
+%{mcpu=rsc: -D_ARCH_PWR} \
+%{mcpu=rsc1: -D_ARCH_PWR} \
+%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
+%{mcpu=6*: -D_ARCH_PPC}"
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT MASK_NEW_MNEMONICS
+
+#undef PROCESSOR_DEFAULT
+#define PROCESSOR_DEFAULT PROCESSOR_PPC601
+
+/* Define this macro as a C expression for the initializer of an
+ array of string to tell the driver program which options are
+ defaults for this target and thus do not need to be handled
+ specially when using `MULTILIB_OPTIONS'.
+
+ Do not define this macro if `MULTILIB_OPTIONS' is not defined in
+ the target makefile fragment or if none of the options listed in
+ `MULTILIB_OPTIONS' are set by default. *Note Target Fragment::. */
+
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS { "mcpu=common" }
/* These are not necessary when we pass -u to the assembler, and undefining
them saves a great deal of space in object files. */
%{mno-powerpc: %{!mpower: %{!mpower2: -D_ARCH_COM}}} \
%{!mno-powerpc: -D_ARCH_PPC}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=602: -D_ARCH_PPC} \
-%{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=603e: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=6*: -D_ARCH_PPC}"
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
%{mno-powerpc: %{!mpower: %{!mpower2: -D_ARCH_COM}}} \
%{!mno-powerpc: -D_ARCH_PPC}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=602: -D_ARCH_PPC} \
-%{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=603e: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=6*: -D_ARCH_PPC}"
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
/* This can become more refined as we have more powerpc options. */
#undef ASM_SPEC
-#define ASM_SPEC "-u %{m601:-m601} %{power*:-m601}"
+#define ASM_SPEC "\
+-u \
+%{!mcpu*: \
+ %{mpower2: -mpwrx} \
+ %{mpowerpc*: %{!mpower: -mppc}} \
+ %{mno-powerpc: %{!mpower: %{!mpower2: -mcom}}} \
+ %{mno-powerpc: %{mpower: %{!mpower2: -mpwr}}} \
+ %{!mno-powerpc: %{mpower: -m601}} \
+ %{!mno-powerpc: %{!mpower: -mppc}}} \
+%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
+%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
+%{mcpu=powerpc: -mppc} \
+%{mcpu=rios: -mpwr} \
+%{mcpu=rios1: -mpwr} \
+%{mcpu=rios2: -mpwrx} \
+%{mcpu=rsc: -mpwr} \
+%{mcpu=rsc1: -mpwr} \
+%{mcpu=403: -mppc} \
+%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
+%{mcpu=603: -mppc} \
+%{mcpu=603e: -mppc} \
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc}"
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
#define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \
fprintf (FILE, ".%s", PREFIX)
-/* Pass -m601 to the assembler, since that is what powerpc.h currently
- implies. */
#undef ASM_SPEC
-#define ASM_SPEC \
- "-u -m601 %{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
+#define ASM_SPEC "\
+-u \
+%{!mcpu*: \
+ %{mpower2: -mpwrx} \
+ %{mpowerpc*: %{!mpower: -mppc}} \
+ %{mno-powerpc: %{!mpower: %{!mpower2: -mcom}}} \
+ %{mno-powerpc: %{mpower: %{!mpower2: -mpwr}}} \
+ %{!mno-powerpc: %{mpower: -m601}} \
+ %{!mno-powerpc: %{!mpower: -mppc}}} \
+%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
+%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
+%{mcpu=powerpc: -mppc} \
+%{mcpu=rios: -mpwr} \
+%{mcpu=rios1: -mpwr} \
+%{mcpu=rios2: -mpwrx} \
+%{mcpu=rsc: -mpwr} \
+%{mcpu=rsc1: -mpwr} \
+%{mcpu=403: -mppc} \
+%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
+%{mcpu=603: -mppc} \
+%{mcpu=603e: -mppc} \
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc} \
+%{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
/* This is the end of what might become sysv4.h. */
/* Enable output of DBX (stabs) debugging information when asked for it. */
%{!mno-powerpc: %{mpower: -m601}} \
%{!mno-powerpc: %{!mpower: -mppc}}} \
%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
-%{mcpu=604: -mppc}"
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc}"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
%{mno-powerpc: %{!mpower: %{!mpower2: -D_ARCH_COM}}} \
%{!mno-powerpc: -D_ARCH_PPC}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=602: -D_ARCH_PPC} \
-%{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=603e: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=6*: -D_ARCH_PPC}"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
/* Target cpu type */
enum processor_type rs6000_cpu;
-char *rs6000_cpu_string;
+struct rs6000_cpu_select rs6000_select[3] =
+{
+ /* switch name, tune arch */
+ { (char *)0, "--enbable-cpu=", 1, 0 },
+ { (char *)0, "-mcpu=", 1, 1 },
+ { (char *)0, "-mtune=", 1, 0 },
+};
/* Set to non-zero by "fix" operation to indicate that itrunc and
uitrunc must be defined. */
}
}
- if (rs6000_cpu_string != (char *)0)
- pos = output_option (file, "-mcpu=", rs6000_cpu_string, pos);
+ for (j = 0; j < sizeof (rs6000_select) / sizeof(rs6000_select[0]); j++)
+ if (rs6000_select[j].string != (char *)0)
+ pos = output_option (file, rs6000_select[j].name, rs6000_select[j].string, pos);
fputs ("\n\n", file);
}
type and sometimes adjust other TARGET_ options. */
void
-rs6000_override_options ()
+rs6000_override_options (default_cpu)
+ char *default_cpu;
{
- int i;
+ int i, j;
+ struct rs6000_cpu_select *ptr;
/* Simplify the entries below by making a mask for any POWER
variant and any PowerPC variant. */
int target_disable; /* Target flags to disable. */
} processor_target_table[]
= {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS},
+ {"rs6000", PROCESSOR_POWER,
+ MASK_POWER | MASK_MULTIPLE | MASK_STRING,
+ MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
{"power", PROCESSOR_POWER,
MASK_POWER | MASK_MULTIPLE | MASK_STRING,
MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
+ {"power2", PROCESSOR_POWER,
+ MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
+ POWERPC_MASKS | MASK_NEW_MNEMONICS},
{"powerpc", PROCESSOR_POWERPC,
MASK_POWERPC | MASK_NEW_MNEMONICS,
POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
profile_block_flag = 0;
/* Identify the processor type */
- if (rs6000_cpu_string == 0)
- rs6000_cpu = PROCESSOR_DEFAULT;
- else
- {
- for (i = 0; i < ptt_size; i++)
- if (! strcmp (rs6000_cpu_string, processor_target_table[i].name))
- {
- rs6000_cpu = processor_target_table[i].processor;
- target_flags |= processor_target_table[i].target_enable;
- target_flags &= ~processor_target_table[i].target_disable;
- break;
- }
+ rs6000_select[0].string = default_cpu;
+ rs6000_cpu = PROCESSOR_DEFAULT;
+ if (rs6000_cpu == PROCESSOR_PPC403)
+ target_flags |= MASK_SOFT_FLOAT;
- if (i == ptt_size)
+ for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
+ {
+ ptr = &rs6000_select[i];
+ if (ptr->string != (char *)0 && ptr->string[0] != '\0')
{
- error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string);
- rs6000_cpu_string = "default";
- rs6000_cpu = PROCESSOR_DEFAULT;
+ for (j = 0; j < ptt_size; j++)
+ if (! strcmp (ptr->string, processor_target_table[j].name))
+ {
+ if (ptr->set_tune_p)
+ rs6000_cpu = processor_target_table[j].processor;
+
+ if (ptr->set_arch_p)
+ {
+ target_flags |= processor_target_table[j].target_enable;
+ target_flags &= ~processor_target_table[j].target_disable;
+ }
+ break;
+ }
+
+ if (i == ptt_size)
+ error ("bad value (%s) for %s switch", ptr->string, ptr->name);
}
}
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION ;
+/* Default string to use for cpu if not specified. */
+#ifndef TARGET_CPU_DEFAULT
+#define TARGET_CPU_DEFAULT ((char *)0)
+#endif
+
/* Tell the assembler to assume that all undefined names are external.
Don't do this until the fixed IBM assembler is more generally available.
%{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \
%{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
-%{mcpu=602: -D_ARCH_PPC} \
-%{mcpu=603: -D_ARCH_PPC} \
-%{mcpu=603e: -D_ARCH_PPC} \
-%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=602: -mppc} \
+%{mcpu=603: -mppc} \
+%{mcpu=603e: -mppc} \
+%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc}"
/* Define the options for the binder: Start text at 512, align all segments
to 512 bytes, and warn if there is text relocation.
#define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)
/* Define generic processor types based upon current deployment. */
-#define PROCESSOR_COMMON PROCESSOR_PPC604
+#define PROCESSOR_COMMON PROCESSOR_PPC601
#define PROCESSOR_POWER PROCESSOR_RIOS1
-#define PROCESSOR_POWERPC PROCESSOR_PPC601
+#define PROCESSOR_POWERPC PROCESSOR_PPC604
/* Define the default processor. This is overridden by other tm.h files. */
#define PROCESSOR_DEFAULT PROCESSOR_RIOS1
#define SUBTARGET_OPTIONS
#endif
-#define TARGET_OPTIONS \
-{ \
- {"cpu=", &rs6000_cpu_string} \
- SUBTARGET_OPTIONS \
+#define TARGET_OPTIONS \
+{ \
+ {"cpu=", &rs6000_select[1].string}, \
+ {"tune=", &rs6000_select[2].string}, \
+ SUBTARGET_OPTIONS \
}
-extern char *rs6000_cpu_string;
+/* rs6000_select[0] is reserved for the default cpu defined via --enable-cpu */
+struct rs6000_cpu_select
+{
+ char *string;
+ char *name;
+ int set_tune_p;
+ int set_arch_p;
+};
+
+extern struct rs6000_cpu_select rs6000_select[];
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
On the RS/6000 this is used to define the target cpu type. */
-#define OVERRIDE_OPTIONS rs6000_override_options ()
+#define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT)
/* Show we can debug even without a frame pointer. */
#define CAN_DEBUG_WITHOUT_FP
%{!mno-powerpc: %{mpower: -m601}} \
%{!mno-powerpc: %{!mpower: -mppc}}} \
%{mcpu=common: -mcom} \
+%{mcpu=rs6000: -mpwr} \
%{mcpu=power: -mpwr} \
+%{mcpu=power2: -mpwrx} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
%{mcpu=601: -m601} \
+%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
+%{mcpu=620: -mppc} \
%{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
%{mrelocatable} %{mrelocatable-lib} %{memb} \
%{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian}"
%{mno-powerpc: %{!mpower: %{!mpower2: -D_ARCH_COM}}} \
%{!mno-powerpc: -D_ARCH_PPC}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mno-powerpc: %{!mpower: %{!mpower2: -D_ARCH_COM}}} \
%{!mno-powerpc: -D_ARCH_PPC}} \
%{mcpu=common: -D_ARCH_COM} \
+%{mcpu=rs6000: -D_ARCH_PWR} \
%{mcpu=power: -D_ARCH_PWR} \
+%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
-# Build the libraries for both hard and soft floating point
+# Build the libraries for both hard and soft floating point and all of the
+# different processor models
-MULTILIB_OPTIONS = msoft-float mcpu=common
-MULTILIB_DIRNAMES = soft-float common
+MULTILIB_OPTIONS = msoft-float \
+ mcpu=common/mcpu=power/mcpu=powerpc/mcpu=601/mcpu=power2
+
+MULTILIB_DIRNAMES = soft-float \
+ common power powerpc 601 power2
+
+MULTILIB_MATCHES = msoft-float=mcpu?403 \
+ mcpu?power=mpower \
+ mcpu?power=mrios1 \
+ mcpu?power=mcpu=rios1 \
+ mcpu?power2=mpower2 \
+ mcpu?power2=mrios2 \
+ mcpu?power2=mcpu=rios2 \
+ mcpu?powerpc=mcpu?602 \
+ mcpu?powerpc=mcpu?603 \
+ mcpu?powerpc=mcpu?603e \
+ mcpu?powerpc=mcpu?604 \
+ mcpu?powerpc=mcpu?620 \
+ mcpu?powerpc=mcpu?403 \
+ mcpu?powerpc=mpowerpc \
+ mcpu?powerpc=mpowerpc-gpopt \
+ mcpu?powerpc=mpowerpc-gfxopt \
+ mcpu?601=mcpu?rsc \
+ mcpu?601=mcpu?rsc1
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
--- /dev/null
+# Same as t-newas, except don't build libgcc1-test. This is because
+# the compiler emits code to call external functions to save the
+# arguments that are in libc, but since libgcc1-test is linked without
+# libc, they will show up as errors.
+LIBGCC1_TEST =
+
+# Do not build libgcc1.
+LIBGCC1 =
+CROSS_LIBGCC1 =
+
+# These are really part of libgcc1, but this will cause them to be
+# built correctly, so... [taken from t-sparclite]
+LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+ cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#define FLOAT' > fp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+# Build the libraries for both hard and soft floating point and all of the
+# different processor models
+
+MULTILIB_OPTIONS = msoft-float \
+ mcpu=common/mcpu=power/mcpu=powerpc/mcpu=601/mcpu=power2
+
+MULTILIB_DIRNAMES = soft-float \
+ common power powerpc 601 power2
+
+MULTILIB_MATCHES = msoft-float=mcpu?403 \
+ mcpu?power=mpower \
+ mcpu?power=mrios1 \
+ mcpu?power=mcpu=rios1 \
+ mcpu?power2=mpower2 \
+ mcpu?power2=mrios2 \
+ mcpu?power2=mcpu=rios2 \
+ mcpu?powerpc=mcpu?602 \
+ mcpu?powerpc=mcpu?603 \
+ mcpu?powerpc=mcpu?603e \
+ mcpu?powerpc=mcpu?604 \
+ mcpu?powerpc=mcpu?620 \
+ mcpu?powerpc=mcpu?403 \
+ mcpu?powerpc=mpowerpc \
+ mcpu?powerpc=mpowerpc-gpopt \
+ mcpu?powerpc=mpowerpc-gfxopt \
+ mcpu?601=mcpu?rsc \
+ mcpu?601=mcpu?rsc1
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
+
+# Aix 3.2.x needs milli.exp for -mcpu=common
+EXTRA_PARTS = milli.exp
+milli.exp: $(srcdir)/config/rs6000/milli.exp
+ rm -f milli.exp
+ cp $(srcdir)/config/rs6000/milli.exp ./milli.exp
--- /dev/null
+# Same as t-rs6000, except don't build libgcc1-test. This is because
+# the compiler emits code to call external functions to save the
+# arguments that are in libc, but since libgcc1-test is linked without
+# libc, they will show up as errors.
+LIBGCC1_TEST =
+
+# Do not build libgcc1.
+LIBGCC1 =
+CROSS_LIBGCC1 =
+
+# These are really part of libgcc1, but this will cause them to be
+# built correctly, so... [taken from t-sparclite]
+LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+ cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#define FLOAT' > fp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+# Build the libraries for both hard and soft floating point
+
+MULTILIB_OPTIONS = msoft-float
+MULTILIB_DIRNAMES = soft-float
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
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