+2002-09-28 Kazu Hirata <kazu@cs.umass.edu>
+
+ * ChangeLog.4: Fix typos.
+ * ChangeLog.6: Likewise.
+ * FSFChangeLog.10: Likewise.
+ * genattrtab.c: Fix comment typos.
+ * haifa-sched.c: Likewise.
+ * real.c: Likewise.
+ * tree.h: Likewise.
+ * config/arm/arm.c: Likewise.
+ * config/arm/crti.asm: Likewise.
+ * config/arm/crtn.asm: Likewise.
+ * config/frv/frv.c: Likewise.
+ * config/frv/frv.md: Likewise.
+ * config/h8300/h8300.md: Likewise.
+ * config/i386/rtemself.h: Likewise.
+ * config/ia64/unwind-ia64.c: Likewise.
+ * config/ip2k/ip2k.h: Likewise.
+ * config/m88k/m88k.c: Likewise.
+ * config/m88k/m88k.md: Likewise.
+ * config/mips/sr71k.md: Likewise.
+ * config/mmix/mmix.c: Likewise.
+ * config/rs6000/rs6000.c: Likewise.
+ * config/sh/sh.md: Likewise.
+
2002-09-26 Theodore A. Roth <troth@verinet.com>
* config/avr/avr.c: Eliminate use of _PC_ in pc relative insns.
instructions in it before checking for indirect jumps.
* ifcvt.c (find_if_block): Do not consider a THEN block that ends
- in a indirect jump as a potential for conditional execution.
+ in an indirect jump as a potential for conditional execution.
* d30v.h (d30v_init_expanders): Don't declare here.
* d30v-protos.h (d30v_init_expanders): Declare here with a valid
(INIT_SECTION_ASM_OP): Define.
(FINI_SECTION_ASM_OP): Define.
(SUBTARGET_EXTRA_SECTIONS): Remove trailing comma.
- (RDATA_SECTION_FUNCITON): Provide prototype.
+ (RDATA_SECTION_FUNCTION): Provide prototype.
2001-08-29 Geoffrey Keating <geoffk@redhat.com>
* xm-alpha.h (sbrk): Add declaration.
- * convert.c (convert_to_integer): If TYPE is a enumeral type or
+ * convert.c (convert_to_integer): If TYPE is an enumeral type or
if its precision is not the same as the size of its mode,
convert in two steps.
current stack pointer -> | | /
--
- For a given function some or all of these stack compomnents
+ For a given function some or all of these stack components
may not be needed, giving rise to the possibility of
eliminating some of the registers.
# .init sections. Users may put any desired instructions in those
# sections.
- # Note - this macro is complimented by the FUNC_END macro
+ # Note - this macro is complemented by the FUNC_END macro
# in crtn.asm. If you change this macro you must also change
# that macro match.
.macro FUNC_START
# fact return. Users may put any desired instructions in those sections.
# This file is the last thing linked into any executable.
- # Note - this macro is complimented by the FUNC_START macro
+ # Note - this macro is complemented by the FUNC_START macro
# in crti.asm. If you change this macro you must also change
# that macro match.
#
\f
/* Called after register allocation to add any instructions needed for the
- epilogue. Using a epilogue insn is favored compared to putting all of the
+ epilogue. Using an epilogue insn is favored compared to putting all of the
instructions in the FUNCTION_PROLOGUE macro, since it allows the scheduler
to intermix instructions with the saves of the caller saved registers. In
some cases, it might be necessary to emit a barrier instruction as the last
}
\f
-/* Print an operand to a assembler instruction.
+/* Print an operand to an assembler instruction.
`%' followed by a letter and a digit says to output an operand in an
alternate fashion. Four letters have standard, built-in meanings described
registers can only be copied to memory and not to another class of
registers. In that case, secondary reload registers are not needed and
would not be helpful. Instead, a stack location must be used to perform the
- copy and the `movM' pattern should use memory as a intermediate storage.
+ copy and the `movM' pattern should use memory as an intermediate storage.
This case often occurs between floating-point and general registers. */
enum reg_class
}")
;; Called after register allocation to add any instructions needed for the
-;; epilogue. Using a epilogue insn is favored compared to putting all of the
+;; epilogue. Using an epilogue insn is favored compared to putting all of the
;; instructions in the FUNCTION_EPILOGUE macro, since it allows the scheduler
;; to intermix instructions with the restires of the caller saved registers.
;; In some cases, it might be necessary to emit a barrier instruction as the
;; more 16bit registers). At that point addhi and subhi can't use
;; adds/subs.
-;; There's currently no way to have a insv/extzv expander for the H8/300H
+;; There's currently no way to have an insv/extzv expander for the H8/300H
;; because word_mode is different for the H8/300 and H8/300H.
;; Shifts/rotates by small constants should be handled by special
-/* Definitions for rtems targeting a ix86 using ELF.
+/* Definitions for rtems targeting an ix86 using ELF.
Copyright (C) 1996, 1997, 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by Joel Sherrill (joel@OARcorp.com).
unsigned int any_spills : 1; /* got any register spills? */
unsigned int in_body : 1; /* are we inside a body? */
unsigned int no_reg_stack_frame : 1; /* Don't adjust bsp for i&l regs */
- unsigned char *imask; /* imask of of spill_mask record or NULL */
+ unsigned char *imask; /* imask of spill_mask record or NULL */
unsigned long pr_val; /* predicate values */
unsigned long pr_mask; /* predicate mask */
long spill_offset; /* psp-relative offset for spill base */
class of registers. In that case, secondary reload registers are
not needed and would not be helpful. Instead, a stack location
must be used to perform the copy and the `movM' pattern should use
- memory as a intermediate storage. This case often occurs between
+ memory as an intermediate storage. This case often occurs between
floating-point and general registers. */
/* `SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)'
fprintf (file, "%d", value);
return;
- case 'S': /* compliment the value and then... */
+ case 'S': /* complement the value and then... */
value = ~value;
case 's': /* print the width and offset values forming the integer
constant with a SET instruction. See integer_ok_for_set. */
;;
;; When the extracted conditions are the same, the define_split patterns
;; below change extu/extu/{and,or} into {and,or}/extu. If the reversed
-;; conditions match, one compare word can be complimented, resulting in
+;; conditions match, one compare word can be complemented, resulting in
;; {and.c,or.c}/extu. These changes are done for ext/ext/{and,or} as well.
;; If the conditions don't line up, one can be rotated. To keep the pairwise
-;; relationship, it may be necessary to both rotate and compliment. Rotating
+;; relationship, it may be necessary to both rotate and complement. Rotating
;; makes branching cheaper, but doesn't help (or hurt) creating a value, so
;; we don't do this for ext/ext/{and,or}.
;;
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
;;
;; The SR3 is describeds as:
;; - nine-stage pipeline, insn buffering with out-of-order issue to
-;; multiple function units, with a average dispatch rate of 2
+;; multiple function units, with an average dispatch rate of 2
;; insn.s per cycle (max 6 insns: 2 fpu, 4 cpu).
;;
;; The details on this are scant except for a diagram in
return DW_EH_PE_absptr;
}
-/* Make a note that we've seen the beginning of of the prologue. This
+/* Make a note that we've seen the beginning of the prologue. This
matters to whether we'll translate register numbers as calculated by
mmix_machine_dependent_reorg. */
case 'G':
/* X is a constant integer. If it is negative, print "m",
- otherwise print "z". This is to make a aze or ame insn. */
+ otherwise print "z". This is to make an aze or ame insn. */
if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%G value");
else if (INTVAL (x) >= 0)
"and %2,%0"
[(set_attr "type" "arith")])
-;; If the constant is 255, then emit a extu.b instruction instead of an
+;; If the constant is 255, then emit an extu.b instruction instead of an
;; and, since that will give better code.
(define_expand "andsi3"
The first produces a function `function_units_used' which is given an
insn and produces an encoding showing which function units are required
for the execution of that insn. If the value is non-negative, the insn
- uses that unit; otherwise, the value is a one's compliment mask of units
+ uses that unit; otherwise, the value is a one's complement mask of units
used.
The second produces a function `result_ready_cost' which is used to
/* Translate the CONST_STRING expressions in X to change the encoding of
value. On input, the value is a bitmask with a one bit for each unit
used; on output, the value is the unit number (zero based) if one
- and only one unit is used or the one's compliment of the bitmask. */
+ and only one unit is used or the one's complement of the bitmask. */
static rtx
encode_units_mask (x)
case CONST_STRING:
i = atoi (XSTR (x, 0));
if (i < 0)
- /* The sign bit encodes a one's compliment mask. */
+ /* The sign bit encodes a one's complement mask. */
abort ();
else if (i != 0 && i == (i & -i))
/* Only one bit is set, so yield that unit number. */
/* Compute the function units used by INSN. This caches the value
returned by function_units_used. A function unit is encoded as the
- unit number if the value is non-negative and the compliment of a
+ unit number if the value is non-negative and the complement of a
mask if the value is negative. A function unit index is the
non-negative encoding. The scheduler using only DFA description
should never use the following function. */
false
};
\f
-/* The "twos-compliment" c4x format is officially defined as
+/* The "twos-complement" c4x format is officially defined as
x = s(~s).f * 2**e
/* In a FUNCTION_DECL for which DECL_BUILT_IN holds, this is
DECL_FUNCTION_CODE. */
enum built_in_function f;
- /* In a FUNCITON_DECL for which DECL_BUILT_IN does not hold, this
+ /* In a FUNCTION_DECL for which DECL_BUILT_IN does not hold, this
is used by language-dependent code. */
HOST_WIDE_INT i;
/* DECL_ALIGN and DECL_OFFSET_ALIGN. (These are not used for
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