gcc/

	* config/arm/arm-protos.h (tune_params): Add branch_cost hook.
	* config/arm/arm.c (arm_default_branch_cost): New.
	(arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune)
	(arm_v6t2_tune, arm_cortex_tune, arm_cortex_a9_tune)
	(arm_fa726_tune): Set branch_cost field using
	arm_default_branch_cost.
	* config/arm/arm.h (BRANCH_COST): Use branch_cost hook from
	current_tune structure.
	* dojump.c (tm_p.h): Include file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@174578 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5e97198..37ca621 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,19 @@
 2011-06-02  Julian Brown  <julian@codesourcery.com>
 
-       * arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning.
+       * config/arm/arm-protos.h (tune_params): Add branch_cost hook.
+       * config/arm/arm.c (arm_default_branch_cost): New.
+       (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune)
+       (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a9_tune)
+       (arm_fa726_tune): Set branch_cost field using
+       arm_default_branch_cost.
+       * config/arm/arm.h (BRANCH_COST): Use branch_cost hook from
+       current_tune structure.
+       * dojump.c (tm_p.h): Include file.
+
+2011-06-02  Julian Brown  <julian@codesourcery.com>
+
+       * config/arm/arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2
+       tuning.
        (cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
        (cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
        * config/arm/arm-protos.h (tune_params): Add prefer_constant_pool

diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 8e0d54d..c104d74 100644 (file)
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -225,6 +225,7 @@ struct tune_params
   int l1_cache_size;
   int l1_cache_line_size;
   bool prefer_constant_pool;
+  int (*branch_cost) (bool, bool);
 };
 
 extern const struct tune_params *current_tune;

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 50e42b0..9519e01 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -255,6 +255,7 @@ static bool arm_builtin_support_vector_misalignment (enum machine_mode mode,
 static void arm_conditional_register_usage (void);
 static reg_class_t arm_preferred_rename_class (reg_class_t rclass);
 static unsigned int arm_autovectorize_vector_sizes (void);
+static int arm_default_branch_cost (bool, bool);
 
 \f
 /* Table of machine attributes.  */
@@ -858,7 +859,8 @@ const struct tune_params arm_slowmul_tune =
   NULL,
   3,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  true                                         /* Prefer constant pool.  */
+  true,                                                /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_fastmul_tune =
@@ -867,7 +869,8 @@ const struct tune_params arm_fastmul_tune =
   NULL,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  true                                         /* Prefer constant pool.  */
+  true,                                                /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_xscale_tune =
@@ -876,7 +879,8 @@ const struct tune_params arm_xscale_tune =
   xscale_sched_adjust_cost,
   2,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  true                                         /* Prefer constant pool.  */
+  true,                                                /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_9e_tune =
@@ -885,7 +889,8 @@ const struct tune_params arm_9e_tune =
   NULL,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  true                                         /* Prefer constant pool.  */
+  true,                                                /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_v6t2_tune =
@@ -894,7 +899,8 @@ const struct tune_params arm_v6t2_tune =
   NULL,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  false                                                /* Prefer constant pool.  */
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 /* Generic Cortex tuning.  Use more specific tunings if appropriate.  */
@@ -904,7 +910,8 @@ const struct tune_params arm_cortex_tune =
   NULL,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  false                                                /* Prefer constant pool.  */
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_cortex_a9_tune =
@@ -913,7 +920,8 @@ const struct tune_params arm_cortex_a9_tune =
   cortex_a9_sched_adjust_cost,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_BENEFICIAL(4,32,32),
-  false                                                /* Prefer constant pool.  */
+  false,                                       /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 const struct tune_params arm_fa726te_tune =
@@ -922,7 +930,8 @@ const struct tune_params arm_fa726te_tune =
   fa726te_sched_adjust_cost,
   1,                                           /* Constant limit.  */
   ARM_PREFETCH_NOT_BENEFICIAL,
-  true                                         /* Prefer constant pool.  */
+  true,                                                /* Prefer constant pool.  */
+  arm_default_branch_cost
 };
 
 
@@ -8036,6 +8045,15 @@ arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
   return cost;
 }
 
+static int
+arm_default_branch_cost (bool speed_p, bool predictable_p ATTRIBUTE_UNUSED)
+{
+  if (TARGET_32BIT)
+    return (TARGET_THUMB2 && !speed_p) ? 1 : 4;
+  else
+    return (optimize > 0) ? 2 : 0;
+}
+
 static int fp_consts_inited = 0;
 
 /* Only zero is valid for VFP.  Other values are also valid for FPA.  */

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 0d16687..c32ef1a 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1956,8 +1956,8 @@ typedef struct
 /* Try to generate sequences that don't involve branches, we can then use
    conditional instructions */
 #define BRANCH_COST(speed_p, predictable_p) \
-  (TARGET_32BIT ? (TARGET_THUMB2 && !speed_p ? 1 : 4) \
-               : (optimize > 0 ? 2 : 0))
+  (current_tune->branch_cost (speed_p, predictable_p))
+
 \f
 /* Position Independent Code.  */
 /* We decide which register to use based on the compilation options and

diff --git a/gcc/dojump.c b/gcc/dojump.c
index 6437a1f..7606c15 100644 (file)
--- a/gcc/dojump.c
+++ b/gcc/dojump.c
@@ -36,6 +36,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "ggc.h"
 #include "basic-block.h"
 #include "output.h"
+#include "tm_p.h"
 
 static bool prefer_and_bit_test (enum machine_mode, int);
 static void do_jump_by_parts_greater (tree, tree, int, rtx, rtx, int);