From Michael Frysinger <michael.frysinger@analog.com>
* config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
BFIN_CPU_BF547, BFIN_CPU_BF523, BFIN_CPU_BF524, and BFIN_CPU_BF526.
* config/bfin/elf.h (LIB_SPEC): Use proper linker script
for bf547, bf523, bf524, and bf526.
* config/bfin/bfin.c (bfin_cpus[]): Add bf547, bf523, bf524, and
bf526.
* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
__ADSPBF523__ for bf523, __ADSPBF524__ for bf524,
__ADSPBF526__ for bf526, __ADSPBF52x__ for all three, as well as
__ADSPBF547__ and __ADSPBF54x__ for bf547.
* doc/invoke.texi (Blackfin Options): Document that
-mcpu now accept bf547, bf523, bf524, and bf526.
gcc/testsuite/
From Michael Frysinger <michael.frysinger@analog.com>
* gcc.target/bfin/mcpu-bf547.c: New test.
* gcc.target/bfin/mcpu-bf523.c: New test.
* gcc.target/bfin/mcpu-bf524.c: New test.
* gcc.target/bfin/mcpu-bf526.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@131746
138bc75d-0d04-0410-961f-
82ee72b054a4
+2008-01-22 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Michael Frysinger <michael.frysinger@analog.com>
+ * config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
+ BFIN_CPU_BF547, BFIN_CPU_BF523, BFIN_CPU_BF524, and BFIN_CPU_BF526.
+
+ * config/bfin/elf.h (LIB_SPEC): Use proper linker script
+ for bf547, bf523, bf524, and bf526.
+ * config/bfin/bfin.c (bfin_cpus[]): Add bf547, bf523, bf524, and
+ bf526.
+ * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
+ __ADSPBF523__ for bf523, __ADSPBF524__ for bf524,
+ __ADSPBF526__ for bf526, __ADSPBF52x__ for all three, as well as
+ __ADSPBF547__ and __ADSPBF54x__ for bf547.
+ * doc/invoke.texi (Blackfin Options): Document that
+ -mcpu now accept bf547, bf523, bf524, and bf526.
+
2008-01-22 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/34628
/* Prototypes for Blackfin functions used in the md file & elsewhere.
- Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
This file is part of GNU CC.
typedef enum bfin_cpu_type
{
BFIN_CPU_BF522,
+ BFIN_CPU_BF523,
+ BFIN_CPU_BF524,
BFIN_CPU_BF525,
+ BFIN_CPU_BF526,
BFIN_CPU_BF527,
BFIN_CPU_BF531,
BFIN_CPU_BF532,
BFIN_CPU_BF539,
BFIN_CPU_BF542,
BFIN_CPU_BF544,
+ BFIN_CPU_BF547,
BFIN_CPU_BF548,
BFIN_CPU_BF549,
BFIN_CPU_BF561
/* The Blackfin code generation auxiliary output file.
- Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
Contributed by Analog Devices.
This file is part of GCC.
{"bf522", BFIN_CPU_BF522, 0x0000,
WA_SPECULATIVE_LOADS},
+ {"bf523", BFIN_CPU_BF523, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf524", BFIN_CPU_BF524, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
{"bf525", BFIN_CPU_BF525, 0x0000,
WA_SPECULATIVE_LOADS},
+ {"bf526", BFIN_CPU_BF526, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
{"bf527", BFIN_CPU_BF527, 0x0000,
WA_SPECULATIVE_LOADS},
{"bf544", BFIN_CPU_BF544, 0x0000,
WA_SPECULATIVE_LOADS},
+ {"bf547", BFIN_CPU_BF547, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
{"bf548", BFIN_CPU_BF548, 0x0000,
WA_SPECULATIVE_LOADS},
/* Definitions for the Blackfin port.
- Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
Contributed by Analog Devices.
This file is part of GCC.
builtin_define ("__ADSPBF522__"); \
builtin_define ("__ADSPBF52x__"); \
break; \
+ case BFIN_CPU_BF523: \
+ builtin_define ("__ADSPBF523__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
+ case BFIN_CPU_BF524: \
+ builtin_define ("__ADSPBF524__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
case BFIN_CPU_BF525: \
builtin_define ("__ADSPBF525__"); \
builtin_define ("__ADSPBF52x__"); \
break; \
+ case BFIN_CPU_BF526: \
+ builtin_define ("__ADSPBF526__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
case BFIN_CPU_BF527: \
builtin_define ("__ADSPBF527__"); \
builtin_define ("__ADSPBF52x__"); \
builtin_define ("__ADSPBF548__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
+ case BFIN_CPU_BF547: \
+ builtin_define ("__ADSPBF547__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
case BFIN_CPU_BF549: \
builtin_define ("__ADSPBF549__"); \
builtin_define ("__ADSPBF54x__"); \
#undef LIB_SPEC
#define LIB_SPEC "--start-group -lc %{msim:-lsim}%{!msim:-lnosys} --end-group \
-%{!T*:%{!msim:%{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \
- %{mcpu=bf527*:-T bf527.ld%s} \
+%{!T*:%{!msim:%{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf523*:-T bf523.ld%s} \
+ %{mcpu=bf524*:-T bf524.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \
+ %{mcpu=bf526*:-T bf526.ld%s}%{mcpu=bf527*:-T bf527.ld%s} \
%{mcpu=bf531*:-T bf531.ld%s}%{mcpu=bf532*:-T bf532.ld%s} \
%{mcpu=bf533*:-T bf533.ld%s}%{mcpu=bf534*:-T bf534.ld%s} \
%{mcpu=bf536*:-T bf536.ld%s}%{mcpu=bf537*:-T bf537.ld%s} \
%{mcpu=bf538*:-T bf538.ld%s}%{mcpu=bf539*:-T bf539.ld%s} \
%{mcpu=bf542*:-T bf542.ld%s}%{mcpu=bf544*:-T bf544.ld%s} \
- %{mcpu=bf548*:-T bf548.ld%s}%{mcpu=bf549*:-T bf549.ld%s} \
+ %{mcpu=bf547*:-T bf547.ld%s}%{mcpu=bf548*:-T bf548.ld%s} \
+ %{mcpu=bf549*:-T bf549.ld%s} \
%{!mcpu=*:-T bf532.ld%s} \
-T bfin-common-sc.ld%s}}"
@item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]}
@opindex mcpu=
Specifies the name of the target Blackfin processor. Currently, @var{cpu}
-can be one of @samp{bf522}, @samp{bf525}, @samp{bf527},
+can be one of @samp{bf522}, @samp{bf523}, @samp{bf524},
+@samp{bf525}, @samp{bf526}, @samp{bf527},
@samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534},
@samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
-@samp{bf542}, @samp{bf544}, @samp{bf548}, @samp{bf549},
+@samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549},
@samp{bf561}.
The optional @var{sirevision} specifies the silicon revision of the target
Blackfin processor. Any workarounds available for the targeted silicon revision
+2008-01-23 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ From Michael Frysinger <michael.frysinger@analog.com>
+ * gcc.target/bfin/mcpu-bf547.c: New test.
+ * gcc.target/bfin/mcpu-bf523.c: New test.
+ * gcc.target/bfin/mcpu-bf524.c: New test.
+ * gcc.target/bfin/mcpu-bf526.c: New test.
+
2008-01-22 Eric Botcazou <ebotcazou@adacore.com>
* gcc.c-torture/execute/20080122-1.c: New test.
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf523" } */
+
+#ifndef __ADSPBF523__
+#error "__ADSPBF523__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf524" } */
+
+#ifndef __ADSPBF524__
+#error "__ADSPBF524__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf526" } */
+
+#ifndef __ADSPBF526__
+#error "__ADSPBF526__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf547" } */
+
+#ifndef __ADSPBF547__
+#error "__ADSPBF547__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif