const RTX_CODE codes[NUM_RTX_CODE];
} preds[] = {
{"general_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,
- LABEL_REF, SUBREG, REG, MEM}},
+ LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}},
#ifdef PREDICATE_CODES
PREDICATE_CODES
#endif
{"address_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,
- LABEL_REF, SUBREG, REG, MEM, PLUS, MINUS, MULT}},
- {"register_operand", {SUBREG, REG}},
- {"pmode_register_operand", {SUBREG, REG}},
+ LABEL_REF, SUBREG, REG, MEM, ADDRESSOF,
+ PLUS, MINUS, MULT}},
+ {"register_operand", {SUBREG, REG, ADDRESSOF}},
+ {"pmode_register_operand", {SUBREG, REG, ADDRESSOF}},
{"scratch_operand", {SCRATCH, REG}},
{"immediate_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,
LABEL_REF}},
{"const_int_operand", {CONST_INT}},
{"const_double_operand", {CONST_INT, CONST_DOUBLE}},
- {"nonimmediate_operand", {SUBREG, REG, MEM}},
+ {"nonimmediate_operand", {SUBREG, REG, MEM, ADDRESSOF}},
{"nonmemory_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,
- LABEL_REF, SUBREG, REG}},
+ LABEL_REF, SUBREG, REG, ADDRESSOF}},
{"push_operand", {MEM}},
{"pop_operand", {MEM}},
{"memory_operand", {SUBREG, MEM}},
UNORDERED, ORDERED, UNEQ, UNGE, UNGT, UNLE,
UNLT, LTGT}},
{"mode_independent_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,
- LABEL_REF, SUBREG, REG, MEM}}
+ LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}
};
#define NUM_KNOWN_PREDS ARRAY_SIZE (preds)
if (c != REG
&& c != SUBREG
&& c != MEM
+ && c != ADDRESSOF
&& c != CONCAT
&& c != PARALLEL
&& c != STRICT_LOW_PART)