Index: ChangeLog

2005-05-31  Geoffrey Keating  <geoffk@geoffk.org>

	* config/rs6000/rs6000.md (sync_boolcshort_internal): New.
	* config/rs6000/rs6000.c (rs6000_emit_sync): Shift count must
	be complemented for big-endian.  Mask for AND must be rotated,
	not shifted.  Handle short operands with NOT on the memory
	operation.

Index: testsuite/ChangeLog
2005-05-31  Geoffrey Keating  <geoffk@geoffk.org>

	* lib/target-supports.exp
	(check_effective_target_sync_char_short): New.
	* gcc.dg/sync-2.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100515 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index ac6dda5..b2bec15 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -990,6 +990,29 @@ proc check_effective_target_sync_int_long { } {
     return $et_sync_int_long_saved
 }
 
+# Return 1 if the target supports atomic operations on "char" and "short".
+
+proc check_effective_target_sync_char_short { } {
+    global et_sync_char_short_saved
+
+    if [info exists et_sync_char_short_saved] {
+        verbose "check_effective_target_sync_char_short: using cached result" 2
+    } else {
+        set et_sync_char_short_saved 0
+# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
+# load-reserved/store-conditional instructions.
+        if { [istarget ia64-*-*]
+            || [istarget i?86-*-*]
+            || [istarget x86_64-*-*]
+            || [istarget powerpc*-*-*] } {
+           set et_sync_char_short_saved 1
+        }
+    }
+
+    verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
+    return $et_sync_char_short_saved
+}
+
 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
 # This can be used with any check_* proc that takes no argument and
 # returns only 1 or 0.  It could be used with check_* procs that take