--- /dev/null
+# sid configuration file
+# created by Id: configrun-sid.in,v 1.35 2003/10/21 21:27:41 brolley Exp
+# run by brolley @ to-hpws2.toronto.redhat.com (Linux) at Mon Jun 13 14:13:30 EDT 2005
+# args: --cpu=ms1 --no-run --gdb=5000
+load libaudio.la audio_component_library
+load libcache.la cache_component_library
+load libcgencpu.la cgen_component_library
+load libconsoles.la console_component_library
+load libgdb.la gdb_component_library
+load libgloss.la gloss_component_library
+load libglue.la glue_component_library
+load libhd44780u.la hd44780u_component_library
+load libide.la ide_component_library
+load libinterrupt.la interrupt_component_library
+load libloader.la loader_component_library
+load libmapper.la mapper_component_library
+load libmemory.la mem_component_library
+load libmmu.la mmu_component_library
+load libparport.la parport_component_library
+load libprof.la prof_component_library
+load librtc.la rtc_component_library
+load libsched.la sched_component_library
+load libtimers.la timer_component_library
+load libuart.la uart_component_library
+load libx86.la x86_component_library
+set main persistent? true
+# first section
+new hw-cpu-ms1 cpu
+new hw-mapper-basic cpu-mapper
+new hw-glue-sequence-8 init-sequence
+new hw-glue-sequence-1 hw-reset-net
+new hw-glue-sequence-8 deinit-sequence
+new hw-glue-sequence-1 yield-net
+new hw-glue-sequence-2 cache-flush-net
+new sid-sched-host-accurate host-sched
+new sid-sched-sim target-sched
+# add io bus probe
+new hw-glue-probe-bus io-bus-probe
+# gloss
+new sw-gloss-generic/libgloss gloss
+# cpu gdb
+new sw-debug-gdb cpu-gdb
+new sid-io-socket-server cpu-gdb-socket
+# memory region 1 (0x00000000,0x00800000)
+new hw-memory-ram/rom-basic mem1
+# second section
+# settings
+set cpu step-insn-count 10000
+set host-sched num-clients 10 # large enough?
+set target-sched num-clients 10 # large enough?
+# pin connections
+connect-pin main perform-activity -> host-sched advance
+connect-pin main perform-activity -> target-sched advance
+connect-pin main starting -> init-sequence input
+connect-pin main stopping -> deinit-sequence input
+connect-pin init-sequence output-0 -> hw-reset-net input
+connect-pin hw-reset-net output-0 -> cpu reset!
+connect-pin target-sched 0-event -> cpu step!
+connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
+connect-pin yield-net output-0 -> cpu yield
+connect-pin yield-net output-0 -> host-sched yield
+connect-bus cpu insn-memory cpu-mapper access-port
+connect-bus cpu data-memory cpu-mapper access-port
+# gloss
+relate gloss cpu cpu
+connect-pin init-sequence output-2 -> gloss reset
+connect-pin cpu trap <-> gloss trap
+connect-pin cpu trap-code -> gloss trap-code
+set gloss verbose? 0
+connect-bus gloss target-memory cpu-mapper access-port
+set cpu engine-type pbb
+# cpu-gdb
+relate cpu-gdb cpu cpu
+relate cpu-gdb cfgroot main
+relate cpu-gdb target-schedulers target-sched
+relate cpu-gdb host-schedulers host-sched
+connect-pin cpu-gdb process-signal -> main stop!
+connect-pin init-sequence output-3 -> cpu-gdb init
+connect-pin deinit-sequence output-5 -> cpu-gdb deinit
+connect-pin cpu-gdb yield -> yield-net input
+connect-pin cpu-gdb flush-icache -> cache-flush-net input
+connect-pin cache-flush-net output-1 -> cpu flush-icache
+connect-pin cpu-gdb restart -> hw-reset-net input
+set cpu-gdb exit-on-detach? 1
+# cpu-gdb-socket
+connect-pin init-sequence output-2 -> cpu-gdb-socket init
+connect-pin deinit-sequence output-6 -> cpu-gdb-socket fini
+connect-pin cpu-gdb-socket rx -> cpu-gdb remote-rx
+connect-pin cpu-gdb-socket tx <- cpu-gdb remote-tx
+connect-pin host-sched 6-event -> cpu-gdb-socket poll-event
+connect-pin host-sched 6-control <- cpu-gdb-socket poll-control
+set cpu-gdb-socket sockaddr-local 0.0.0.0:5000
+# gdb w/ gloss
+connect-pin gloss trap-chain <-> cpu-gdb trap
+connect-pin gloss trap-code-chain -> cpu-gdb trap-code
+connect-pin gloss process-signal -> cpu-gdb gloss-process-signal
+connect-pin gloss debug-tx -> cpu-gdb target-tx
+relate cpu-gdb gloss gloss
+set cpu-gdb enable-Z-packet? true
+set cpu-gdb operating-mode? false
+set cpu endian big
+# memory region 1 (0x00000000,0x00800000) configuration
+set mem1 size 8388608
+connect-bus cpu-mapper mem1:[0,8388607] mem1 read-write-port
--- /dev/null
+# sid configuration file
+# created by Id: configrun-sid.in,v 1.35 2003/10/21 21:27:41 brolley Exp
+# run by brolley @ to-hpws2.toronto.redhat.com (Linux) at Mon Jun 13 14:13:29 EDT 2005
+# args: --cpu=ms1 --no-run a.out
+load libaudio.la audio_component_library
+load libcache.la cache_component_library
+load libcgencpu.la cgen_component_library
+load libconsoles.la console_component_library
+load libgdb.la gdb_component_library
+load libgloss.la gloss_component_library
+load libglue.la glue_component_library
+load libhd44780u.la hd44780u_component_library
+load libide.la ide_component_library
+load libinterrupt.la interrupt_component_library
+load libloader.la loader_component_library
+load libmapper.la mapper_component_library
+load libmemory.la mem_component_library
+load libmmu.la mmu_component_library
+load libparport.la parport_component_library
+load libprof.la prof_component_library
+load librtc.la rtc_component_library
+load libsched.la sched_component_library
+load libtimers.la timer_component_library
+load libuart.la uart_component_library
+load libx86.la x86_component_library
+# first section
+new hw-cpu-ms1 cpu
+new hw-mapper-basic cpu-mapper
+new hw-glue-sequence-8 init-sequence
+new hw-glue-sequence-1 hw-reset-net
+new hw-glue-sequence-8 deinit-sequence
+new hw-glue-sequence-1 yield-net
+new hw-glue-sequence-2 cache-flush-net
+new sid-sched-host-accurate host-sched
+new sid-sched-sim target-sched
+# add io bus probe
+new hw-glue-probe-bus io-bus-probe
+# gloss
+new sw-gloss-generic/libgloss gloss
+# gloss <-> stdio
+new sid-io-stdio stdio
+# cpu loader
+new sw-load-elf cpu-loader
+# memory region 1 (0x00000000,0x00800000)
+new hw-memory-ram/rom-basic mem1
+# second section
+# settings
+set cpu step-insn-count 10000
+set host-sched num-clients 10 # large enough?
+set target-sched num-clients 10 # large enough?
+# pin connections
+connect-pin main perform-activity -> host-sched advance
+connect-pin main perform-activity -> target-sched advance
+connect-pin main starting -> init-sequence input
+connect-pin main stopping -> deinit-sequence input
+connect-pin init-sequence output-0 -> hw-reset-net input
+connect-pin hw-reset-net output-0 -> cpu reset!
+connect-pin target-sched 0-event -> cpu step!
+connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
+connect-pin yield-net output-0 -> cpu yield
+connect-pin yield-net output-0 -> host-sched yield
+connect-bus cpu insn-memory cpu-mapper access-port
+connect-bus cpu data-memory cpu-mapper access-port
+# gloss
+relate gloss cpu cpu
+connect-pin init-sequence output-2 -> gloss reset
+connect-pin cpu trap <-> gloss trap
+connect-pin cpu trap-code -> gloss trap-code
+set gloss verbose? 0
+connect-bus gloss target-memory cpu-mapper access-port
+# gloss <-> stdio
+set host-sched 0-regular? 1
+set host-sched 0-time 150 # apprx. human perception limit
+connect-pin host-sched 0-event -> stdio poll
+connect-pin gloss debug-tx -> stdio stdout
+connect-pin gloss debug-rx <- stdio stdin
+# gloss w/o gdb
+connect-pin gloss process-signal -> main stop!
+connect-pin gloss process-signal -> yield-net input
+set cpu engine-type pbb
+# cpu loader
+set cpu-loader file "a.out"
+connect-bus cpu-loader load-accessor-data cpu-mapper access-port
+connect-bus cpu-loader load-accessor-insn cpu-mapper access-port # don't trace loading
+connect-pin init-sequence output-1 -> cpu-loader load!
+connect-pin cpu-loader start-pc-set -> cpu start-pc-set!
+connect-pin cpu-loader endian-set -> cpu endian-set!
+connect-pin cpu-loader error -> main stop!
+# memory region 1 (0x00000000,0x00800000) configuration
+set mem1 size 8388608
+connect-bus cpu-mapper mem1:[0,8388607] mem1 read-write-port
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