Add tbm flag and TBM instruction pattern.

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction
	pattern.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c463b63..2e3af6e 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction
+       pattern.
+
 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 
        * gas/i386/tbm.s: New.

diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d b/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d
index 779a95a..6b41a2d 100644 (file)
--- a/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d
@@ -1,5 +1,5 @@
 #source: ../x86-64-arch-2.s
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
 #objdump: -dw
 #name: x86-64 (ILP32) arch 2
 
@@ -38,4 +38,5 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    f3 0f bd d9             lzcnt  %ecx,%ebx
 [      ]*[a-f0-9]+:    0f a7 c0                xstore-rng 
 [      ]*[a-f0-9]+:    c4 e2 60 f3 c9          blsr   %ecx,%ebx
+[      ]*[a-f0-9]+:    8f e9 60 01 c9          blcfill %ecx,%ebx
 #pass