(const_int 1)
(and (eq_attr "cpu_facility" "ieee")
- (ne (symbol_ref "TARGET_CPU_IEEE_FLOAT") (const_int 0)))
+ (match_test "TARGET_CPU_IEEE_FLOAT"))
(const_int 1)
(and (eq_attr "cpu_facility" "zarch")
- (ne (symbol_ref "TARGET_ZARCH") (const_int 0)))
+ (match_test "TARGET_ZARCH"))
(const_int 1)
(and (eq_attr "cpu_facility" "longdisp")
- (ne (symbol_ref "TARGET_LONG_DISPLACEMENT") (const_int 0)))
+ (match_test "TARGET_LONG_DISPLACEMENT"))
(const_int 1)
(and (eq_attr "cpu_facility" "extimm")
- (ne (symbol_ref "TARGET_EXTIMM") (const_int 0)))
+ (match_test "TARGET_EXTIMM"))
(const_int 1)
(and (eq_attr "cpu_facility" "dfp")
- (ne (symbol_ref "TARGET_DFP") (const_int 0)))
+ (match_test "TARGET_DFP"))
(const_int 1)
(and (eq_attr "cpu_facility" "z10")
- (ne (symbol_ref "TARGET_Z10") (const_int 0)))
+ (match_test "TARGET_Z10"))
(const_int 1)
(and (eq_attr "cpu_facility" "z196")
- (ne (symbol_ref "TARGET_Z196") (const_int 0)))
+ (match_test "TARGET_Z196"))
(const_int 1)]
(const_int 0)))
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
- (if_then_else (eq (symbol_ref "flag_pic") (const_int 0))
+ (if_then_else (not (match_test "flag_pic"))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(const_int 4) (const_int 6))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
- (if_then_else (eq (symbol_ref "flag_pic") (const_int 0))
+ (if_then_else (not (match_test "flag_pic"))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(const_int 4) (const_int 6))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(set_attr "z10prop" "z10_super_E1")
(set_attr "type" "branch")
(set (attr "length")
- (if_then_else (eq (symbol_ref "flag_pic") (const_int 0))
+ (if_then_else (not (match_test "flag_pic"))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(const_int 4) (const_int 6))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
[(set_attr "op_type" "RI")
(set_attr "type" "branch")
(set (attr "length")
- (if_then_else (eq (symbol_ref "flag_pic") (const_int 0))
+ (if_then_else (not (match_test "flag_pic"))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
(const_int 4) (const_int 6))
(if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000))
gcc_unreachable ();
}
[(set (attr "type")
- (if_then_else (ne (symbol_ref "TARGET_CPU_ZARCH") (const_int 0))
+ (if_then_else (match_test "TARGET_CPU_ZARCH")
(const_string "larl") (const_string "la")))])
(define_insn "reload_base_31"