(sCOND patterns): Don't allow a MEM in the SET_DEST, because these insns

can't have input reloads, and a MEM might need an input address reload.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@2163 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2d2f28e..6bdc971 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3028,9 +3028,13 @@
 ;; For all sCOND expanders, also expand the compare or test insn that
 ;; generates cc0.  Generate an equality comparison if `seq' or `sne'.
 
+;; The 386 sCOND opcodes can write to memory.  But a gcc sCOND insn may
+;; not have any input reloads.  A MEM write might need an input reload
+;; for the address of the MEM.  So don't allow MEM as the SET_DEST.
+
 (define_expand "seq"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (eq:QI (cc0) (const_int 0)))]
   ""
   "
@@ -3043,7 +3047,7 @@
 }")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (eq:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3056,7 +3060,7 @@
 
 (define_expand "sne"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (ne:QI (cc0) (const_int 0)))]
   ""
   "
@@ -3069,7 +3073,7 @@
 }")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (ne:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3083,13 +3087,13 @@
 
 (define_expand "sgt"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (gt:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (gt:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3102,26 +3106,26 @@
 
 (define_expand "sgtu"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (gtu:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (gtu:QI (cc0) (const_int 0)))]
   ""
   "* return \"seta %0\"; ")
 
 (define_expand "slt"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (lt:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (lt:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3134,26 +3138,26 @@
 
 (define_expand "sltu"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (ltu:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (ltu:QI (cc0) (const_int 0)))]
   ""
   "* return \"setb %0\"; ")
 
 (define_expand "sge"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (ge:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (ge:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3166,26 +3170,26 @@
 
 (define_expand "sgeu"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (geu:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (geu:QI (cc0) (const_int 0)))]
   ""
   "* return \"setae %0\"; ")
 
 (define_expand "sle"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (le:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (le:QI (cc0) (const_int 0)))]
   ""
   "*
@@ -3198,13 +3202,13 @@
 
 (define_expand "sleu"
   [(match_dup 1)
-   (set (match_operand:QI 0 "general_operand" "")
+   (set (match_operand:QI 0 "register_operand" "")
        (leu:QI (cc0) (const_int 0)))]
   ""
   "operands[1] = (*i386_compare_gen)(i386_compare_op0, i386_compare_op1);")
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand" "=qm")
+  [(set (match_operand:QI 0 "register_operand" "=q")
        (leu:QI (cc0) (const_int 0)))]
   ""
   "* return \"setbe %0\"; ")