Fix PR44185: new prefetch test failures.

2010-05-20  Changpeng Fang  <changpeng.fang@amd.com>

	PR middle-end/44185
	* gcc.dg/tree-ssa/prefetch-6.c: Add --param min-insn-to-prefetch-ratio=6.
	* gcc.dg/tree-ssa/prefetch-7.c: Remove --param max-unrolled-insns=1 to
        allow unrolling, and adjust the movnti count.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@159630 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7272fe5..ddeef01 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2010-05-20  Changpeng Fang  <changpeng.fang@amd.com>
+
+       PR middle-end/44185
+       * gcc.dg/tree-ssa/prefetch-6.c: Add --param min-insn-to-prefetch-ratio=6.
+       * gcc.dg/tree-ssa/prefetch-7.c: Remove --param max-unrolled-insns=1 to
+        allow unrolling, and adjust the movnti count.
+
 2010-05-20  Jan Hubicka  <jh@suse.cz>
 
        PR middle-end/44197

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
index 2ce94c3..7a1de5a 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
 /* { dg-require-effective-target ilp32 } */
 /* { dg-require-effective-target sse2 } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details" } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */
 
 #define N 1000
 #define K 900

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
index b174874..3b9e19f 100644 (file)
--- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
@@ -2,7 +2,7 @@
 /* { dg-require-effective-target ilp32 } */
 /* { dg-require-effective-target sse2 } */
 /* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
-/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param max-unrolled-insns=1 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
+/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
 
 #define K 1000000
 int a[K], b[K];
@@ -48,13 +48,13 @@ void test(int *p)
 /* { dg-final { scan-tree-dump-times "a nontemporal store" 2 "aprefetch" } } */
 
 /* { dg-final { scan-tree-dump-times "builtin_prefetch" 8 "optimized" } } */
-/* { dg-final { scan-tree-dump-times "=\\{nt\\}" 2 "optimized" } } */
+/* { dg-final { scan-tree-dump-times "=\\{nt\\}" 18 "optimized" } } */
 /* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 2 "optimized" } } */
 
 /* { dg-final { scan-assembler-times "prefetchw" 5 } } */
 /* { dg-final { scan-assembler-times "prefetcht" 1 } } */
 /* { dg-final { scan-assembler-times "prefetchnta" 2 } } */
-/* { dg-final { scan-assembler-times "movnti" 2 } } */
+/* { dg-final { scan-assembler-times "movnti" 18 } } */
 /* { dg-final { scan-assembler-times "mfence" 2 } } */
 
 /* { dg-final { cleanup-tree-dump "aprefetch" } } */