Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to
the whims of the System V Release 4 assembler.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
+along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
insn-output.c. */
#ifdef RTX_CODE
-extern unsigned long sfmode_constant_to_ulong PARAMS ((rtx));
-extern const char *output_load PARAMS ((rtx *));
-extern const char *output_store PARAMS ((rtx *));
-extern const char *output_move_double PARAMS ((rtx *));
-extern const char *output_fp_move_double PARAMS ((rtx *));
-extern const char *output_block_move PARAMS ((rtx *));
-extern const char *output_delay_insn PARAMS ((rtx));
+extern unsigned long sfmode_constant_to_ulong (rtx);
+extern const char *output_load (rtx *);
+extern const char *output_store (rtx *);
+extern const char *output_move_double (rtx *);
+extern const char *output_fp_move_double (rtx *);
+extern const char *output_block_move (rtx *);
+extern const char *output_delay_insn (rtx);
#if 0
-extern const char *output_delayed_branch PARAMS ((const char *, rtx *, rtx));
+extern const char *output_delayed_branch (const char *, rtx *, rtx);
#endif
-extern void output_load_address PARAMS ((rtx *));
-extern int safe_insn_src_p PARAMS ((rtx, enum machine_mode));
-extern int operand_clobbered_before_used_after PARAMS ((rtx, rtx));
-extern int single_insn_src_p PARAMS ((rtx, enum machine_mode));
-extern int reg_or_0_operand PARAMS ((rtx, enum machine_mode));
-extern int arith_operand PARAMS ((rtx, enum machine_mode));
-extern int logic_operand PARAMS ((rtx, enum machine_mode));
-extern int shift_operand PARAMS ((rtx, enum machine_mode));
-extern int compare_operand PARAMS ((rtx, enum machine_mode));
-extern int bte_operand PARAMS ((rtx, enum machine_mode));
-extern int indexed_operand PARAMS ((rtx, enum machine_mode));
-extern int load_operand PARAMS ((rtx, enum machine_mode));
-extern int small_int PARAMS ((rtx, enum machine_mode));
-extern int logic_int PARAMS ((rtx, enum machine_mode));
-extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
-extern rtx i860_saveregs PARAMS ((void));
+extern void output_load_address (rtx *);
+extern int safe_insn_src_p (rtx, enum machine_mode);
+extern int operand_clobbered_before_used_after (rtx, rtx);
+extern int single_insn_src_p (rtx, enum machine_mode);
+extern int reg_or_0_operand (rtx, enum machine_mode);
+extern int arith_operand (rtx, enum machine_mode);
+extern int logic_operand (rtx, enum machine_mode);
+extern int shift_operand (rtx, enum machine_mode);
+extern int compare_operand (rtx, enum machine_mode);
+extern int bte_operand (rtx, enum machine_mode);
+extern int indexed_operand (rtx, enum machine_mode);
+extern int load_operand (rtx, enum machine_mode);
+extern int small_int (rtx, enum machine_mode);
+extern int logic_int (rtx, enum machine_mode);
+extern int call_insn_operand (rtx, enum machine_mode);
+extern rtx i860_saveregs (void);
#ifdef TREE_CODE
-extern void i860_va_start PARAMS ((tree, rtx));
-extern rtx i860_va_arg PARAMS ((tree, tree));
+extern void i860_va_start (tree, rtx);
+extern rtx i860_va_arg (tree, tree);
#endif /* TREE_CODE */
#endif /* RTX_CODE */
#ifdef TREE_CODE
-extern tree i860_build_va_list PARAMS ((void));
+extern tree i860_build_va_list (void);
#endif /* TREE_CODE */
extern void tdesc_section (void);
Hacked substantially by Ron Guilmette (rfg@netcom.com) to cater
to the whims of the System V Release 4 assembler.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
+along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "target.h"
#include "target-def.h"
-static rtx find_addr_reg PARAMS ((rtx));
-static int reg_clobbered_p PARAMS ((rtx, rtx));
-static const char *singlemove_string PARAMS ((rtx *));
-static const char *load_opcode PARAMS ((enum machine_mode, const char *, rtx));
-static const char *store_opcode PARAMS ((enum machine_mode, const char *, rtx));
-static void output_size_for_block_move PARAMS ((rtx, rtx, rtx));
-static void i860_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
-static void i860_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
+static rtx find_addr_reg (rtx);
#ifndef I860_REG_PREFIX
#define I860_REG_PREFIX ""
/* Return non-zero if this pattern, can be evaluated safely, even if it
was not asked for. */
int
-safe_insn_src_p (op, mode)
- rtx op;
- enum machine_mode mode;
+safe_insn_src_p (rtx op, enum machine_mode mode)
{
/* Just experimenting. */
Return 0 if neither. */
static int
-reg_clobbered_p (reg, in)
- rtx reg;
- rtx in;
+reg_clobbered_p (rtx reg, rtx in)
{
register enum rtx_code code;
appears in the dest position of a SET insn in a conditional
branch's delay slot. AFTER is the label to start looking from. */
int
-operand_clobbered_before_used_after (op, after)
- rtx op;
- rtx after;
+operand_clobbered_before_used_after (rtx op, rtx after)
{
/* Just experimenting. */
if (GET_CODE (op) == CC0)
/* Return non-zero if this pattern, as a source to a "SET",
is known to yield an instruction of unit size. */
int
-single_insn_src_p (op, mode)
- rtx op;
- enum machine_mode mode;
+single_insn_src_p (rtx op, enum machine_mode mode)
{
switch (GET_CODE (op))
{
/* Return non-zero only if OP is a register of mode MODE,
or const0_rtx. */
int
-reg_or_0_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+reg_or_0_operand (rtx op, enum machine_mode mode)
{
return (op == const0_rtx || register_operand (op, mode)
|| op == CONST0_RTX (mode));
address add/subtract insn (such as add %o1,7,%l2) of mode MODE. */
int
-arith_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arith_operand (rtx op, enum machine_mode mode)
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && SMALL_INT (op)));
/* Return 1 if OP is a valid first operand for a logical insn of mode MODE. */
int
-logic_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+logic_operand (rtx op, enum machine_mode mode)
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && LOGIC_INT (op)));
/* Return 1 if OP is a valid first operand for a shift insn of mode MODE. */
int
-shift_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+shift_operand (rtx op, enum machine_mode mode)
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT));
or an add insn of mode MODE. */
int
-compare_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+compare_operand (rtx op, enum machine_mode mode)
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && SMALL_INT (op) && LOGIC_INT (op)));
operand of a bte or btne insn. */
int
-bte_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+bte_operand (rtx op, enum machine_mode mode)
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
/* Return 1 if OP is an indexed memory reference of mode MODE. */
int
-indexed_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+indexed_operand (rtx op, enum machine_mode mode)
{
return (GET_CODE (op) == MEM && GET_MODE (op) == mode
&& GET_CODE (XEXP (op, 0)) == PLUS
with mode MODE. */
int
-load_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+load_operand (rtx op, enum machine_mode mode)
{
return (memory_operand (op, mode) || indexed_operand (op, mode));
}
range constraining immediate operands in add/subtract insns. */
int
-small_int (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+small_int (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return (GET_CODE (op) == CONST_INT && SMALL_INT (op));
}
range constraining immediate operands in logic insns. */
int
-logic_int (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+logic_int (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return (GET_CODE (op) == CONST_INT && LOGIC_INT (op));
}
can't handle yet. */
int
-call_insn_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+call_insn_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (op) == MEM
&& (CONSTANT_ADDRESS_P (XEXP (op, 0))
for moving operands[1] into operands[0] as a fullword. */
static const char *
-singlemove_string (operands)
- rtx *operands;
+singlemove_string (rtx *operands)
{
if (GET_CODE (operands[0]) == MEM)
{
with operands OPERANDS. */
const char *
-output_move_double (operands)
- rtx *operands;
+output_move_double (rtx *operands)
{
enum { REGOP, OFFSOP, MEMOP, PUSHOP, POPOP, CNSTOP, RNDOP } optype0, optype1;
rtx latehalf[2];
}
\f
const char *
-output_fp_move_double (operands)
- rtx *operands;
+output_fp_move_double (rtx *operands)
{
/* If the source operand is any sort of zero, use f0 instead. */
ADDR can be effectively incremented by incrementing REG. */
static rtx
-find_addr_reg (addr)
- rtx addr;
+find_addr_reg (rtx addr)
{
while (GET_CODE (addr) == PLUS)
{
This string is in static storage. */
static const char *
-load_opcode (mode, args, reg)
- enum machine_mode mode;
- const char *args;
- rtx reg;
+load_opcode (enum machine_mode mode, const char *args, rtx reg)
{
static char buf[30];
const char *opcode;
This string is in static storage. */
static const char *
-store_opcode (mode, args, reg)
- enum machine_mode mode;
- const char *args;
- rtx reg;
+store_opcode (enum machine_mode mode, const char *args, rtx reg)
{
static char buf[30];
const char *opcode;
It may alter the values of operands[0] and operands[1]. */
const char *
-output_store (operands)
- rtx *operands;
+output_store (rtx *operands)
{
enum machine_mode mode = GET_MODE (operands[0]);
rtx address = XEXP (operands[0], 0);
It may alter the values of operands[0] and operands[1]. */
const char *
-output_load (operands)
- rtx *operands;
+output_load (rtx *operands)
{
enum machine_mode mode = GET_MODE (operands[0]);
rtx address = XEXP (operands[1], 0);
All cases are handled here. */
void
-output_load_address (operands)
- rtx *operands;
+output_load_address (rtx *operands)
{
rtx base, offset;
right to subtract on this machine, so right now we don't.) */
static void
-output_size_for_block_move (size, reg, align)
- rtx size, reg, align;
+output_size_for_block_move (rtx size, rtx reg, rtx align)
{
rtx xoperands[3];
OPERANDS[4..6] are pseudos we can safely clobber as temps. */
const char *
-output_block_move (operands)
- rtx *operands;
+output_block_move (rtx *operands)
{
/* A vector for our computed operands. Note that load_output_address
makes use of (and can clobber) up to the 8th element of this vector. */
the code to use the DBR pass. */
const char *
-output_delayed_branch (template, operands, insn)
- const char *template;
- rtx *operands;
- rtx insn;
+output_delayed_branch (const char *template, rtx *operands, rtx insn)
{
rtx src = XVECEXP (PATTERN (insn), 0, 1);
rtx dest = XVECEXP (PATTERN (insn), 0, 0);
/* Output a newly constructed insn DELAY_INSN. */
const char *
-output_delay_insn (delay_insn)
- rtx delay_insn;
+output_delay_insn (rtx delay_insn)
{
const char *template;
int insn_code_number;
grok floating literals in instruction operand contexts. */
unsigned long
-sfmode_constant_to_ulong (x)
- rtx x;
+sfmode_constant_to_ulong (rtx x)
{
REAL_VALUE_TYPE d;
unsigned long l;
static unsigned must_preserve_bytes;
static void
-i860_output_function_prologue (asm_file, local_bytes)
- register FILE *asm_file;
- register HOST_WIDE_INT local_bytes;
+i860_output_function_prologue (FILE *asm_file, HOST_WIDE_INT local_bytes)
{
register HOST_WIDE_INT frame_lower_bytes;
register HOST_WIDE_INT frame_upper_bytes;
} TDESC;
static void
-i860_output_function_epilogue (asm_file, local_bytes)
- register FILE *asm_file;
- register HOST_WIDE_INT local_bytes;
+i860_output_function_epilogue (FILE *asm_file, HOST_WIDE_INT local_bytes)
{
register HOST_WIDE_INT frame_upper_bytes;
register HOST_WIDE_INT frame_lower_bytes;
/* Expand a library call to __builtin_saveregs. */
rtx
-i860_saveregs ()
+i860_saveregs (void)
{
rtx fn = gen_rtx_SYMBOL_REF (Pmode, "__builtin_saveregs");
rtx save = gen_reg_rtx (Pmode);
}
tree
-i860_build_va_list ()
+i860_build_va_list (void)
{
tree field_ireg_used, field_freg_used, field_reg_base, field_mem_ptr;
tree record;
#endif
rtx
-i860_va_arg (valist, type)
- tree valist, type;
+i860_va_arg (tree valist, tree type)
{
tree field_ireg_used, field_freg_used, field_reg_base, field_mem_ptr;
tree type_ptr_node, t;
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