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PR tree-optimization/47001
authorirar <irar@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 21 Dec 2010 15:42:11 +0000 (15:42 +0000)
committerirar <irar@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 21 Dec 2010 15:42:11 +0000 (15:42 +0000)
        * tree-vect-slp.c (vect_supported_load_permutation_p): Check
        that the loads in reduction are different and there are no gaps
        between them.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@168123 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/vect/pr47001.c [new file with mode: 0644]
gcc/tree-vect-slp.c

index bbf0545..bc44e7b 100644 (file)
@@ -1,3 +1,10 @@
+2010-12-21  Ira Rosen  <irar@il.ibm.com>
+
+       PR tree-optimization/47001
+       * tree-vect-slp.c (vect_supported_load_permutation_p): Check that
+       the loads in reduction are different and there are no gaps between
+       them.
+
 2010-12-21  Steven Bosscher  <steven@gcc.gnu.org>
 
        PR middle-end/45310
index 007baf4..b03b602 100644 (file)
@@ -1,3 +1,8 @@
+2010-12-21  Ira Rosen  <irar@il.ibm.com>i
+
+       PR tree-optimization/47001
+       * gcc.dg/vect/pr47001.c: New.
+
 2010-12-21  Nicola Pero  <nicola.pero@meta-innovation.com>
 
        PR libobjc/16110
diff --git a/gcc/testsuite/gcc.dg/vect/pr47001.c b/gcc/testsuite/gcc.dg/vect/pr47001.c
new file mode 100644 (file)
index 0000000..9c5d08d
--- /dev/null
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+
+#include <stdlib.h>
+
+#define N 128
+
+int a[N];
+
+int main1 (int res0, int res1)
+{
+  int i;
+  int sum0 = 0, sum1 = 0;
+
+  for (i = 0; i < N/2; i++) {
+    sum1 += a[2*i];
+    sum0 += a[2*i];
+  }
+
+  /* Check results:  */
+  if (sum0 != res0
+      || sum1 != res1)
+    abort ();
+
+  return 0;
+}
+
+/* { dg-final { cleanup-tree-dump "vect" } } */
index fdaaff2..4f7c72c 100644 (file)
@@ -1002,7 +1002,36 @@ vect_supported_load_permutation_p (slp_instance slp_instn, int group_size,
 
       if (!bad_permutation)
         {
-          /* This permutaion is valid for reduction.  Since the order of the
+          /* Check that the loads in the first sequence are different and there
+             are no gaps between them.  */
+          load_index = sbitmap_alloc (group_size);
+          sbitmap_zero (load_index);
+          for (k = 0; k < group_size; k++)
+            {
+              first_group_load_index = VEC_index (int, load_permutation, k);
+              if (TEST_BIT (load_index, first_group_load_index))
+                {
+                  bad_permutation = true;
+                  break;
+                }
+
+              SET_BIT (load_index, first_group_load_index);
+            }
+
+          if (!bad_permutation)
+            for (k = 0; k < group_size; k++)
+              if (!TEST_BIT (load_index, k))
+                {
+                  bad_permutation = true;
+                  break;
+                }
+
+          sbitmap_free (load_index);
+        }
+
+      if (!bad_permutation)
+        {
+          /* This permutation is valid for reduction.  Since the order of the
              statements in the nodes is not important unless they are memory
              accesses, we can rearrange the statements in all the nodes 
              according to the order of the loads.  */