(subsi3+1): Handle case where first operand is constant

but second operand is not.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@12589 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md
index f6ca00e..32acd92 100644 (file)
--- a/gcc/config/i960/i960.md
+++ b/gcc/config/i960/i960.md
@@ -1509,6 +1509,9 @@
 ;; add instruction.
 ;; Some assemblers apparently won't accept two addresses added together.
 
+;; ??? The condition should be improved to reject the case of two
+;; symbolic constants.
+
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d,d,d")
        (plus:SI (match_operand:SI 1 "arith32_operand" "%dn,i,dn")
@@ -1531,8 +1534,16 @@
       else if (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 32)
        return \"addo   %1,%2,%0\";
     }
+  /* Non-canonical results (op1 == const, op2 != const) have been seen
+     in reload output when both operands were symbols before reload, so
+     we deal with it here.  This may be a fault of the constraints above.  */
   if (CONSTANT_P (operands[1]))
-    return \"lda       %1+%2,%0\";
+    {
+      if (CONSTANT_P (operands[2]))
+       return \"lda    %1+%2,%0\";
+      else
+       return \"lda    %1(%2),%0\";
+    }
   return \"lda %2(%1),%0\";
 }")