* config/rs6000/rs6000.h (REVERSIBLE_CC_MODE): Define.

	(REVERSE_CONDITION): Define.

	* gcc.dg/ppc-fsel-1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@66442 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 18b1d9e..a7a01a6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
 2003-05-03  Geoffrey Keating  <geoffk@apple.com>
 
+       * config/rs6000/rs6000.h (REVERSIBLE_CC_MODE): Define.
+       (REVERSE_CONDITION): Define.
+
        * config/rs6000/rs6000.c (scc_comparison_operator): Make equivalent
        to branch_positive_comparison_operator.
        (ccr_bit): Check that sCOND conditions are actually a positive bit.

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 994f67a..6d95b7a 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2366,9 +2366,16 @@ do {                                                                          \
    : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<'   \
       ? CCEQmode : CCmode))
 
+/* Can the condition code MODE be safely reversed?  This is safe in
+   all cases on this port, because at present it doesn't use the
+   trapping FP comparisons (fcmpo).  */
+#define REVERSIBLE_CC_MODE(MODE) 1
+
+/* Given a condition code and a mode, return the inverse condition.  */
+#define REVERSE_CONDITION(CODE, MODE) rs6000_reverse_condition (MODE, CODE)
+
 /* Define the information needed to generate branch and scc insns.  This is
-   stored from the compare operation.  Note that we can't use "rtx" here
-   since it hasn't been defined!  */
+   stored from the compare operation.  */
 
 extern GTY(()) rtx rs6000_compare_op0;
 extern GTY(()) rtx rs6000_compare_op1;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d041bd5..1b79f24 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2003-05-03  Geoffrey Keating  <geoffk@apple.com>
+
+       * gcc.dg/ppc-fsel-1.c: New test.
+
 2003-05-03  Zack Weinberg  <zack@codesourcery.com>
 
        PR c/10604

diff --git a/gcc/testsuite/gcc.dg/ppc-fsel-1.c b/gcc/testsuite/gcc.dg/ppc-fsel-1.c
new file mode 100644 (file)
index 0000000..266b8db
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ppc-fsel-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-options "-O -mpowerpc-gfxopt" } */
+/* { dg-final { scan-assembler "fsel" } } */
+
+/* Check that fsel can be generated even without -ffast-math.  */
+
+double foo(double a, double b, double c, double d)
+{
+  return a < b ? c : d;
+}