* config/mips/mips.c (mips_address_insns): Treat BLKmode specially.

	* config/mips/mips.md: Expand comment above unaligned loads and stores.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@78129 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 554829a..5ad5408 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-02-19  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/mips/mips.c (mips_address_insns): Treat BLKmode specially.
+       * config/mips/mips.md: Expand comment above unaligned loads and stores.
+
 2004-02-19  Richard Henderson  <rth@redhat.com>
 
        * Makefile.in (STRICT2_WARN): Add -Wno-variadic-macros.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 9ffa08f..88dca98 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -1234,8 +1234,13 @@ mips_address_insns (rtx x, enum machine_mode mode)
   struct mips_address_info addr;
   int factor;
 
-  /* Each word of a multi-word value will be accessed individually.  */
-  factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+  if (mode == BLKmode)
+    /* BLKmode is used for single unaligned loads and stores.  */
+    factor = 1;
+  else
+    /* Each word of a multi-word value will be accessed individually.  */
+    factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+
   if (mips_classify_address (&addr, x, mode, false))
     switch (addr.type)
       {

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 82b52de..ae6b898 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4059,6 +4059,10 @@ dsrl\t%3,%3,1\n\
 ;; refers to just the first or the last byte (depending on endianness).
 ;; We therefore use two memory operands to each instruction, one to
 ;; describe the rtl effect and one to use in the assembly output.
+;;
+;; Operands 0 and 1 are the rtl-level target and source respectively.
+;; This allows us to use the standard length calculations for the "load"
+;; and "store" type attributes.
 
 (define_insn "mov_lwl"
   [(set (match_operand:SI 0 "register_operand" "=d")