PR target/2623

* arm.md (loadhi_preinc, loadhi_predec, loadhi_shiftpreinc)
(loadhi_shiftpredec, loadhi-with-writeback peephole): Don't use
these patterns on arm_archv4.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@51345 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c228fcc..4ef20e8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2002-03-25  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/2623
+       * arm.md (loadhi_preinc, loadhi_predec, loadhi_shiftpreinc)
+       (loadhi_shiftpredec, loadhi-with-writeback peephole): Don't use
+       these patterns on arm_archv4.
+
 2002-03-25  Danny Smith  <dannysmith@sourceforge.users.net>
 
        * config/i386/mingw32.h (WINT_TYPE): Define as "short unsigned

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 7d73cbd..77be4f3 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8280,6 +8280,7 @@
   "TARGET_ARM
    && !BYTES_BIG_ENDIAN
    && !TARGET_MMU_TRAPS
+   && !arm_arch4
    && REGNO (operands[0]) != FRAME_POINTER_REGNUM
    && REGNO (operands[1]) != FRAME_POINTER_REGNUM
    && (GET_CODE (operands[2]) != REG
@@ -8298,6 +8299,7 @@
   "TARGET_ARM
    && !BYTES_BIG_ENDIAN
    && !TARGET_MMU_TRAPS
+   && !arm_arch4
    && REGNO (operands[0]) != FRAME_POINTER_REGNUM
    && REGNO (operands[1]) != FRAME_POINTER_REGNUM
    && (GET_CODE (operands[2]) != REG
@@ -8462,6 +8464,7 @@
   "TARGET_ARM
    && !BYTES_BIG_ENDIAN
    && !TARGET_MMU_TRAPS
+   && !arm_arch4
    && REGNO (operands[0]) != FRAME_POINTER_REGNUM
    && REGNO (operands[1]) != FRAME_POINTER_REGNUM
    && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
@@ -8482,6 +8485,7 @@
   "TARGET_ARM
    && !BYTES_BIG_ENDIAN
    && !TARGET_MMU_TRAPS
+   && !arm_arch4
    && REGNO (operands[0]) != FRAME_POINTER_REGNUM
    && REGNO (operands[1]) != FRAME_POINTER_REGNUM
    && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
@@ -8545,6 +8549,7 @@
   "TARGET_ARM
    && !BYTES_BIG_ENDIAN
    && !TARGET_MMU_TRAPS
+   && !arm_arch4
    && REGNO (operands[0]) != REGNO(operands[1])
    && (GET_CODE (operands[2]) != REG
        || REGNO(operands[0]) != REGNO (operands[2]))"