PR target/40697
* optabs.c (avoid_expensive_constant): Use rtx_cost to find out
the cost of loading the constant rather than assuming
COSTS_N_INSNS (1).
* config/arm/arm.c (thumb1_rtx_costs) <case CONST_INT>: If the
outer code is AND, do the same tests as the andsi3 expander and
return COSTS_N_INSNS (1) if and is cheap.
testsuite/
PR target/40697
* gcc.target/arm/thumb-andsi.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@157582
138bc75d-0d04-0410-961f-
82ee72b054a4
* ira-lives.c (check_and_make_def_conflict): Ignore conflict for a
use that may match DEF.
+ PR target/40697
+ * optabs.c (avoid_expensive_constant): Use rtx_cost to find out
+ the cost of loading the constant rather than assuming
+ COSTS_N_INSNS (1).
+ * config/arm/arm.c (thumb1_rtx_costs) <case CONST_INT>: If the
+ outer code is AND, do the same tests as the andsi3 expander and
+ return COSTS_N_INSNS (1) if and is cheap.
+
2010-03-19 Michael Matz <matz@suse.de>
PR c++/43116
rtx x, bool unsignedp)
{
bool speed = optimize_insn_for_speed_p ();
-
if (mode != VOIDmode
&& optimize
&& CONSTANT_P (x)
PR rtl-optimization/42258
* gcc.target/arm/thumb1-mul-moves.c: New test.
-
+
+ PR target/40697
+ * gcc.target/arm/thumb-andsi.c: New test.
+
2010-03-19 Michael Matz <matz@suse.de>
PR c++/43116
/* { dg-do compile } */
-/* { dg-options "-mthumb -Os" } */
-/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-options "-Os -mthumb -march=armv5te" } */
unsigned get_least_bits(unsigned value)
{