stack_add_operand, add_immediate_operand,
high_register_operand, low_register_operand, call_operand,
di_operand, and nonimmediate_di_operand.
* config/fr30/fr30.c (stack_add_operand,
add_immediate_operand, high_register_operand,
low_register_operand, call_operand, di_operand,
nonimmediate_di_operand): Move to predicates.md.
* config/fr30/fr30.h (PREDICATE_CODES): Remove.
* config/fr30/fr30.md: Include predicates.md.
* config/fr30/predicates.md: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97540
138bc75d-0d04-0410-961f-
82ee72b054a4
+2005-04-04 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/fr30/fr30-protos.h: Remove the prototypes for
+ stack_add_operand, add_immediate_operand,
+ high_register_operand, low_register_operand, call_operand,
+ di_operand, and nonimmediate_di_operand.
+ * config/fr30/fr30.c (stack_add_operand,
+ add_immediate_operand, high_register_operand,
+ low_register_operand, call_operand, di_operand,
+ nonimmediate_di_operand): Move to predicates.md.
+ * config/fr30/fr30.h (PREDICATE_CODES): Remove.
+ * config/fr30/fr30.md: Include predicates.md.
+ * config/fr30/predicates.md: New.
+
2005-04-04 Alan Modra <amodra@bigpond.net.au>
* passes.c (rest_of_handle_final): NULL unlikely_text_section_name
#endif /* TREE_CODE */
#ifdef HAVE_MACHINE_MODES
#define Mmode enum machine_mode
-extern int stack_add_operand (rtx, Mmode);
-extern int add_immediate_operand (rtx, Mmode);
-extern int high_register_operand (rtx, Mmode);
-extern int low_register_operand (rtx, Mmode);
-extern int call_operand (rtx, Mmode);
-extern int di_operand (rtx, Mmode);
-extern int nonimmediate_di_operand (rtx, Mmode);
extern int fr30_const_double_is_zero (rtx);
#undef Mmode
#endif /* HAVE_MACHINE_MODES */
#define Mmode enum machine_mode
#endif
-/* Returns true if OPERAND is an integer value suitable for use in
- an ADDSP instruction. */
-int
-stack_add_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
-{
- return
- (GET_CODE (operand) == CONST_INT
- && INTVAL (operand) >= -512
- && INTVAL (operand) <= 508
- && ((INTVAL (operand) & 3) == 0));
-}
-
-/* Returns true if OPERAND is an integer value suitable for use in
- an ADD por ADD2 instruction, or if it is a register. */
-int
-add_immediate_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
-{
- return
- (GET_CODE (operand) == REG
- || (GET_CODE (operand) == CONST_INT
- && INTVAL (operand) >= -16
- && INTVAL (operand) <= 15));
-}
-
-/* Returns true if OPERAND is hard register in the range 8 - 15. */
-int
-high_register_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
-{
- return
- (GET_CODE (operand) == REG
- && REGNO (operand) <= 15
- && REGNO (operand) >= 8);
-}
-
-/* Returns true if OPERAND is hard register in the range 0 - 7. */
-int
-low_register_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
-{
- return
- (GET_CODE (operand) == REG
- && REGNO (operand) <= 7);
-}
-
-/* Returns true if OPERAND is suitable for use in a CALL insn. */
-int
-call_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
-{
- return (GET_CODE (operand) == MEM
- && (GET_CODE (XEXP (operand, 0)) == SYMBOL_REF
- || GET_CODE (XEXP (operand, 0)) == REG));
-}
-
-/* Returns TRUE if OP is a valid operand of a DImode operation. */
-int
-di_operand (rtx op, Mmode mode)
-{
- if (register_operand (op, mode))
- return TRUE;
-
- if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
- return FALSE;
-
- if (GET_CODE (op) == SUBREG)
- op = SUBREG_REG (op);
-
- switch (GET_CODE (op))
- {
- case CONST_DOUBLE:
- case CONST_INT:
- return TRUE;
-
- case MEM:
- return memory_address_p (DImode, XEXP (op, 0));
-
- default:
- return FALSE;
- }
-}
-
-/* Returns TRUE if OP is a DImode register or MEM. */
-int
-nonimmediate_di_operand (rtx op, Mmode mode)
-{
- if (register_operand (op, mode))
- return TRUE;
-
- if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
- return FALSE;
-
- if (GET_CODE (op) == SUBREG)
- op = SUBREG_REG (op);
-
- if (GET_CODE (op) == MEM)
- return memory_address_p (DImode, XEXP (op, 0));
-
- return FALSE;
-}
-
/* Returns true iff all the registers in the operands array
are in descending or ascending order. */
int
extern struct rtx_def * fr30_compare_op1;
/*}}}*/ \f
-/*{{{ PREDICATE_CODES. */
-
-#define PREDICATE_CODES \
- { "stack_add_operand", { CONST_INT }}, \
- { "high_register_operand", { REG }}, \
- { "low_register_operand", { REG }}, \
- { "call_operand", { MEM }}, \
- { "di_operand", { CONST_INT, CONST_DOUBLE, REG, MEM }}, \
- { "nonimmediate_di_operand", { REG, MEM }}, \
- { "add_immediate_operand", { REG, CONST_INT }},
-
-/*}}}*/ \f
/* Local Variables: */
/* folded-file: t */
;; FR30 machine description.
-;; Copyright (C) 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
+;; Copyright (C) 1998, 1999, 2000, 2002, 2004, 2005
+;; Free Software Foundation, Inc.
;; Contributed by Cygnus Solutions.
;; This file is part of GCC.
(nil)]
)
+(include "predicates.md")
+
;;}}}
;;{{{ Moves
--- /dev/null
+;; Predicate definitions for FR30.
+;; Copyright (C) 2005 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to
+;; the Free Software Foundation, 59 Temple Place - Suite 330,
+;; Boston, MA 02111-1307, USA.
+
+;; Returns true if OP is an integer value suitable for use in an
+;; ADDSP instruction.
+
+(define_predicate "stack_add_operand"
+ (match_code "const_int")
+{
+ return
+ (GET_CODE (op) == CONST_INT
+ && INTVAL (op) >= -512
+ && INTVAL (op) <= 508
+ && ((INTVAL (op) & 3) == 0));
+})
+
+;; Returns true if OP is hard register in the range 8 - 15.
+
+(define_predicate "high_register_operand"
+ (match_code "reg")
+{
+ return
+ (GET_CODE (op) == REG
+ && REGNO (op) <= 15
+ && REGNO (op) >= 8);
+})
+
+;; Returns true if OP is hard register in the range 0 - 7.
+
+(define_predicate "low_register_operand"
+ (match_code "reg")
+{
+ return
+ (GET_CODE (op) == REG
+ && REGNO (op) <= 7);
+})
+
+;; Returns true if OP is suitable for use in a CALL insn.
+
+(define_predicate "call_operand"
+ (match_code "mem")
+{
+ return (GET_CODE (op) == MEM
+ && (GET_CODE (XEXP (op, 0)) == SYMBOL_REF
+ || GET_CODE (XEXP (op, 0)) == REG));
+})
+
+;; Returns TRUE if OP is a valid operand of a DImode operation.
+
+(define_predicate "di_operand"
+ (match_code "const_int,const_double,reg,mem")
+{
+ if (register_operand (op, mode))
+ return TRUE;
+
+ if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
+ return FALSE;
+
+ if (GET_CODE (op) == SUBREG)
+ op = SUBREG_REG (op);
+
+ switch (GET_CODE (op))
+ {
+ case CONST_DOUBLE:
+ case CONST_INT:
+ return TRUE;
+
+ case MEM:
+ return memory_address_p (DImode, XEXP (op, 0));
+
+ default:
+ return FALSE;
+ }
+})
+
+;; Returns TRUE if OP is a DImode register or MEM.
+
+(define_predicate "nonimmediate_di_operand"
+ (match_code "reg,mem")
+{
+ if (register_operand (op, mode))
+ return TRUE;
+
+ if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
+ return FALSE;
+
+ if (GET_CODE (op) == SUBREG)
+ op = SUBREG_REG (op);
+
+ if (GET_CODE (op) == MEM)
+ return memory_address_p (DImode, XEXP (op, 0));
+
+ return FALSE;
+})
+
+;; Returns true if OP is an integer value suitable for use in an ADD
+;; or ADD2 instruction, or if it is a register.
+
+(define_predicate "add_immediate_operand"
+ (match_code "reg,const_int")
+{
+ return
+ (GET_CODE (op) == REG
+ || (GET_CODE (op) == CONST_INT
+ && INTVAL (op) >= -16
+ && INTVAL (op) <= 15));
+})
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