* config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ...

	(mul<mode>3_mul3): ... into this new template.

testsuite/
	* gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to
	32 when -march=r3900 is passed.
	* testsuite/gcc.target/mips/r3900-mult.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@140922 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e7b2b50..e766799 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2008-10-06  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ...
+       (mul<mode>3_mul3): ... into this new template.
+
 2008-10-06  Aldy Hernandez  <aldyh@redhat.com>
 
        * gimplify.c (gimplify_arg): Add location argument.  Use it.

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 6ae6c0b..3f56feb 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -1367,35 +1367,21 @@
   DONE;
 })
 
-(define_insn "mulsi3_mul3"
-  [(set (match_operand:SI 0 "register_operand" "=d,l")
-       (mult:SI (match_operand:SI 1 "register_operand" "d,d")
-                (match_operand:SI 2 "register_operand" "d,d")))
-   (clobber (match_scratch:SI 3 "=l,X"))]
-  "ISA_HAS_MUL3"
+(define_insn "mul<mode>3_mul3"
+  [(set (match_operand:GPR 0 "register_operand" "=d,l")
+       (mult:GPR (match_operand:GPR 1 "register_operand" "d,d")
+                 (match_operand:GPR 2 "register_operand" "d,d")))
+   (clobber (match_scratch:GPR 3 "=l,X"))]
+  "ISA_HAS_<D>MUL3"
 {
   if (which_alternative == 1)
-    return "mult\t%1,%2";
-  if (TARGET_MIPS3900)
+    return "<d>mult\t%1,%2";
+  if (<MODE>mode == SImode && TARGET_MIPS3900)
     return "mult\t%0,%1,%2";
-  return "mul\t%0,%1,%2";
+  return "<d>mul\t%0,%1,%2";
 }
   [(set_attr "type" "imul3,imul")
-   (set_attr "mode" "SI")])
-
-(define_insn "muldi3_mul3"
-  [(set (match_operand:DI 0 "register_operand" "=d,l")
-       (mult:DI (match_operand:DI 1 "register_operand" "d,d")
-                (match_operand:DI 2 "register_operand" "d,d")))
-   (clobber (match_scratch:DI 3 "=l,X"))]
-  "ISA_HAS_DMUL3"
-{
-  if (which_alternative == 1)
-    return "dmult\t%1,%2";
-  return "dmul\t%0,%1,%2";
-}
-  [(set_attr "type" "imul3,imul")
-   (set_attr "mode" "DI")])
+   (set_attr "mode" "<MODE>")])
 
 ;; If a register gets allocated to LO, and we spill to memory, the reload
 ;; will include a move from LO to a GPR.  Merge it into the multiplication

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0391f3d..d9f4f29 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2008-10-06  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to
+       32 when -march=r3900 is passed.
+       * testsuite/gcc.target/mips/r3900-mult.c: New test.
+
 2008-10-06  Aldy Hernandez  <aldyh@redhat.com>
 
        * gcc.dg/gomp/for-1.c: Test column.

diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp
index 8326339..8e66e0a 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -261,6 +261,7 @@ proc dg-mips-options {args} {
            -mips[12] -
            -mips32* -
            -march=mips32* -
+           -march=r3900 -
            -march=24k* -
            -mabi=32 -
            -mgp32 {

diff --git a/gcc/testsuite/gcc.target/mips/r3900-mult.c b/gcc/testsuite/gcc.target/mips/r3900-mult.c
new file mode 100644 (file)
index 0000000..393f108
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/r3900-mult.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-mips-options "-march=r3900" } */
+/* { dg-final { scan-assembler "\tmult\t\[^\n\]*,\[^\n\]*," } } */
+
+NOMIPS16 int
+f (int a, int b)
+{
+  return a * b;
+}