2009-03-12 H.J. Lu <hongjiu.lu@intel.com>
+ PR target/39327
+ * config/i386/sse.md (avx_addsubv8sf3): Correct item bits.
+ (avx_addsubv4df3): Likewise.
+ (*avx_addsubv4sf3): Likewise.
+ (sse3_addsubv4sf3): Likewise.
+
+2009-03-12 H.J. Lu <hongjiu.lu@intel.com>
+
PR target/38824
* config/i386/i386.md: Compare REGNO on the new peephole2
patterns.
(match_operand:V8SF 1 "register_operand" "x")
(match_operand:V8SF 2 "nonimmediate_operand" "xm"))
(minus:V8SF (match_dup 1) (match_dup 2))
- (const_int 66)))]
+ (const_int 170)))]
"TARGET_AVX"
"vaddsubps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
(match_operand:V4DF 1 "register_operand" "x")
(match_operand:V4DF 2 "nonimmediate_operand" "xm"))
(minus:V4DF (match_dup 1) (match_dup 2))
- (const_int 6)))]
+ (const_int 10)))]
"TARGET_AVX"
"vaddsubpd\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
(match_operand:V4SF 1 "register_operand" "x")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(minus:V4SF (match_dup 1) (match_dup 2))
- (const_int 6)))]
+ (const_int 10)))]
"TARGET_AVX"
"vaddsubps\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "sseadd")
(match_operand:V4SF 1 "register_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(minus:V4SF (match_dup 1) (match_dup 2))
- (const_int 6)))]
+ (const_int 10)))]
"TARGET_SSE3"
"addsubps\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")