+2011-09-15 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (output_fp_compare): Return %v prefixed
+ instruction mnemonics for TARGET_AVX.
+
+ * config/i386/i386.md (*movdf_internal_rex64): use cond RTX in
+ "type" attribute calculation.
+ (*movdf_internal): Ditto.
+ (*movsf_internal): Ditto.
+
2011-09-15 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): New builtin macro.
* config/arm/arm.c (arm_override_options): Add unaligned_access
support.
- (arm_file_start): Emit attribute for unaligned access as
- appropriate.
+ (arm_file_start): Emit attribute for unaligned access as appropriate.
* config/arm/arm.md (UNSPEC_UNALIGNED_LOAD)
(UNSPEC_UNALIGNED_STORE): Add constants for unspecs.
(insv, extzv): Add unaligned-access support.
* ipa-inline-transform.c (can_remove_node_now_p): Fix thunkos.
2011-09-13 Paul Brook <paul@codesourcery.com>
-
+
* config/arm/arm.h (ASM_PREFERRED_EH_DATA_FORMAT): Define.
(ARM_TARGET2_DWARF_FORMAT): Provide default definition.
* config/arm/linux-eabi.h (ARM_TARGET2_DWARF_FORMAT): Define.
* ginclude/unwind-arm-common.h: New file.
2011-09-13 Georg-Johann Lay <avr@gjlay.de>
-
+
PR target/50358
* config/avr/predicates.md (const_1_to_6_operand): New predicate.
* config/avr/avr.md: (extend_s): New code attribute.
PR tree-optimization/50343
* tree-vect-patterns.c (vect_recog_dot_prod_pattern): Check
- that the reduction is over an SSA name before checking its
- definition.
+ that the reduction is over an SSA name before checking its definition.
2011-09-11 Richard Sandiford <rdsandiford@googlemail.com>
if (is_sse)
{
- static const char ucomiss[] = "vucomiss\t{%1, %0|%0, %1}";
- static const char ucomisd[] = "vucomisd\t{%1, %0|%0, %1}";
- static const char comiss[] = "vcomiss\t{%1, %0|%0, %1}";
- static const char comisd[] = "vcomisd\t{%1, %0|%0, %1}";
-
if (GET_MODE (operands[0]) == SFmode)
if (unordered_p)
- return &ucomiss[TARGET_AVX ? 0 : 1];
+ return "%vucomiss\t{%1, %0|%0, %1}";
else
- return &comiss[TARGET_AVX ? 0 : 1];
+ return "%vcomiss\t{%1, %0|%0, %1}";
else
if (unordered_p)
- return &ucomisd[TARGET_AVX ? 0 : 1];
+ return "%vucomisd\t{%1, %0|%0, %1}";
else
- return &comisd[TARGET_AVX ? 0 : 1];
+ return "%vcomisd\t{%1, %0|%0, %1}";
}
gcc_assert (STACK_TOP_P (cmp_op0));
(unspec:HI [(reg:CCFP FPSR_REG)] UNSPEC_FNSTSW))]
"TARGET_80387"
"fnstsw\t%0"
- [(set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 2"))
+ [(set (attr "length")
+ (symbol_ref "ix86_attr_length_address_default (insn) + 2"))
(set_attr "mode" "SI")
(set_attr "unit" "i387")])
(set_attr "mode" "SI")])
;; Pentium Pro can do steps 1 through 3 in one go.
-;; comi*, ucomi*, fcomi*, ficomi*,fucomi* (i387 instructions set condition codes)
+;; comi*, ucomi*, fcomi*, ficomi*, fucomi*
+;; (these i387 instructions set flags directly)
(define_insn "*cmpfp_i_mixed"
[(set (reg:CCFP FLAGS_REG)
(compare:CCFP (match_operand 0 "register_operand" "f,x")
gcc_unreachable();
}
}
- [(set_attr "type" "fmov,fmov,fmov,imov,imov,imov,multi,sselog1,ssemov,ssemov,ssemov,ssemov,ssemov")
+ [(set (attr "type")
+ (cond [(eq_attr "alternative" "0,1,2")
+ (const_string "fmov")
+ (eq_attr "alternative" "3,4,5")
+ (const_string "imov")
+ (eq_attr "alternative" "6")
+ (const_string "multi")
+ (eq_attr "alternative" "7")
+ (const_string "sselog1")
+ ]
+ (const_string "ssemov")))
(set (attr "modrm")
(if_then_else
(and (eq_attr "alternative" "5") (eq_attr "type" "imov"))
(if_then_else (eq_attr "alternative" "5,6,7,8")
(const_string "sse2")
(const_string "*")))
- (set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
+ (set (attr "type")
+ (cond [(eq_attr "alternative" "0,1,2")
+ (const_string "fmov")
+ (eq_attr "alternative" "3,4")
+ (const_string "multi")
+ (eq_attr "alternative" "5,9")
+ (const_string "sselog1")
+ ]
+ (const_string "ssemov")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "0,1,2,3,4")
(const_string "orig")
gcc_unreachable ();
}
}
- [(set_attr "type" "fmov,fmov,fmov,imov,imov,sselog1,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov,ssemov,ssemov,mmxmov,mmxmov")
+ [(set (attr "type")
+ (cond [(eq_attr "alternative" "0,1,2")
+ (const_string "fmov")
+ (eq_attr "alternative" "3,4")
+ (const_string "multi")
+ (eq_attr "alternative" "5")
+ (const_string "sselog1")
+ (eq_attr "alternative" "9,10,11,14,15")
+ (const_string "mmxmov")
+ ]
+ (const_string "ssemov")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "5,6,7,8,12,13")
(const_string "maybe_vex")