-#define TARGET_NONE -(SH1_BIT | SH2_BIT | SH3_BIT | SH_E_BIT | SH4_BIT \
- | HARD_SH2A_BIT | HARD_SH2A_DOUBLE_BIT \
- | SH4A_BIT | HARD_SH4_BIT | FPU_SINGLE_BIT | SH5_BIT)
-
-#ifndef TARGET_SWITCH_SH1
-#define TARGET_SWITCH_SH1 \
- {"1", TARGET_NONE, "" }, \
- {"1", SELECT_SH1, "Generate SH1 code" },
-#endif
-#ifndef TARGET_SWITCH_SH2
-#define TARGET_SWITCH_SH2 \
- {"2", TARGET_NONE, "" }, \
- {"2", SELECT_SH2, "Generate SH2 code" },
-#endif
-#ifndef TARGET_SWITCH_SH2E
-#define TARGET_SWITCH_SH2E \
- {"2e", TARGET_NONE, "" }, \
- {"2e", SELECT_SH2E, "Generate SH2e code" },
-#endif
-#ifndef TARGET_SWITCH_SH2A
-#define TARGET_SWITCH_SH2A \
- {"2a", TARGET_NONE, "" }, \
- {"2a", SELECT_SH2A, "Generate SH2a code" },
-#endif
-#ifndef TARGET_SWITCH_SH2A_SINGLE_ONLY
-#define TARGET_SWITCH_SH2A_SINGLE_ONLY \
- {"2a-single-only", TARGET_NONE, "" }, \
- {"2a-single-only", SELECT_SH2A_SINGLE_ONLY, "Generate only single-precision SH2a code" },
-#endif
-#ifndef TARGET_SWITCH_SH2A_SINGLE
-#define TARGET_SWITCH_SH2A_SINGLE \
- {"2a-single", TARGET_NONE, "" }, \
- {"2a-single", SELECT_SH2A_SINGLE, "Generate default single-precision SH2a code" },
-#endif
-#ifndef TARGET_SWITCH_SH2A_NOFPU
-#define TARGET_SWITCH_SH2A_NOFPU \
- {"2a-nofpu", TARGET_NONE, "" }, \
- {"2a-nofpu", SELECT_SH2A_NOFPU, "Generate SH2a FPU-less code" },
-#endif
-#ifndef TARGET_SWITCH_SH3
-#define TARGET_SWITCH_SH3 \
- {"3", TARGET_NONE, "" }, \
- {"3", SELECT_SH3, "Generate SH3 code" },
-#endif
-#ifndef TARGET_SWITCH_SH3E
-#define TARGET_SWITCH_SH3E \
- {"3e", TARGET_NONE, "" }, \
- {"3e", SELECT_SH3E, "Generate SH3e code" },
-#endif
-#ifndef TARGET_SWITCH_SH4_SINGLE_ONLY
-#define TARGET_SWITCH_SH4_SINGLE_ONLY \
- {"4-single-only", TARGET_NONE, "" }, \
- {"4-single-only", SELECT_SH4_SINGLE_ONLY, "Generate only single-precision SH4 code" },
-#endif
-#ifndef TARGET_SWITCH_SH4_SINGLE
-#define TARGET_SWITCH_SH4_SINGLE \
- {"4-single", TARGET_NONE, "" }, \
- {"4-single", SELECT_SH4_SINGLE, "Generate default single-precision SH4 code" },
-#endif
-#ifndef TARGET_SWITCH_SH4_NOFPU
-#define TARGET_SWITCH_SH4_NOFPU \
- {"4-nofpu", TARGET_NONE, "" }, \
- {"4-nofpu", SELECT_SH4_NOFPU, "Generate SH4 FPU-less code" },
-#endif
-#ifndef TARGET_SWITCH_SH4
-#define TARGET_SWITCH_SH4 \
- {"4", TARGET_NONE, "" }, \
- {"4", SELECT_SH4, "Generate SH4 code" },
-#endif
-#ifndef TARGET_SWITCH_SH4A
-#define TARGET_SWITCH_SH4A \
- {"4a", TARGET_NONE, "" }, \
- {"4a", SELECT_SH4A, "Generate SH4a code" },
-#endif
-#ifndef TARGET_SWITCH_SH4A_SINGLE_ONLY
-#define TARGET_SWITCH_SH4A_SINGLE_ONLY \
- {"4a-single-only", TARGET_NONE, "" }, \
- {"4a-single-only", SELECT_SH4A_SINGLE_ONLY, "Generate only single-precision SH4a code" },
-#endif
-#ifndef TARGET_SWITCH_SH4A_SINGLE
-#define TARGET_SWITCH_SH4A_SINGLE \
- {"4a-single", TARGET_NONE, "" },\
- {"4a-single", SELECT_SH4A_SINGLE, "Generate default single-precision SH4a code" },
-#endif
-#ifndef TARGET_SWITCH_SH4A_NOFPU
-#define TARGET_SWITCH_SH4A_NOFPU \
- {"4a-nofpu", TARGET_NONE, "" },\
- {"4a-nofpu", SELECT_SH4A_NOFPU, "Generate SH4a FPU-less code" },
-#endif
-#ifndef TARGET_SWITCH_SH4AL
-#define TARGET_SWITCH_SH4AL \
- {"4al", TARGET_NONE, "" },\
- {"4al", SELECT_SH4A_NOFPU, "Generate SH4al-dsp code" },
-#endif
-#ifndef TARGET_SWITCH_SH5_64MEDIA
-#define TARGET_SWITCH_SH5_64MEDIA \
- {"5-64media", TARGET_NONE, "" }, \
- {"5-64media", SELECT_SH5_64MEDIA, "Generate 64-bit SHmedia code" },
-#endif
-#ifndef TARGET_SWITCH_SH5_64MEDIA_NOFPU
-#define TARGET_SWITCH_SH5_64MEDIA_NOFPU \
- {"5-64media-nofpu", TARGET_NONE, "" }, \
- {"5-64media-nofpu", SELECT_SH5_64MEDIA_NOFPU, "Generate 64-bit FPU-less SHmedia code" },
-#endif
-#ifndef TARGET_SWITCHES_SH5_32MEDIA
-#define TARGET_SWITCHES_SH5_32MEDIA \
- {"5-32media", TARGET_NONE, "" }, \
- {"5-32media", SELECT_SH5_32MEDIA, "Generate 32-bit SHmedia code" }, \
- {"5-compact", TARGET_NONE, "" }, \
- {"5-compact", SELECT_SH5_COMPACT, "Generate SHcompact code" },
-#endif
-#ifndef TARGET_SWITCHES_SH5_32MEDIA_NOFPU
-#define TARGET_SWITCHES_SH5_32MEDIA_NOFPU \
- {"5-32media-nofpu", TARGET_NONE, "" }, \
- {"5-32media-nofpu", SELECT_SH5_32MEDIA_NOFPU, "Generate 32-bit FPU-less SHmedia code" }, \
- {"5-compact-nofpu", TARGET_NONE, "" }, \
- {"5-compact-nofpu", SELECT_SH5_COMPACT_NOFPU, "Generate FPU-less SHcompact code" },
-#endif
-
-#ifndef TARGET_SWITCH_SH5_32_ANY_EXTRA
-#define TARGET_SWITCH_SH5_32_ANY_EXTRA \
- {"indexed-addressing", INDEXED_ADDRESS_BIT, "Enable the use of the indexed addressing mode for SHmedia32/SHcompact"}, \
- {"no-indexed-addressing", -INDEXED_ADDRESS_BIT, "Disable the use of the indexed addressing mode for SHmedia32/SHcompact"},
-#endif
-
-#ifndef TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA
-#define TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA \
- {"pt-fixed", PT_FIXED_BIT, "Assume pt* instructions won't trap"}, \
- {"no-pt-fixed", -PT_FIXED_BIT, "Assume pt* instructions may trap"}, \
- {"invalid-symbols",INVALID_SYMBOLS_BIT, "Assume symbols might be invalid"}, \
- {"no-invalid-symbols",-INVALID_SYMBOLS_BIT, "Assume symbols won't be invalid"}, \
- {"adjust-unroll", ADJUST_UNROLL_BIT, "Throttle unrolling to avoid thrashing target registers unless the unroll benefit outweighs this"}, \
- {"no-adjust-unroll", -ADJUST_UNROLL_BIT, "Don't throttle unrolling"},
-#endif
-
-#define TARGET_SWITCHES \
-{ TARGET_SWITCH_SH1 \
- TARGET_SWITCH_SH2 \
- TARGET_SWITCH_SH2A_SINGLE_ONLY \
- TARGET_SWITCH_SH2A_SINGLE \
- TARGET_SWITCH_SH2A_NOFPU \
- TARGET_SWITCH_SH2A \
- TARGET_SWITCH_SH2E \
- TARGET_SWITCH_SH3 \
- TARGET_SWITCH_SH3E \
- TARGET_SWITCH_SH4_SINGLE_ONLY \
- TARGET_SWITCH_SH4_SINGLE \
- TARGET_SWITCH_SH4_NOFPU \
- TARGET_SWITCH_SH4 \
- TARGET_SWITCH_SH4A_SINGLE_ONLY \
- TARGET_SWITCH_SH4A_SINGLE \
- TARGET_SWITCH_SH4A_NOFPU \
- TARGET_SWITCH_SH4A \
- TARGET_SWITCH_SH4AL \
- TARGET_SWITCH_SH5_64MEDIA \
- TARGET_SWITCH_SH5_64MEDIA_NOFPU \
- TARGET_SWITCHES_SH5_32MEDIA \
- TARGET_SWITCHES_SH5_32MEDIA_NOFPU \
- {"b", -LITTLE_ENDIAN_BIT, "Generate code in big endian mode" }, \
- {"bigtable", BIGTABLE_BIT, "Generate 32-bit offsets in switch tables" }, \
- {"dalign", DALIGN_BIT, "Aligns doubles at 64-bit boundaries" }, \
- {"fmovd", FMOVD_BIT, "" }, \
- {"hitachi", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
- {"renesas", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
- {"no-renesas",-HITACHI_BIT,"Follow the GCC calling conventions" }, \
- {"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" }, \
- {"ieee", IEEE_BIT, "Increase the IEEE compliance for floating-point code" }, \
- {"isize", ISIZE_BIT, "Annotate assembler instructions with estimated addresses" }, \
- {"l", LITTLE_ENDIAN_BIT, "Generate code in little endian mode" }, \
- {"no-ieee", -IEEE_BIT, "Opposite of -mieee" }, \
- {"padstruct", PADSTRUCT_BIT, "Make structs a multiple of 4 bytes (warning: ABI altered)" }, \
- {"prefergot", PREFERGOT_BIT, "Emit function-calls using global offset table when generating PIC" }, \
- {"relax", RELAX_BIT, "Shorten address references during linking" }, \
- {"space", SPACE_BIT, "Deprecated. Use -Os instead" }, \
- {"usermode", USERMODE_BIT, "Generate library function call to invalidate instruction cache entries after fixing trampoline" }, \
- TARGET_SWITCH_SH5_32_ANY_EXTRA \
- TARGET_SWITCH_SH5_MEDIA_ANY_EXTRA \
- SUBTARGET_SWITCHES \
- {"", TARGET_DEFAULT, "" } \
-}
-
-/* This are meant to be redefined in the host dependent files */
-#define SUBTARGET_SWITCHES