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gcc/
authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 10 Sep 2008 14:14:28 +0000 (14:14 +0000)
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 10 Sep 2008 14:14:28 +0000 (14:14 +0000)
commitd285275527fcbbf5d366f86195b74e62975abdab
tree403704de95ef03360dd67b260c08c0abce2ccbc0
parentcedee41af78b8d6739a2eca82fa466ccebca610a
gcc/

2008-09-10  H.J. Lu  <hongjiu.lu@intel.com>

PR target/37434:
* config/i386/i386.c (ix86_expand_vector_init_interleave): Force
the even element into register.
(ix86_expand_vector_init_general): Don't use
ix86_expand_vector_init_interleave on V16QImode and V8HImode
if we can't move from GPR to SSE register directly.

gcc/testsuite/

2008-09-10  H.J. Lu  <hongjiu.lu@intel.com>

PR target/37434:
* gcc.target/i386/pr37434-1.c: New.
* gcc.target/i386/pr37434-2.c: Likewise.
* gcc.target/i386/pr37434-3.c: Likewise.
* gcc.target/i386/pr37434-4.c: Likewise.
* gcc.target/i386/sse2-set-v8hi-1a.c: Likewise.
* gcc.target/i386/sse2-set-v8hi-2a.c: Likewise.
* gcc.target/i386/sse4_1-set-v16qi-1a.c: Likewise.
* gcc.target/i386/sse4_1-set-v16qi-2a.c: Likewise.
* gcc.target/i386/sse4_1-set-v16qi-3a.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@140231 138bc75d-0d04-0410-961f-82ee72b054a4
12 files changed:
gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr37434-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/pr37434-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/pr37434-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/pr37434-4.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse2-set-v8hi-1a.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse2-set-v8hi-2a.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-1a.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-2a.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/sse4_1-set-v16qi-3a.c [new file with mode: 0644]