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i965: Remove unused second parameter of brw_print_dirty_count().
[android-x86/external-mesa.git] / src / mesa / drivers / dri / i965 / brw_state_upload.c
index 76ffa0d..500d639 100644 (file)
 
 #include "brw_context.h"
 #include "brw_state.h"
+#include "drivers/common/meta.h"
 #include "intel_batchbuffer.h"
 #include "intel_buffers.h"
 
-/* This is used to initialize brw->state.atoms[].  We could use this
- * list directly except for a single atom, brw_constant_buffer, which
- * has a .dirty value which changes according to the parameters of the
- * current fragment and vertex programs, and so cannot be a static
- * value.
- */
 static const struct brw_tracked_state *gen4_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog, /* must do before GS prog, state base address. */
    &brw_gs_prog, /* must do before state base address */
    &brw_clip_prog, /* must do before state base address */
@@ -63,15 +55,19 @@ static const struct brw_tracked_state *gen4_atoms[] =
    &brw_cc_vp,
    &brw_cc_unit,
 
-   &brw_vs_constants, /* Before vs_surfaces and constant_buffer */
-   &brw_wm_constants, /* Before wm_surfaces and constant_buffer */
-
-   &brw_vs_surfaces,           /* must do before unit */
-   &brw_wm_constant_surface,   /* must do before wm surfaces/bind bo */
-   &brw_wm_surfaces,           /* must do before samplers and unit */
+   /* Surface state setup.  Must come before the VS/WM unit.  The binding
+    * table upload must be last.
+    */
+   &brw_vs_pull_constants,
+   &brw_wm_pull_constants,
+   &brw_renderbuffer_surfaces,
+   &brw_texture_surfaces,
+   &brw_vs_binding_table,
    &brw_wm_binding_table,
-   &brw_wm_samplers,
 
+   &brw_samplers,
+
+   /* These set up state for brw_psp_urb_cbs */
    &brw_wm_unit,
    &brw_sf_vp,
    &brw_sf_unit,
@@ -81,7 +77,7 @@ static const struct brw_tracked_state *gen4_atoms[] =
 
    /* Command packets:
     */
-   &brw_invarient_state,
+   &brw_invariant_state,
    &brw_state_base_address,
 
    &brw_binding_table_pointers,
@@ -107,9 +103,6 @@ static const struct brw_tracked_state *gen4_atoms[] =
 
 static const struct brw_tracked_state *gen6_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog, /* must do before state base address */
    &brw_gs_prog, /* must do before state base address */
    &brw_wm_prog, /* must do before state base address */
@@ -118,7 +111,7 @@ static const struct brw_tracked_state *gen6_atoms[] =
    &gen6_sf_vp,
 
    /* Command packets: */
-   &brw_invarient_state,
+   &brw_invariant_state,
 
    /* must do before binding table pointers, cc state ptrs */
    &brw_state_base_address,
@@ -132,18 +125,26 @@ static const struct brw_tracked_state *gen6_atoms[] =
    &gen6_depth_stencil_state,  /* must do before cc unit */
    &gen6_cc_state_pointers,
 
-   &brw_vs_constants, /* Before vs_surfaces and constant_buffer */
-   &brw_wm_constants, /* Before wm_surfaces and constant_buffer */
-   &gen6_vs_constants, /* Before vs_state */
-   &gen6_wm_constants, /* Before wm_state */
+   &gen6_vs_push_constants, /* Before vs_state */
+   &gen6_wm_push_constants, /* Before wm_state */
 
-   &brw_vs_surfaces,           /* must do before unit */
-   &brw_wm_constant_surface,   /* must do before wm surfaces/bind bo */
-   &brw_wm_surfaces,           /* must do before samplers and unit */
+   /* Surface state setup.  Must come before the VS/WM unit.  The binding
+    * table upload must be last.
+    */
+   &brw_vs_pull_constants,
+   &brw_vs_ubo_surfaces,
+   &brw_wm_pull_constants,
+   &brw_wm_ubo_surfaces,
+   &gen6_renderbuffer_surfaces,
+   &brw_texture_surfaces,
+   &gen6_sol_surface,
+   &brw_vs_binding_table,
+   &gen6_gs_binding_table,
    &brw_wm_binding_table,
 
-   &brw_wm_samplers,
+   &brw_samplers,
    &gen6_sampler_state,
+   &gen6_multisample_state,
 
    &gen6_vs_state,
    &gen6_gs_state,
@@ -170,17 +171,14 @@ static const struct brw_tracked_state *gen6_atoms[] =
    &brw_vertices,
 };
 
-const struct brw_tracked_state *gen7_atoms[] =
+static const struct brw_tracked_state *gen7_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog,
-   &brw_gs_prog,
    &brw_wm_prog,
 
    /* Command packets: */
-   &brw_invarient_state,
+   &brw_invariant_state,
+   &gen7_push_constant_alloc,
 
    /* must do before binding table pointers, cc state ptrs */
    &brw_state_base_address,
@@ -197,20 +195,27 @@ const struct brw_tracked_state *gen7_atoms[] =
    &gen7_cc_state_pointer,
    &gen7_depth_stencil_state_pointer,
 
-   &brw_vs_constants, /* Before vs_surfaces and constant_buffer */
-   &brw_wm_constants, /* Before wm_surfaces and constant_buffer */
-   &gen6_vs_constants, /* Before vs_state */
-   &gen7_wm_constants, /* Before wm_surfaces and constant_buffer */
+   &gen6_vs_push_constants, /* Before vs_state */
+   &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
 
-   &brw_vs_surfaces,           /* must do before unit */
-   &gen7_wm_constant_surface,  /* must do before wm surfaces/bind bo */
-   &gen7_wm_surfaces,          /* must do before samplers and unit */
+   /* Surface state setup.  Must come before the VS/WM unit.  The binding
+    * table upload must be last.
+    */
+   &brw_vs_pull_constants,
+   &brw_vs_ubo_surfaces,
+   &brw_wm_pull_constants,
+   &brw_wm_ubo_surfaces,
+   &gen6_renderbuffer_surfaces,
+   &brw_texture_surfaces,
+   &brw_vs_binding_table,
    &brw_wm_binding_table,
 
    &gen7_samplers,
+   &gen6_multisample_state,
 
    &gen7_disable_stages,
    &gen7_vs_state,
+   &gen7_sol_state,
    &gen7_clip_state,
    &gen7_sbe_state,
    &gen7_sf_state,
@@ -232,6 +237,8 @@ const struct brw_tracked_state *gen7_atoms[] =
    &brw_indices,
    &brw_index_buffer,
    &brw_vertices,
+
+   &haswell_cut_index,
 };
 
 
@@ -253,19 +260,16 @@ void brw_init_state( struct brw_context *brw )
       num_atoms = ARRAY_SIZE(gen4_atoms);
    }
 
+   brw->atoms = atoms;
+   brw->num_atoms = num_atoms;
+
    while (num_atoms--) {
       assert((*atoms)->dirty.mesa |
             (*atoms)->dirty.brw |
             (*atoms)->dirty.cache);
-
-      if ((*atoms)->prepare)
-        brw->prepare_atoms[brw->num_prepare_atoms++] = **atoms;
-      if ((*atoms)->emit)
-        brw->emit_atoms[brw->num_emit_atoms++] = **atoms;
+      assert((*atoms)->emit);
       atoms++;
    }
-   assert(brw->num_emit_atoms <= ARRAY_SIZE(brw->emit_atoms));
-   assert(brw->num_prepare_atoms <= ARRAY_SIZE(brw->prepare_atoms));
 }
 
 
@@ -303,19 +307,6 @@ static void xor_states( struct brw_state_flags *result,
    result->cache = a->cache ^ b->cache;
 }
 
-void
-brw_clear_validated_bos(struct brw_context *brw)
-{
-   int i;
-
-   /* Clear the last round of validated bos */
-   for (i = 0; i < brw->state.validated_bo_count; i++) {
-      drm_intel_bo_unreference(brw->state.validated_bos[i]);
-      brw->state.validated_bos[i] = NULL;
-   }
-   brw->state.validated_bo_count = 0;
-}
-
 struct dirty_bit_map {
    uint32_t bit;
    char *name;
@@ -344,7 +335,6 @@ static struct dirty_bit_map mesa_bits[] = {
    DEFINE_BIT(_NEW_TEXTURE),
    DEFINE_BIT(_NEW_TRANSFORM),
    DEFINE_BIT(_NEW_VIEWPORT),
-   DEFINE_BIT(_NEW_PACKUNPACK),
    DEFINE_BIT(_NEW_ARRAY),
    DEFINE_BIT(_NEW_RENDERMODE),
    DEFINE_BIT(_NEW_BUFFERS),
@@ -352,6 +342,9 @@ static struct dirty_bit_map mesa_bits[] = {
    DEFINE_BIT(_NEW_TRACK_MATRIX),
    DEFINE_BIT(_NEW_PROGRAM),
    DEFINE_BIT(_NEW_PROGRAM_CONSTANTS),
+   DEFINE_BIT(_NEW_BUFFER_OBJECT),
+   DEFINE_BIT(_NEW_FRAG_CLAMP),
+   DEFINE_BIT(_NEW_VARYING_VP_INPUTS),
    {0, 0, 0}
 };
 
@@ -359,32 +352,34 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_URB_FENCE),
    DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
    DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
-   DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS),
    DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
    DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
    DEFINE_BIT(BRW_NEW_PRIMITIVE),
    DEFINE_BIT(BRW_NEW_CONTEXT),
-   DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
-   DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
    DEFINE_BIT(BRW_NEW_PSP),
-   DEFINE_BIT(BRW_NEW_WM_SURFACES),
+   DEFINE_BIT(BRW_NEW_SURFACES),
+   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
    DEFINE_BIT(BRW_NEW_INDICES),
-   DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VERTICES),
    DEFINE_BIT(BRW_NEW_BATCH),
-   DEFINE_BIT(BRW_NEW_NR_WM_SURFACES),
-   DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
+   DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
-   DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
-   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
-   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
-   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
    DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
+   DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT),
+   DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK),
+   DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD),
+   DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
+   DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
    {0, 0, 0}
 };
 
 static struct dirty_bit_map cache_bits[] = {
    DEFINE_BIT(CACHE_NEW_BLEND_STATE),
+   DEFINE_BIT(CACHE_NEW_DEPTH_STENCIL_STATE),
+   DEFINE_BIT(CACHE_NEW_COLOR_CALC_STATE),
    DEFINE_BIT(CACHE_NEW_CC_VP),
    DEFINE_BIT(CACHE_NEW_CC_UNIT),
    DEFINE_BIT(CACHE_NEW_WM_PROG),
@@ -419,7 +414,7 @@ brw_update_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
 }
 
 static void
-brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
+brw_print_dirty_count(struct dirty_bit_map *bit_map)
 {
    int i;
 
@@ -435,21 +430,19 @@ brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
 /***********************************************************************
  * Emit all state:
  */
-void brw_validate_state( struct brw_context *brw )
+void brw_upload_state(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->intel.ctx;
    struct intel_context *intel = &brw->intel;
    struct brw_state_flags *state = &brw->state.dirty;
-   const struct brw_tracked_state *atoms = brw->prepare_atoms;
-   int num_atoms = brw->num_prepare_atoms;
-   GLuint i;
-
-   brw_clear_validated_bos(brw);
+   int i;
+   static int dirty_count = 0;
 
    state->mesa |= brw->intel.NewGLState;
    brw->intel.NewGLState = 0;
 
-   brw_add_validated_bo(brw, intel->batch.bo);
+   state->brw |= ctx->NewDriverState;
+   ctx->NewDriverState = 0;
 
    if (brw->emit_state_always) {
       state->mesa |= ~0;
@@ -467,50 +460,16 @@ void brw_validate_state( struct brw_context *brw )
       brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
    }
 
+   if (brw->meta_in_progress != _mesa_meta_in_progress(ctx)) {
+      brw->meta_in_progress = _mesa_meta_in_progress(ctx);
+      brw->state.dirty.brw |= BRW_NEW_META_IN_PROGRESS;
+   }
+
    if ((state->mesa | state->cache | state->brw) == 0)
       return;
 
-   brw->intel.Fallback = GL_FALSE; /* boolean, not bitfield */
-
-   /* do prepare stage for all atoms */
-   for (i = 0; i < num_atoms; i++) {
-      const struct brw_tracked_state *atom = &atoms[i];
-
-      if (check_state(state, &atom->dirty)) {
-        atom->prepare(brw);
-
-        if (brw->intel.Fallback)
-           break;
-      }
-   }
-
    intel_check_front_buffer_rendering(intel);
 
-   /* Make sure that the textures which are referenced by the current
-    * brw fragment program are actually present/valid.
-    * If this fails, we can experience GPU lock-ups.
-    */
-   {
-      const struct brw_fragment_program *fp;
-      fp = brw_fragment_program_const(brw->fragment_program);
-      if (fp) {
-         assert((fp->tex_units_used & ctx->Texture._EnabledUnits)
-                == fp->tex_units_used);
-      }
-   }
-}
-
-
-void brw_upload_state(struct brw_context *brw)
-{
-   struct brw_state_flags *state = &brw->state.dirty;
-   const struct brw_tracked_state *atoms = brw->emit_atoms;
-   int num_atoms = brw->num_emit_atoms;
-   int i;
-   static int dirty_count = 0;
-
-   brw_clear_validated_bos(brw);
-
    if (unlikely(INTEL_DEBUG)) {
       /* Debug version which enforces various sanity checks on the
        * state flags which are generated and checked to help ensure
@@ -520,13 +479,10 @@ void brw_upload_state(struct brw_context *brw)
       memset(&examined, 0, sizeof(examined));
       prev = *state;
 
-      for (i = 0; i < num_atoms; i++) {
-        const struct brw_tracked_state *atom = &atoms[i];
+      for (i = 0; i < brw->num_atoms; i++) {
+        const struct brw_tracked_state *atom = brw->atoms[i];
         struct brw_state_flags generated;
 
-        if (brw->intel.Fallback)
-           break;
-
         if (check_state(state, &atom->dirty)) {
            atom->emit(brw);
         }
@@ -543,11 +499,8 @@ void brw_upload_state(struct brw_context *brw)
       }
    }
    else {
-      for (i = 0; i < num_atoms; i++) {
-        const struct brw_tracked_state *atom = &atoms[i];
-
-        if (brw->intel.Fallback)
-           break;
+      for (i = 0; i < brw->num_atoms; i++) {
+        const struct brw_tracked_state *atom = brw->atoms[i];
 
         if (check_state(state, &atom->dirty)) {
            atom->emit(brw);
@@ -560,13 +513,12 @@ void brw_upload_state(struct brw_context *brw)
       brw_update_dirty_count(brw_bits, state->brw);
       brw_update_dirty_count(cache_bits, state->cache);
       if (dirty_count++ % 1000 == 0) {
-        brw_print_dirty_count(mesa_bits, state->mesa);
-        brw_print_dirty_count(brw_bits, state->brw);
-        brw_print_dirty_count(cache_bits, state->cache);
+        brw_print_dirty_count(mesa_bits);
+        brw_print_dirty_count(brw_bits);
+        brw_print_dirty_count(cache_bits);
         fprintf(stderr, "\n");
       }
    }
 
-   if (!brw->intel.Fallback)
-      memset(state, 0, sizeof(*state));
+   memset(state, 0, sizeof(*state));
 }