i965: Remove unused second parameter of brw_print_dirty_count().

[android-x86/external-mesa.git] / src / mesa / drivers / dri / i965 / brw_state_upload.c

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 12535ed..500d639 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -33,20 +33,12 @@
 
 #include "brw_context.h"
 #include "brw_state.h"
+#include "drivers/common/meta.h"
 #include "intel_batchbuffer.h"
 #include "intel_buffers.h"
 
-/* This is used to initialize brw->state.atoms[].  We could use this
- * list directly except for a single atom, brw_constant_buffer, which
- * has a .dirty value which changes according to the parameters of the
- * current fragment and vertex programs, and so cannot be a static
- * value.
- */
 static const struct brw_tracked_state *gen4_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog, /* must do before GS prog, state base address. */
    &brw_gs_prog, /* must do before state base address */
    &brw_clip_prog, /* must do before state base address */
@@ -111,9 +103,6 @@ static const struct brw_tracked_state *gen4_atoms[] =
 
 static const struct brw_tracked_state *gen6_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog, /* must do before state base address */
    &brw_gs_prog, /* must do before state base address */
    &brw_wm_prog, /* must do before state base address */
@@ -143,7 +132,9 @@ static const struct brw_tracked_state *gen6_atoms[] =
     * table upload must be last.
     */
    &brw_vs_pull_constants,
+   &brw_vs_ubo_surfaces,
    &brw_wm_pull_constants,
+   &brw_wm_ubo_surfaces,
    &gen6_renderbuffer_surfaces,
    &brw_texture_surfaces,
    &gen6_sol_surface,
@@ -175,17 +166,13 @@ static const struct brw_tracked_state *gen6_atoms[] =
 
    &brw_drawing_rect,
 
-   &gen6_sol_indices,
    &brw_indices,
    &brw_index_buffer,
    &brw_vertices,
 };
 
-const struct brw_tracked_state *gen7_atoms[] =
+static const struct brw_tracked_state *gen7_atoms[] =
 {
-   &brw_check_fallback,
-
-   &brw_wm_input_sizes,
    &brw_vs_prog,
    &brw_wm_prog,
 
@@ -215,7 +202,9 @@ const struct brw_tracked_state *gen7_atoms[] =
     * table upload must be last.
     */
    &brw_vs_pull_constants,
+   &brw_vs_ubo_surfaces,
    &brw_wm_pull_constants,
+   &brw_wm_ubo_surfaces,
    &gen6_renderbuffer_surfaces,
    &brw_texture_surfaces,
    &brw_vs_binding_table,
@@ -248,6 +237,8 @@ const struct brw_tracked_state *gen7_atoms[] =
    &brw_indices,
    &brw_index_buffer,
    &brw_vertices,
+
+   &haswell_cut_index,
 };
 
 
@@ -344,7 +335,6 @@ static struct dirty_bit_map mesa_bits[] = {
    DEFINE_BIT(_NEW_TEXTURE),
    DEFINE_BIT(_NEW_TRANSFORM),
    DEFINE_BIT(_NEW_VIEWPORT),
-   DEFINE_BIT(_NEW_PACKUNPACK),
    DEFINE_BIT(_NEW_ARRAY),
    DEFINE_BIT(_NEW_RENDERMODE),
    DEFINE_BIT(_NEW_BUFFERS),
@@ -352,6 +342,9 @@ static struct dirty_bit_map mesa_bits[] = {
    DEFINE_BIT(_NEW_TRACK_MATRIX),
    DEFINE_BIT(_NEW_PROGRAM),
    DEFINE_BIT(_NEW_PROGRAM_CONSTANTS),
+   DEFINE_BIT(_NEW_BUFFER_OBJECT),
+   DEFINE_BIT(_NEW_FRAG_CLAMP),
+   DEFINE_BIT(_NEW_VARYING_VP_INPUTS),
    {0, 0, 0}
 };
 
@@ -359,29 +352,34 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_URB_FENCE),
    DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
    DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
-   DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS),
    DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
    DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
    DEFINE_BIT(BRW_NEW_PRIMITIVE),
    DEFINE_BIT(BRW_NEW_CONTEXT),
-   DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
-   DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
    DEFINE_BIT(BRW_NEW_PSP),
    DEFINE_BIT(BRW_NEW_SURFACES),
+   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
    DEFINE_BIT(BRW_NEW_INDICES),
-   DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VERTICES),
    DEFINE_BIT(BRW_NEW_BATCH),
+   DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
-   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
-   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
-   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
    DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
+   DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT),
+   DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK),
+   DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD),
+   DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
+   DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
    {0, 0, 0}
 };
 
 static struct dirty_bit_map cache_bits[] = {
    DEFINE_BIT(CACHE_NEW_BLEND_STATE),
+   DEFINE_BIT(CACHE_NEW_DEPTH_STENCIL_STATE),
+   DEFINE_BIT(CACHE_NEW_COLOR_CALC_STATE),
    DEFINE_BIT(CACHE_NEW_CC_VP),
    DEFINE_BIT(CACHE_NEW_CC_UNIT),
    DEFINE_BIT(CACHE_NEW_WM_PROG),
@@ -416,7 +414,7 @@ brw_update_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
 }
 
 static void
-brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
+brw_print_dirty_count(struct dirty_bit_map *bit_map)
 {
    int i;
 
@@ -443,6 +441,9 @@ void brw_upload_state(struct brw_context *brw)
    state->mesa |= brw->intel.NewGLState;
    brw->intel.NewGLState = 0;
 
+   state->brw |= ctx->NewDriverState;
+   ctx->NewDriverState = 0;
+
    if (brw->emit_state_always) {
       state->mesa |= ~0;
       state->brw |= ~0;
@@ -459,11 +460,14 @@ void brw_upload_state(struct brw_context *brw)
       brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
    }
 
+   if (brw->meta_in_progress != _mesa_meta_in_progress(ctx)) {
+      brw->meta_in_progress = _mesa_meta_in_progress(ctx);
+      brw->state.dirty.brw |= BRW_NEW_META_IN_PROGRESS;
+   }
+
    if ((state->mesa | state->cache | state->brw) == 0)
       return;
 
-   brw->intel.Fallback = false; /* boolean, not bitfield */
-
    intel_check_front_buffer_rendering(intel);
 
    if (unlikely(INTEL_DEBUG)) {
@@ -479,9 +483,6 @@ void brw_upload_state(struct brw_context *brw)
         const struct brw_tracked_state *atom = brw->atoms[i];
         struct brw_state_flags generated;
 
-        if (brw->intel.Fallback)
-           break;
-
         if (check_state(state, &atom->dirty)) {
            atom->emit(brw);
         }
@@ -501,9 +502,6 @@ void brw_upload_state(struct brw_context *brw)
       for (i = 0; i < brw->num_atoms; i++) {
         const struct brw_tracked_state *atom = brw->atoms[i];
 
-        if (brw->intel.Fallback)
-           break;
-
         if (check_state(state, &atom->dirty)) {
            atom->emit(brw);
         }
@@ -515,13 +513,12 @@ void brw_upload_state(struct brw_context *brw)
       brw_update_dirty_count(brw_bits, state->brw);
       brw_update_dirty_count(cache_bits, state->cache);
       if (dirty_count++ % 1000 == 0) {
-        brw_print_dirty_count(mesa_bits, state->mesa);
-        brw_print_dirty_count(brw_bits, state->brw);
-        brw_print_dirty_count(cache_bits, state->cache);
+        brw_print_dirty_count(mesa_bits);
+        brw_print_dirty_count(brw_bits);
+        brw_print_dirty_count(cache_bits);
         fprintf(stderr, "\n");
       }
    }
 
-   if (!brw->intel.Fallback)
-      memset(state, 0, sizeof(*state));
+   memset(state, 0, sizeof(*state));
 }