wr_tmp[wr_num++] = GET_REGNUM(MATCH_BYTE);
}
enabled = ((data & 0x40) != 0);
+ // RDY signal sense is a LEVEL, not an EDDGE (thanks Mr.Sato)
+ if(now_ready() && INT_ON_READY) {
+ request_intr(INT_RDY);
+ update_intr();
+ }
} else if((data & 0x83) == 0x81) {
//#ifdef DMA_DEBUG
if(_DMA_DEBUG) this->out_debug_log(_T("Z80DMA: WR4=%2x\n"), data);
// run command
switch (data) {
case CMD_ENABLE_AFTER_RETI:
+ enalbe_after_reti = true;
break;
case CMD_READ_STATUS_BYTE:
// force to read status (from Xmillenium)
case CMD_RESET:
enabled = false;
force_ready = false;
+ enalbe_after_reti = false;
req_intr = in_service = false;
update_intr();
status = 0x30;
void Z80DMA::do_dma()
{
- if(!enabled) {
+ if(!enabled || (enalbe_after_reti && in_service)) {
return;
}
bool occured = false;
// detect RETI
if(in_service) {
in_service = false;
+ enalbe_after_reti = false;
update_intr();
return;
}
return true;
}
-#define STATE_VERSION 2
+#define STATE_VERSION 3
bool Z80DMA::process_state(FILEIO* state_fio, bool loading)
{
state_fio->StateValue(enabled);
state_fio->StateValue(ready);
state_fio->StateValue(force_ready);
+ state_fio->StateValue(enalbe_after_reti);
state_fio->StateValue(addr_a);
state_fio->StateValue(addr_b);
state_fio->StateValue(upcount);