return SHIFT_COUNT_TRUNCATED ? GET_MODE_BITSIZE (mode) - 1 : 0;
}
+/* The default implementation of TARGET_MIN_DIVISIONS_FOR_RECIP_MUL. */
+
+unsigned int
+default_min_divisions_for_recip_mul (enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+ return have_insn_for (DIV, mode) ? 3 : 2;
+}
+
/* Generic hook that takes a CUMULATIVE_ARGS pointer and returns true. */
bool
return true;
return false;
+ case MODE_DECIMAL_FLOAT:
+ return false;
+
default:
gcc_unreachable ();
}
}
+/* True if the target supports decimal floating point. */
+
+bool
+default_decimal_float_supported_p (void)
+{
+ return ENABLE_DECIMAL_FLOAT;
+}
+
/* NULL if INSN insn is valid within a low-overhead loop, otherwise returns
an error message.
return 0;
}
+void
+hook_void_bitmap (bitmap regs ATTRIBUTE_UNUSED)
+{
+}
+
const char *
hook_invalid_arg_for_unprototyped_fn (
tree typelist ATTRIBUTE_UNUSED,
TREE_NOTHROW (t) = 1;
DECL_ARTIFICIAL (t) = 1;
DECL_IGNORED_P (t) = 1;
+ DECL_VISIBILITY (t) = VISIBILITY_DEFAULT;
+ DECL_VISIBILITY_SPECIFIED (t) = 1;
stack_chk_fail_decl = t;
}
}
scratch_constraint = insn_data[(int) icode].operand[2].constraint;
- /* The scratch register's constraint must start with "=&". */
+ /* The scratch register's constraint must start with "=&",
+ except for an input reload, where only "=" is necessary,
+ and where it might be beneficial to re-use registers from
+ the input. */
gcc_assert (scratch_constraint[0] == '='
- && scratch_constraint[1] == '&');
- scratch_constraint += 2;
+ && (in_p || scratch_constraint[1] == '&'));
+ scratch_constraint++;
+ if (*scratch_constraint == '&')
+ scratch_constraint++;
scratch_letter = *scratch_constraint;
scratch_class
= (scratch_letter == 'r' ? GENERAL_REGS
return class;
}
+
+/* If STRICT_ALIGNMENT is true we use the container type for accessing
+ volatile bitfields. This is generally the preferred behavior for memory
+ mapped peripherals on RISC architectures.
+ If STRICT_ALIGNMENT is false we use the narrowest type possible. This
+ is typically used to avoid spurious page faults and extra memory accesses
+ due to unaligned accesses on CISC architectures. */
+
+bool
+default_narrow_bitfield (void)
+{
+ return !STRICT_ALIGNMENT;
+}
+
#include "gt-targhooks.h"