/* RTL simplification functions for GNU compiler.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
This file is part of GCC.
#include "config.h"
#include "system.h"
-
+#include "coretypes.h"
+#include "tm.h"
#include "rtl.h"
+#include "tree.h"
#include "tm_p.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "toplev.h"
#include "output.h"
#include "ggc.h"
+#include "target.h"
/* Simplification and canonicalization of RTL. */
-/* Nonzero if X has the form (PLUS frame-pointer integer). We check for
- virtual regs here because the simplify_*_operation routines are called
- by integrate.c, which is called before virtual register instantiation.
-
- ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
- a header file so that their definitions can be shared with the
- simplification routines in simplify-rtx.c. Until then, do not
- change these macros without also changing the copy in simplify-rtx.c. */
-
-#define FIXED_BASE_PLUS_P(X) \
- ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
- || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
- || (X) == virtual_stack_vars_rtx \
- || (X) == virtual_incoming_args_rtx \
- || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
- && (XEXP (X, 0) == frame_pointer_rtx \
- || XEXP (X, 0) == hard_frame_pointer_rtx \
- || ((X) == arg_pointer_rtx \
- && fixed_regs[ARG_POINTER_REGNUM]) \
- || XEXP (X, 0) == virtual_stack_vars_rtx \
- || XEXP (X, 0) == virtual_incoming_args_rtx)) \
- || GET_CODE (X) == ADDRESSOF)
-
-/* Similar, but also allows reference to the stack pointer.
-
- This used to include FIXED_BASE_PLUS_P, however, we can't assume that
- arg_pointer_rtx by itself is nonzero, because on at least one machine,
- the i960, the arg pointer is zero when it is unused. */
-
-#define NONZERO_BASE_PLUS_P(X) \
- ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
- || (X) == virtual_stack_vars_rtx \
- || (X) == virtual_incoming_args_rtx \
- || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
- && (XEXP (X, 0) == frame_pointer_rtx \
- || XEXP (X, 0) == hard_frame_pointer_rtx \
- || ((X) == arg_pointer_rtx \
- && fixed_regs[ARG_POINTER_REGNUM]) \
- || XEXP (X, 0) == virtual_stack_vars_rtx \
- || XEXP (X, 0) == virtual_incoming_args_rtx)) \
- || (X) == stack_pointer_rtx \
- || (X) == virtual_stack_dynamic_rtx \
- || (X) == virtual_outgoing_args_rtx \
- || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
- && (XEXP (X, 0) == stack_pointer_rtx \
- || XEXP (X, 0) == virtual_stack_dynamic_rtx \
- || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
- || GET_CODE (X) == ADDRESSOF)
-
/* Much code operates on (low, high) pairs; the low value is an
unsigned wide int, the high value a signed wide int. We
occasionally need to sign extend from low to high as if low were a
static rtx simplify_plus_minus PARAMS ((enum rtx_code,
enum machine_mode, rtx,
rtx, int));
-static void check_fold_consts PARAMS ((PTR));
-static void simplify_unary_real PARAMS ((PTR));
-static void simplify_binary_real PARAMS ((PTR));
-static void simplify_binary_is2orm1 PARAMS ((PTR));
-
\f
/* Negate a CONST_INT rtx, truncating (because a conversion from a
maximally negative number can overflow). */
}
\f
-/* Make a binary operation by properly ordering the operands and
+/* Make a binary operation by properly ordering the operands and
seeing if the expression folds. */
rtx
avoid_constant_pool_reference (x)
rtx x;
{
- rtx c, addr;
+ rtx c, tmp, addr;
enum machine_mode cmode;
- if (GET_CODE (x) != MEM)
- return x;
+ switch (GET_CODE (x))
+ {
+ case MEM:
+ break;
+
+ case FLOAT_EXTEND:
+ /* Handle float extensions of constant pool references. */
+ tmp = XEXP (x, 0);
+ c = avoid_constant_pool_reference (tmp);
+ if (c != tmp && GET_CODE (c) == CONST_DOUBLE)
+ {
+ REAL_VALUE_TYPE d;
+
+ REAL_VALUE_FROM_CONST_DOUBLE (d, c);
+ return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
+ }
+ return x;
+
+ default:
+ return x;
+ }
+
addr = XEXP (x, 0);
+ /* Call target hook to avoid the effects of -fpic etc... */
+ addr = (*targetm.delegitimize_address) (addr);
+
+ if (GET_CODE (addr) == LO_SUM)
+ addr = XEXP (addr, 1);
+
if (GET_CODE (addr) != SYMBOL_REF
|| ! CONSTANT_POOL_ADDRESS_P (addr))
return x;
if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
return tem;
+ /* For the following tests, ensure const0_rtx is op1. */
+ if (op0 == const0_rtx && swap_commutative_operands_p (op0, op1))
+ tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
+
+ /* If op0 is a compare, extract the comparison arguments from it. */
+ if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
+ op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
+
+ /* If op0 is a comparison, extract the comparison arguments form it. */
+ if (code == NE && op1 == const0_rtx
+ && GET_RTX_CLASS (GET_CODE (op0)) == '<')
+ return op0;
+ else if (code == EQ && op1 == const0_rtx)
+ {
+ /* The following tests GET_RTX_CLASS (GET_CODE (op0)) == '<'. */
+ enum rtx_code new = reversed_comparison_code (op0, NULL_RTX);
+ if (new != UNKNOWN)
+ {
+ code = new;
+ mode = cmp_mode;
+ op1 = XEXP (op0, 1);
+ op0 = XEXP (op0, 0);
+ }
+ }
+
/* Put complex operands first and constants second. */
if (swap_commutative_operands_p (op0, op1))
tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
return
- simplify_gen_ternary (code, mode,
+ simplify_gen_ternary (code, mode,
(op_mode != VOIDmode
? op_mode
: GET_MODE (op0)),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
if (exp)
- x = exp;
+ x = exp;
}
return x;
- default:
- if (GET_CODE (x) == MEM)
- return
- replace_equiv_address_nv (x,
- simplify_replace_rtx (XEXP (x, 0),
- old, new));
-
- return x;
- }
- return x;
-}
-\f
-/* Subroutine of simplify_unary_operation, called via do_float_handler.
- Handles simplification of unary ops on floating point values. */
-struct simplify_unary_real_args
-{
- rtx operand;
- rtx result;
- enum machine_mode mode;
- enum rtx_code code;
- bool want_integer;
-};
-#define REAL_VALUE_ABS(d_) \
- (REAL_VALUE_NEGATIVE (d_) ? REAL_VALUE_NEGATE (d_) : (d_))
-
-static void
-simplify_unary_real (p)
- PTR p;
-{
- REAL_VALUE_TYPE d;
-
- struct simplify_unary_real_args *args =
- (struct simplify_unary_real_args *) p;
-
- REAL_VALUE_FROM_CONST_DOUBLE (d, args->operand);
+ case 'o':
+ if (code == MEM)
+ return replace_equiv_address_nv (x,
+ simplify_replace_rtx (XEXP (x, 0),
+ old, new));
+ else if (code == LO_SUM)
+ {
+ rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
+ rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
- if (args->want_integer)
- {
- HOST_WIDE_INT i;
+ /* (lo_sum (high x) x) -> x */
+ if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1))
+ return op1;
- switch (args->code)
- {
- case FIX: i = REAL_VALUE_FIX (d); break;
- case UNSIGNED_FIX: i = REAL_VALUE_UNSIGNED_FIX (d); break;
- default:
- abort ();
+ return gen_rtx_LO_SUM (mode, op0, op1);
}
- args->result = gen_int_mode (i, args->mode);
- }
- else
- {
- switch (args->code)
+ else if (code == REG)
{
- case SQRT:
- /* We don't attempt to optimize this. */
- args->result = 0;
- return;
-
- case ABS: d = REAL_VALUE_ABS (d); break;
- case NEG: d = REAL_VALUE_NEGATE (d); break;
- case FLOAT_TRUNCATE: d = real_value_truncate (args->mode, d); break;
- case FLOAT_EXTEND: /* All this does is change the mode. */ break;
- case FIX: d = REAL_VALUE_RNDZINT (d); break;
- case UNSIGNED_FIX: d = REAL_VALUE_UNSIGNED_RNDZINT (d); break;
- default:
- abort ();
+ if (REG_P (old) && REGNO (x) == REGNO (old))
+ return new;
}
- args->result = CONST_DOUBLE_FROM_REAL_VALUE (d, args->mode);
+
+ return x;
+
+ default:
+ return x;
}
+ return x;
}
-
+\f
/* Try to simplify a unary operation CODE whose output mode is to be
MODE with input operand OP whose mode was originally OP_MODE.
Return zero if no simplification can be made. */
unsigned int width = GET_MODE_BITSIZE (mode);
rtx trueop = avoid_constant_pool_reference (op);
+ if (code == VEC_DUPLICATE)
+ {
+ if (!VECTOR_MODE_P (mode))
+ abort ();
+ if (GET_MODE (trueop) != VOIDmode
+ && !VECTOR_MODE_P (GET_MODE (trueop))
+ && GET_MODE_INNER (mode) != GET_MODE (trueop))
+ abort ();
+ if (GET_MODE (trueop) != VOIDmode
+ && VECTOR_MODE_P (GET_MODE (trueop))
+ && GET_MODE_INNER (mode) != GET_MODE_INNER (GET_MODE (trueop)))
+ abort ();
+ if (GET_CODE (trueop) == CONST_INT || GET_CODE (trueop) == CONST_DOUBLE
+ || GET_CODE (trueop) == CONST_VECTOR)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ if (GET_CODE (trueop) != CONST_VECTOR)
+ for (i = 0; i < n_elts; i++)
+ RTVEC_ELT (v, i) = trueop;
+ else
+ {
+ enum machine_mode inmode = GET_MODE (trueop);
+ int in_elt_size = GET_MODE_SIZE (GET_MODE_INNER (inmode));
+ unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
+
+ if (in_n_elts >= n_elts || n_elts % in_n_elts)
+ abort ();
+ for (i = 0; i < n_elts; i++)
+ RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop, i % in_n_elts);
+ }
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+ }
+
+ if (VECTOR_MODE_P (mode) && GET_CODE (trueop) == CONST_VECTOR)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ enum machine_mode opmode = GET_MODE (trueop);
+ int op_elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
+ unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ if (op_n_elts != n_elts)
+ abort ();
+
+ for (i = 0; i < n_elts; i++)
+ {
+ rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
+ CONST_VECTOR_ELT (trueop, i),
+ GET_MODE_INNER (opmode));
+ if (!x)
+ return 0;
+ RTVEC_ELT (v, i) = x;
+ }
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+
/* The order of these tests is critical so that, for example, we don't
check the wrong mode (input vs. output) for a conversion operation,
such as FIX. At some point, this should be simplified. */
val = exact_log2 (arg0 & (- arg0)) + 1;
break;
+ case CLZ:
+ arg0 &= GET_MODE_MASK (mode);
+ if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
+ ;
+ else
+ val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
+ break;
+
+ case CTZ:
+ arg0 &= GET_MODE_MASK (mode);
+ if (arg0 == 0)
+ {
+ /* Even if the value at zero is undefined, we have to come
+ up with some replacement. Seems good enough. */
+ if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
+ val = GET_MODE_BITSIZE (mode);
+ }
+ else
+ val = exact_log2 (arg0 & -arg0);
+ break;
+
+ case POPCOUNT:
+ arg0 &= GET_MODE_MASK (mode);
+ val = 0;
+ while (arg0)
+ val++, arg0 &= arg0 - 1;
+ break;
+
+ case PARITY:
+ arg0 &= GET_MODE_MASK (mode);
+ val = 0;
+ while (arg0)
+ val++, arg0 &= arg0 - 1;
+ val &= 1;
+ break;
+
case TRUNCATE:
val = arg0;
break;
case FFS:
hv = 0;
if (l1 == 0)
- lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
+ {
+ if (h1 == 0)
+ lv = 0;
+ else
+ lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1) + 1;
+ }
+ else
+ lv = exact_log2 (l1 & -l1) + 1;
+ break;
+
+ case CLZ:
+ hv = 0;
+ if (h1 == 0)
+ lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
else
- lv = exact_log2 (l1 & (-l1)) + 1;
+ lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
+ - HOST_BITS_PER_WIDE_INT;
+ break;
+
+ case CTZ:
+ hv = 0;
+ if (l1 == 0)
+ {
+ if (h1 == 0)
+ lv = GET_MODE_BITSIZE (mode);
+ else
+ lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1);
+ }
+ else
+ lv = exact_log2 (l1 & -l1);
+ break;
+
+ case POPCOUNT:
+ hv = 0;
+ lv = 0;
+ while (l1)
+ lv++, l1 &= l1 - 1;
+ while (h1)
+ lv++, h1 &= h1 - 1;
+ break;
+
+ case PARITY:
+ hv = 0;
+ lv = 0;
+ while (l1)
+ lv++, l1 &= l1 - 1;
+ while (h1)
+ lv++, h1 &= h1 - 1;
+ lv &= 1;
break;
case TRUNCATE:
else if (GET_CODE (trueop) == CONST_DOUBLE
&& GET_MODE_CLASS (mode) == MODE_FLOAT)
{
- struct simplify_unary_real_args args;
- args.operand = trueop;
- args.mode = mode;
- args.code = code;
- args.want_integer = false;
+ REAL_VALUE_TYPE d, t;
+ REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
- if (do_float_handler (simplify_unary_real, (PTR) &args))
- return args.result;
+ switch (code)
+ {
+ case SQRT:
+ if (HONOR_SNANS (mode) && real_isnan (&d))
+ return 0;
+ real_sqrt (&t, mode, &d);
+ d = t;
+ break;
+ case ABS:
+ d = REAL_VALUE_ABS (d);
+ break;
+ case NEG:
+ d = REAL_VALUE_NEGATE (d);
+ break;
+ case FLOAT_TRUNCATE:
+ d = real_value_truncate (mode, d);
+ break;
+ case FLOAT_EXTEND:
+ /* All this does is change the mode. */
+ break;
+ case FIX:
+ real_arithmetic (&d, FIX_TRUNC_EXPR, &d, NULL);
+ break;
- return 0;
+ default:
+ abort ();
+ }
+ return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
}
else if (GET_CODE (trueop) == CONST_DOUBLE
&& GET_MODE_CLASS (mode) == MODE_INT
&& width <= HOST_BITS_PER_WIDE_INT && width > 0)
{
- struct simplify_unary_real_args args;
- args.operand = trueop;
- args.mode = mode;
- args.code = code;
- args.want_integer = true;
-
- if (do_float_handler (simplify_unary_real, (PTR) &args))
- return args.result;
-
- return 0;
+ HOST_WIDE_INT i;
+ REAL_VALUE_TYPE d;
+ REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
+ switch (code)
+ {
+ case FIX: i = REAL_VALUE_FIX (d); break;
+ case UNSIGNED_FIX: i = REAL_VALUE_UNSIGNED_FIX (d); break;
+ default:
+ abort ();
+ }
+ return gen_int_mode (i, mode);
}
/* This was formerly used only for non-IEEE float.
return convert_memory_address (Pmode, op);
break;
#endif
-
+
default:
break;
}
}
}
\f
-/* Subroutine of simplify_binary_operation, called via do_float_handler.
- Handles simplification of binary ops on floating point values. */
-struct simplify_binary_real_args
-{
- rtx trueop0, trueop1;
- rtx result;
- enum rtx_code code;
- enum machine_mode mode;
-};
-
-static void
-simplify_binary_real (p)
- PTR p;
-{
- REAL_VALUE_TYPE f0, f1, value;
- struct simplify_binary_real_args *args =
- (struct simplify_binary_real_args *) p;
-
- REAL_VALUE_FROM_CONST_DOUBLE (f0, args->trueop0);
- REAL_VALUE_FROM_CONST_DOUBLE (f1, args->trueop1);
- f0 = real_value_truncate (args->mode, f0);
- f1 = real_value_truncate (args->mode, f1);
-
- if (args->code == DIV
- && !MODE_HAS_INFINITIES (args->mode)
- && REAL_VALUES_EQUAL (f1, dconst0))
- {
- args->result = 0;
- return;
- }
- REAL_ARITHMETIC (value, rtx_to_tree_code (args->code), f0, f1);
-
- value = real_value_truncate (args->mode, value);
- args->result = CONST_DOUBLE_FROM_REAL_VALUE (value, args->mode);
-}
-
-/* Another subroutine called via do_float_handler. This one tests
- the floating point value given against 2. and -1. */
-struct simplify_binary_is2orm1_args
-{
- rtx value;
- bool is_2;
- bool is_m1;
-};
-
-static void
-simplify_binary_is2orm1 (p)
- PTR p;
-{
- REAL_VALUE_TYPE d;
- struct simplify_binary_is2orm1_args *args =
- (struct simplify_binary_is2orm1_args *) p;
-
- REAL_VALUE_FROM_CONST_DOUBLE (d, args->value);
- args->is_2 = REAL_VALUES_EQUAL (d, dconst2);
- args->is_m1 = REAL_VALUES_EQUAL (d, dconstm1);
-}
-
/* Simplify a binary operation CODE with result mode MODE, operating on OP0
and OP1. Return 0 if no simplification is possible.
tem = trueop0, trueop0 = trueop1, trueop1 = tem;
}
+ if (VECTOR_MODE_P (mode)
+ && GET_CODE (trueop0) == CONST_VECTOR
+ && GET_CODE (trueop1) == CONST_VECTOR)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ enum machine_mode op0mode = GET_MODE (trueop0);
+ int op0_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op0mode));
+ unsigned op0_n_elts = (GET_MODE_SIZE (op0mode) / op0_elt_size);
+ enum machine_mode op1mode = GET_MODE (trueop1);
+ int op1_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op1mode));
+ unsigned op1_n_elts = (GET_MODE_SIZE (op1mode) / op1_elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ if (op0_n_elts != n_elts || op1_n_elts != n_elts)
+ abort ();
+
+ for (i = 0; i < n_elts; i++)
+ {
+ rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
+ CONST_VECTOR_ELT (trueop0, i),
+ CONST_VECTOR_ELT (trueop1, i));
+ if (!x)
+ return 0;
+ RTVEC_ELT (v, i) = x;
+ }
+
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+
if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& GET_CODE (trueop0) == CONST_DOUBLE
&& GET_CODE (trueop1) == CONST_DOUBLE
&& mode == GET_MODE (op0) && mode == GET_MODE (op1))
{
- struct simplify_binary_real_args args;
- args.trueop0 = trueop0;
- args.trueop1 = trueop1;
- args.mode = mode;
- args.code = code;
-
- if (do_float_handler (simplify_binary_real, (PTR) &args))
- return args.result;
- return 0;
+ REAL_VALUE_TYPE f0, f1, value;
+
+ REAL_VALUE_FROM_CONST_DOUBLE (f0, trueop0);
+ REAL_VALUE_FROM_CONST_DOUBLE (f1, trueop1);
+ f0 = real_value_truncate (mode, f0);
+ f1 = real_value_truncate (mode, f1);
+
+ if (code == DIV
+ && !MODE_HAS_INFINITIES (mode)
+ && REAL_VALUES_EQUAL (f1, dconst0))
+ return 0;
+
+ REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
+
+ value = real_value_truncate (mode, value);
+ return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
}
/* We can fold some multi-word operations. */
{
case PLUS:
/* Maybe simplify x + 0 to x. The two expressions are equivalent
- when x is NaN, infinite, or finite and non-zero. They aren't
+ when x is NaN, infinite, or finite and nonzero. They aren't
when x is -0 and the rounding mode is not towards -infinity,
since (-0) + 0 is then 0. */
if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
}
/* If one of the operands is a PLUS or a MINUS, see if we can
- simplify this by the associative law.
+ simplify this by the associative law.
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. */
#endif
return xop00;
}
- break;
+ break;
case MINUS:
/* We can't assume x-x is 0 even with non-IEEE floating point,
return CONST0_RTX (mode);
/* Change subtraction from zero into negation. (0 - x) is the
- same as -x when x is NaN, infinite, or finite and non-zero.
+ same as -x when x is NaN, infinite, or finite and nonzero.
But if the mode has signed zeros, and does not round towards
-infinity, then 0 - 0 is 0, not -0. */
if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
/* If one of the operands is a PLUS or a MINUS, see if we can
- simplify this by the associative law.
+ simplify this by the associative law.
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. */
/* (x - (x & y)) -> (x & ~y) */
if (GET_CODE (op1) == AND)
{
- if (rtx_equal_p (op0, XEXP (op1, 0)))
- return simplify_gen_binary (AND, mode, op0,
- gen_rtx_NOT (mode, XEXP (op1, 1)));
- if (rtx_equal_p (op0, XEXP (op1, 1)))
- return simplify_gen_binary (AND, mode, op0,
- gen_rtx_NOT (mode, XEXP (op1, 0)));
- }
+ if (rtx_equal_p (op0, XEXP (op1, 0)))
+ {
+ tem = simplify_gen_unary (NOT, mode, XEXP (op1, 1),
+ GET_MODE (XEXP (op1, 1)));
+ return simplify_gen_binary (AND, mode, op0, tem);
+ }
+ if (rtx_equal_p (op0, XEXP (op1, 1)))
+ {
+ tem = simplify_gen_unary (NOT, mode, XEXP (op1, 0),
+ GET_MODE (XEXP (op1, 0)));
+ return simplify_gen_binary (AND, mode, op0, tem);
+ }
+ }
break;
case MULT:
&& ! side_effects_p (op0))
return op1;
- /* In IEEE floating point, x*1 is not equivalent to x for nans.
- However, ANSI says we can drop signals,
- so we can do this anyway. */
- if (trueop1 == CONST1_RTX (mode))
+ /* In IEEE floating point, x*1 is not equivalent to x for
+ signalling NaNs. */
+ if (!HONOR_SNANS (mode)
+ && trueop1 == CONST1_RTX (mode))
return op0;
/* Convert multiply by constant power of two into shift unless
&& ! rtx_equal_function_value_matters)
return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
+ /* x*2 is x+x and x*(-1) is -x */
if (GET_CODE (trueop1) == CONST_DOUBLE
- && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT)
+ && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
+ && GET_MODE (op0) == mode)
{
- struct simplify_binary_is2orm1_args args;
-
- args.value = trueop1;
- if (! do_float_handler (simplify_binary_is2orm1, (PTR) &args))
- return 0;
+ REAL_VALUE_TYPE d;
+ REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
- /* x*2 is x+x and x*(-1) is -x */
- if (args.is_2 && GET_MODE (op0) == mode)
+ if (REAL_VALUES_EQUAL (d, dconst2))
return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
- else if (args.is_m1 && GET_MODE (op0) == mode)
+ if (REAL_VALUES_EQUAL (d, dconstm1))
return gen_rtx_NEG (mode, op0);
}
break;
if (! REAL_VALUES_EQUAL (d, dconst0))
{
REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
- return gen_rtx_MULT (mode, op0,
+ return gen_rtx_MULT (mode, op0,
CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
}
}
case ROTATERT:
case ROTATE:
+ case ASHIFTRT:
/* Rotating ~0 always results in ~0. */
if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
&& (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
/* ... fall through ... */
case ASHIFT:
- case ASHIFTRT:
case LSHIFTRT:
if (trueop1 == const0_rtx)
return op0;
break;
case SMIN:
- if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
+ if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
&& INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
&& ! side_effects_p (op0))
return op1;
else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
break;
-
+
case SMAX:
if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
&& ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
break;
-
+
case UMAX:
if (trueop1 == constm1_rtx && ! side_effects_p (op0))
return op1;
/* ??? There are simplifications that can be done. */
return 0;
+ case VEC_SELECT:
+ if (!VECTOR_MODE_P (mode))
+ {
+ if (!VECTOR_MODE_P (GET_MODE (trueop0))
+ || (mode
+ != GET_MODE_INNER (GET_MODE (trueop0)))
+ || GET_CODE (trueop1) != PARALLEL
+ || XVECLEN (trueop1, 0) != 1
+ || GET_CODE (XVECEXP (trueop1, 0, 0)) != CONST_INT)
+ abort ();
+
+ if (GET_CODE (trueop0) == CONST_VECTOR)
+ return CONST_VECTOR_ELT (trueop0, INTVAL (XVECEXP (trueop1, 0, 0)));
+ }
+ else
+ {
+ if (!VECTOR_MODE_P (GET_MODE (trueop0))
+ || (GET_MODE_INNER (mode)
+ != GET_MODE_INNER (GET_MODE (trueop0)))
+ || GET_CODE (trueop1) != PARALLEL)
+ abort ();
+
+ if (GET_CODE (trueop0) == CONST_VECTOR)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ if (XVECLEN (trueop1, 0) != (int) n_elts)
+ abort ();
+ for (i = 0; i < n_elts; i++)
+ {
+ rtx x = XVECEXP (trueop1, 0, i);
+
+ if (GET_CODE (x) != CONST_INT)
+ abort ();
+ RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, INTVAL (x));
+ }
+
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+ }
+ return 0;
+ case VEC_CONCAT:
+ {
+ enum machine_mode op0_mode = (GET_MODE (trueop0) != VOIDmode
+ ? GET_MODE (trueop0)
+ : GET_MODE_INNER (mode));
+ enum machine_mode op1_mode = (GET_MODE (trueop1) != VOIDmode
+ ? GET_MODE (trueop1)
+ : GET_MODE_INNER (mode));
+
+ if (!VECTOR_MODE_P (mode)
+ || (GET_MODE_SIZE (op0_mode) + GET_MODE_SIZE (op1_mode)
+ != GET_MODE_SIZE (mode)))
+ abort ();
+
+ if ((VECTOR_MODE_P (op0_mode)
+ && (GET_MODE_INNER (mode)
+ != GET_MODE_INNER (op0_mode)))
+ || (!VECTOR_MODE_P (op0_mode)
+ && GET_MODE_INNER (mode) != op0_mode))
+ abort ();
+
+ if ((VECTOR_MODE_P (op1_mode)
+ && (GET_MODE_INNER (mode)
+ != GET_MODE_INNER (op1_mode)))
+ || (!VECTOR_MODE_P (op1_mode)
+ && GET_MODE_INNER (mode) != op1_mode))
+ abort ();
+
+ if ((GET_CODE (trueop0) == CONST_VECTOR
+ || GET_CODE (trueop0) == CONST_INT
+ || GET_CODE (trueop0) == CONST_DOUBLE)
+ && (GET_CODE (trueop1) == CONST_VECTOR
+ || GET_CODE (trueop1) == CONST_INT
+ || GET_CODE (trueop1) == CONST_DOUBLE))
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+ unsigned in_n_elts = 1;
+
+ if (VECTOR_MODE_P (op0_mode))
+ in_n_elts = (GET_MODE_SIZE (op0_mode) / elt_size);
+ for (i = 0; i < n_elts; i++)
+ {
+ if (i < in_n_elts)
+ {
+ if (!VECTOR_MODE_P (op0_mode))
+ RTVEC_ELT (v, i) = trueop0;
+ else
+ RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, i);
+ }
+ else
+ {
+ if (!VECTOR_MODE_P (op1_mode))
+ RTVEC_ELT (v, i) = trueop1;
+ else
+ RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop1,
+ i - in_n_elts);
+ }
+ }
+
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+ }
+ return 0;
+
default:
abort ();
}
-
+
return 0;
}
> (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
break;
+ case SS_PLUS:
+ case US_PLUS:
+ case SS_MINUS:
+ case US_MINUS:
+ /* ??? There are simplifications that can be done. */
+ return 0;
+
default:
abort ();
}
Rather than test for specific case, we do this by a brute-force method
and do all possible simplifications until no more changes occur. Then
- we rebuild the operation.
+ we rebuild the operation.
- If FORCE is true, then always generate the rtx. This is used to
+ If FORCE is true, then always generate the rtx. This is used to
canonicalize stuff emitted from simplify_gen_binary. Note that this
can still fail if the rtx is too complex. It won't fail just because
the result is not 'simpler' than the input, however. */
int i, j;
memset ((char *) ops, 0, sizeof ops);
-
+
/* Set up the two operands and then expand them until nothing has been
changed. If we run out of room in our array, give up; this should
almost never happen. */
tem = simplify_binary_operation (ncode, mode, lhs, rhs);
- /* Reject "simplifications" that just wrap the two
+ /* Reject "simplifications" that just wrap the two
arguments in a CONST. Failure to do so can result
in infinite recursion with simplify_binary_operation
when it calls us to simplify CONST operations. */
is also an improvement, so accept it. */
if (!force
&& (n_ops + n_consts > input_ops
- || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
+ || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
return NULL_RTX;
/* Put a non-negated operand first. If there aren't any, make all
return negate ? gen_rtx_NEG (mode, result) : result;
}
-struct cfc_args
-{
- rtx op0, op1; /* Input */
- int equal, op0lt, op1lt; /* Output */
- int unordered;
-};
-
-static void
-check_fold_consts (data)
- PTR data;
-{
- struct cfc_args *args = (struct cfc_args *) data;
- REAL_VALUE_TYPE d0, d1;
-
- /* We may possibly raise an exception while reading the value. */
- args->unordered = 1;
- REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
- REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
-
- /* Comparisons of Inf versus Inf are ordered. */
- if (REAL_VALUE_ISNAN (d0)
- || REAL_VALUE_ISNAN (d1))
- return;
- args->equal = REAL_VALUES_EQUAL (d0, d1);
- args->op0lt = REAL_VALUES_LESS (d0, d1);
- args->op1lt = REAL_VALUES_LESS (d1, d0);
- args->unordered = 0;
-}
-
/* Like simplify_binary_operation except used for relational operators.
MODE is the mode of the operands, not that of the result. If MODE
is VOIDmode, both operands must also be VOIDmode and we compare the
/* We can't simplify MODE_CC values since we don't know what the
actual comparison is. */
- if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
-#ifdef HAVE_cc0
- || op0 == cc0_rtx
-#endif
- )
+ if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC || CC0_P (op0))
return 0;
/* Make sure the constant is second. */
&& GET_CODE (trueop1) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
{
- struct cfc_args args;
+ REAL_VALUE_TYPE d0, d1;
- /* Setup input for check_fold_consts() */
- args.op0 = trueop0;
- args.op1 = trueop1;
-
-
- if (!do_float_handler (check_fold_consts, (PTR) &args))
- args.unordered = 1;
+ REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
+ REAL_VALUE_FROM_CONST_DOUBLE (d1, trueop1);
- if (args.unordered)
+ /* Comparisons are unordered iff at least one of the values is NaN. */
+ if (REAL_VALUE_ISNAN (d0) || REAL_VALUE_ISNAN (d1))
switch (code)
{
case UNEQ:
return 0;
}
- /* Receive output from check_fold_consts() */
- equal = args.equal;
- op0lt = op0ltu = args.op0lt;
- op1lt = op1ltu = args.op1lt;
+ equal = REAL_VALUES_EQUAL (d0, d1);
+ op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
+ op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
}
/* Otherwise, see if the operands are both integers. */
l0u = l0s = INTVAL (trueop0);
h0u = h0s = HWI_SIGN_EXTEND (l0s);
}
-
+
if (GET_CODE (trueop1) == CONST_DOUBLE)
{
l1u = l1s = CONST_DOUBLE_LOW (trueop1);
switch (code)
{
case EQ:
- /* References to the frame plus a constant or labels cannot
- be zero, but a SYMBOL_REF can due to #pragma weak. */
- if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
- || GET_CODE (trueop0) == LABEL_REF)
-#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
- /* On some machines, the ap reg can be 0 sometimes. */
- && op0 != arg_pointer_rtx
-#endif
- )
+ if (trueop1 == const0_rtx && nonzero_address_p (op0))
return const0_rtx;
break;
case NE:
- if (((NONZERO_BASE_PLUS_P (op0) && trueop1 == const0_rtx)
- || GET_CODE (trueop0) == LABEL_REF)
-#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
- && op0 != arg_pointer_rtx
-#endif
- )
+ if (trueop1 == const0_rtx && nonzero_address_p (op0))
return const_true_rtx;
break;
&& INTEGRAL_MODE_P (mode))
return const0_rtx;
break;
+
+ case LT:
+ /* Optimize abs(x) < 0.0. */
+ if (trueop1 == CONST0_RTX (mode) && !HONOR_SNANS (mode))
+ {
+ tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
+ : trueop0;
+ if (GET_CODE (tem) == ABS)
+ return const0_rtx;
+ }
+ break;
+
+ case GE:
+ /* Optimize abs(x) >= 0.0. */
+ if (trueop1 == CONST0_RTX (mode) && !HONOR_NANS (mode))
+ {
+ tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
+ : trueop0;
+ if (GET_CODE (tem) == ABS)
+ return const_true_rtx;
+ }
+ break;
+
+ case UNGE:
+ /* Optimize ! (abs(x) < 0.0). */
+ if (trueop1 == CONST0_RTX (mode))
+ {
+ tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
+ : trueop0;
+ if (GET_CODE (tem) == ABS)
+ return const_true_rtx;
+ }
+ break;
default:
break;
/* Convert a == b ? b : a to "a". */
if (GET_CODE (op0) == NE && ! side_effects_p (op0)
- && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
+ && !HONOR_NANS (mode)
&& rtx_equal_p (XEXP (op0, 0), op1)
&& rtx_equal_p (XEXP (op0, 1), op2))
return op1;
else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
- && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
+ && !HONOR_NANS (mode)
&& rtx_equal_p (XEXP (op0, 1), op1)
&& rtx_equal_p (XEXP (op0, 0), op2))
return op2;
{
HOST_WIDE_INT t = INTVAL (op1);
HOST_WIDE_INT f = INTVAL (op2);
-
+
if (t == STORE_FLAG_VALUE && f == 0)
code = GET_CODE (op0);
else if (t == 0 && f == STORE_FLAG_VALUE)
}
}
break;
+ case VEC_MERGE:
+ if (GET_MODE (op0) != mode
+ || GET_MODE (op1) != mode
+ || !VECTOR_MODE_P (mode))
+ abort ();
+ op2 = avoid_constant_pool_reference (op2);
+ if (GET_CODE (op2) == CONST_INT)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ int mask = (1 << n_elts) - 1;
+
+ if (!(INTVAL (op2) & mask))
+ return op1;
+ if ((INTVAL (op2) & mask) == mask)
+ return op0;
+
+ op0 = avoid_constant_pool_reference (op0);
+ op1 = avoid_constant_pool_reference (op1);
+ if (GET_CODE (op0) == CONST_VECTOR
+ && GET_CODE (op1) == CONST_VECTOR)
+ {
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ for (i = 0; i < n_elts; i++)
+ RTVEC_ELT (v, i) = (INTVAL (op2) & (1 << i)
+ ? CONST_VECTOR_ELT (op0, i)
+ : CONST_VECTOR_ELT (op1, i));
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+ }
+ break;
default:
abort ();
if (outermode == innermode && !byte)
return op;
+ /* Simplify subregs of vector constants. */
+ if (GET_CODE (op) == CONST_VECTOR)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (innermode));
+ const unsigned int offset = byte / elt_size;
+ rtx elt;
+
+ if (GET_MODE_INNER (innermode) == outermode)
+ {
+ elt = CONST_VECTOR_ELT (op, offset);
+
+ /* ?? We probably don't need this copy_rtx because constants
+ can be shared. ?? */
+
+ return copy_rtx (elt);
+ }
+ else if (GET_MODE_INNER (innermode) == GET_MODE_INNER (outermode)
+ && GET_MODE_SIZE (innermode) > GET_MODE_SIZE (outermode))
+ {
+ return (gen_rtx_CONST_VECTOR
+ (outermode,
+ gen_rtvec_v (GET_MODE_NUNITS (outermode),
+ &CONST_VECTOR_ELT (op, offset))));
+ }
+ else if (GET_MODE_CLASS (outermode) == MODE_INT
+ && (GET_MODE_SIZE (outermode) % elt_size == 0))
+ {
+ /* This happens when the target register size is smaller then
+ the vector mode, and we synthesize operations with vectors
+ of elements that are smaller than the register size. */
+ HOST_WIDE_INT sum = 0, high = 0;
+ unsigned n_elts = (GET_MODE_SIZE (outermode) / elt_size);
+ unsigned i = BYTES_BIG_ENDIAN ? offset : offset + n_elts - 1;
+ unsigned step = BYTES_BIG_ENDIAN ? 1 : -1;
+ int shift = BITS_PER_UNIT * elt_size;
+
+ for (; n_elts--; i += step)
+ {
+ elt = CONST_VECTOR_ELT (op, i);
+ if (GET_CODE (elt) == CONST_DOUBLE
+ && GET_MODE_CLASS (GET_MODE (elt)) == MODE_FLOAT)
+ {
+ elt = gen_lowpart_common (int_mode_for_mode (GET_MODE (elt)),
+ elt);
+ if (! elt)
+ return NULL_RTX;
+ }
+ if (GET_CODE (elt) != CONST_INT)
+ return NULL_RTX;
+ /* Avoid overflow. */
+ if (high >> (HOST_BITS_PER_WIDE_INT - shift))
+ return NULL_RTX;
+ high = high << shift | sum >> (HOST_BITS_PER_WIDE_INT - shift);
+ sum = (sum << shift) + INTVAL (elt);
+ }
+ if (GET_MODE_BITSIZE (outermode) <= HOST_BITS_PER_WIDE_INT)
+ return GEN_INT (trunc_int_for_mode (sum, outermode));
+ else if (GET_MODE_BITSIZE (outermode) == 2* HOST_BITS_PER_WIDE_INT)
+ return immed_double_const (sum, high, outermode);
+ else
+ return NULL_RTX;
+ }
+ else if (GET_MODE_CLASS (outermode) == MODE_INT
+ && (elt_size % GET_MODE_SIZE (outermode) == 0))
+ {
+ enum machine_mode new_mode
+ = int_mode_for_mode (GET_MODE_INNER (innermode));
+ int subbyte = byte % elt_size;
+
+ op = simplify_subreg (new_mode, op, innermode, byte - subbyte);
+ if (! op)
+ return NULL_RTX;
+ return simplify_subreg (outermode, op, new_mode, subbyte);
+ }
+ else if (GET_MODE_CLASS (outermode) == MODE_INT)
+ /* This shouldn't happen, but let's not do anything stupid. */
+ return NULL_RTX;
+ }
+
/* Attempt to simplify constant to non-SUBREG expression. */
if (CONSTANT_P (op))
{
int offset, part;
unsigned HOST_WIDE_INT val = 0;
+ if (GET_MODE_CLASS (outermode) == MODE_VECTOR_INT
+ || GET_MODE_CLASS (outermode) == MODE_VECTOR_FLOAT)
+ {
+ /* Construct a CONST_VECTOR from individual subregs. */
+ enum machine_mode submode = GET_MODE_INNER (outermode);
+ int subsize = GET_MODE_UNIT_SIZE (outermode);
+ int i, elts = GET_MODE_NUNITS (outermode);
+ rtvec v = rtvec_alloc (elts);
+ rtx elt;
+
+ for (i = 0; i < elts; i++, byte += subsize)
+ {
+ /* This might fail, e.g. if taking a subreg from a SYMBOL_REF. */
+ /* ??? It would be nice if we could actually make such subregs
+ on targets that allow such relocations. */
+ if (byte >= GET_MODE_UNIT_SIZE (innermode))
+ elt = CONST0_RTX (submode);
+ else
+ elt = simplify_subreg (submode, op, innermode, byte);
+ if (! elt)
+ return NULL_RTX;
+ RTVEC_ELT (v, i) = elt;
+ }
+ return gen_rtx_CONST_VECTOR (outermode, v);
+ }
+
/* ??? This code is partly redundant with code below, but can handle
the subregs of floats and similar corner cases.
Later it we should move all simplification code here and rewrite
GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
using SIMPLIFY_SUBREG. */
- if (subreg_lowpart_offset (outermode, innermode) == byte)
+ if (subreg_lowpart_offset (outermode, innermode) == byte
+ && GET_CODE (op) != CONST_VECTOR)
{
rtx new = gen_lowpart_if_possible (outermode, op);
if (new)
return new;
}
+ if (GET_MODE_CLASS (outermode) != MODE_INT
+ && GET_MODE_CLASS (outermode) != MODE_CC)
+ {
+ enum machine_mode new_mode = int_mode_for_mode (outermode);
+
+ if (new_mode != innermode || byte != 0)
+ {
+ op = simplify_subreg (new_mode, op, innermode, byte);
+ if (! op)
+ return NULL_RTX;
+ return simplify_subreg (outermode, op, new_mode, 0);
+ }
+ }
+
offset = byte * BITS_PER_UNIT;
switch (GET_CODE (op))
{
val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
offset %= HOST_BITS_PER_WIDE_INT;
- /* We've already picked the word we want from a double, so
+ /* We've already picked the word we want from a double, so
pretend this is actually an integer. */
innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
if (GET_CODE (op) == CONST_INT)
val = INTVAL (op);
- /* We don't handle synthetizing of non-integral constants yet. */
+ /* We don't handle synthesizing of non-integral constants yet. */
if (GET_MODE_CLASS (outermode) != MODE_INT)
return NULL_RTX;
if (REG_P (op)
&& (! REG_FUNCTION_VALUE_P (op)
|| ! rtx_equal_function_value_matters)
-#ifdef CLASS_CANNOT_CHANGE_MODE
- && ! (CLASS_CANNOT_CHANGE_MODE_P (outermode, innermode)
+ && REGNO (op) < FIRST_PSEUDO_REGISTER
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ && ! (REG_CANNOT_CHANGE_MODE_P (REGNO (op), innermode, outermode)
&& GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
- && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT
- && (TEST_HARD_REG_BIT
- (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
- REGNO (op))))
+ && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT)
#endif
- && REGNO (op) < FIRST_PSEUDO_REGISTER
&& ((reload_completed && !frame_pointer_needed)
|| (REGNO (op) != FRAME_POINTER_REGNUM
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
/* ??? We do allow it if the current REG is not valid for
its mode. This is a kludge to work around how float/complex
- arguments are passed on 32-bit Sparc and should be fixed. */
+ arguments are passed on 32-bit SPARC and should be fixed. */
if (HARD_REGNO_MODE_OK (final_regno, outermode)
|| ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
{
- rtx x = gen_rtx_REG (outermode, final_regno);
+ rtx x = gen_rtx_REG_offset (op, outermode, final_regno, byte);
/* Propagate original regno. We don't have any way to specify
- the offset inside orignal regno, so do so only for lowpart.
+ the offset inside original regno, so do so only for lowpart.
The information is used only by alias analysis that can not
grog partial register anyway. */
This is the preferred entry point into the simplification routines;
however, we still allow passes to call the more specific routines.
- Right now GCC has three (yes, three) major bodies of RTL simplficiation
+ Right now GCC has three (yes, three) major bodies of RTL simplification
code that need to be unified.
1. fold_rtx in cse.c. This code uses various CSE specific
maintain and improve. It's totally silly that when we add a
simplification that it needs to be added to 4 places (3 for RTL
simplification and 1 for tree simplification. */
-
+
rtx
simplify_rtx (x)
rtx x;
: GET_MODE (XEXP (x, 1))),
XEXP (x, 0), XEXP (x, 1));
case 'x':
- /* The only case we try to handle is a SUBREG. */
if (code == SUBREG)
- return simplify_gen_subreg (mode, SUBREG_REG (x),
+ return simplify_gen_subreg (mode, SUBREG_REG (x),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
+ if (code == CONSTANT_P_RTX)
+ {
+ if (CONSTANT_P (XEXP (x, 0)))
+ return const1_rtx;
+ }
return NULL;
default:
return NULL;
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