-/* Common subexpression elimination for GNU compiler.
- Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
+/* RTL simplification functions for GNU compiler.
+ Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of GNU CC.
#include "config.h"
-/* stdio.h must precede rtl.h for FFS. */
#include "system.h"
#include <setjmp.h>
#include "expr.h"
#include "toplev.h"
#include "output.h"
+#include "ggc.h"
/* Simplification and canonicalization of RTL. */
|| XEXP (X, 0) == virtual_outgoing_args_rtx)) \
|| GET_CODE (X) == ADDRESSOF)
+/* Much code operates on (low, high) pairs; the low value is an
+ unsigned wide int, the high value a signed wide int. We
+ occasionally need to sign extend from low to high as if low were a
+ signed wide int. */
+#define HWI_SIGN_EXTEND(low) \
+ ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
-static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
- rtx, rtx));
-static void check_fold_consts PROTO((PTR));
-
+static rtx simplify_plus_minus PARAMS ((enum rtx_code,
+ enum machine_mode, rtx, rtx));
+static void check_fold_consts PARAMS ((PTR));
+\f
/* Make a binary operation by properly ordering the operands and
seeing if the expression folds. */
/* Put complex operands first and constants second if commutative. */
if (GET_RTX_CLASS (code) == 'c'
- && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
- || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
- && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
- || (GET_CODE (op0) == SUBREG
- && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
- && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
+ && swap_commutative_operands_p (op0, op1))
tem = op0, op0 = op1, op1 = tem;
/* If this simplifies, do it. */
return gen_rtx_fmt_ee (code, mode, op0, op1);
}
\f
+/* Make a unary operation by first seeing if it folds and otherwise making
+ the specified operation. */
+
+rtx
+simplify_gen_unary (code, mode, op, op_mode)
+ enum rtx_code code;
+ enum machine_mode mode;
+ rtx op;
+ enum machine_mode op_mode;
+{
+ rtx tem;
+
+ /* If this simplifies, use it. */
+ if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
+ return tem;
+
+ return gen_rtx_fmt_e (code, mode, op);
+}
+
+/* Likewise for ternary operations. */
+
+rtx
+simplify_gen_ternary (code, mode, op0_mode, op0, op1, op2)
+ enum rtx_code code;
+ enum machine_mode mode, op0_mode;
+ rtx op0, op1, op2;
+{
+ rtx tem;
+
+ /* If this simplifies, use it. */
+ if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
+ op0, op1, op2)))
+ return tem;
+
+ return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
+}
+\f
+/* Likewise, for relational operations.
+ CMP_MODE specifies mode comparison is done in.
+ */
+
+rtx
+simplify_gen_relational (code, mode, cmp_mode, op0, op1)
+ enum rtx_code code;
+ enum machine_mode mode;
+ enum machine_mode cmp_mode;
+ rtx op0, op1;
+{
+ rtx tem;
+
+ if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
+ return tem;
+
+ /* Put complex operands first and constants second. */
+ if (swap_commutative_operands_p (op0, op1))
+ tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
+
+ return gen_rtx_fmt_ee (code, mode, op0, op1);
+}
+\f
+/* Replace all occurrences of OLD in X with NEW and try to simplify the
+ resulting RTX. Return a new RTX which is as simplified as possible. */
+
+rtx
+simplify_replace_rtx (x, old, new)
+ rtx x;
+ rtx old;
+ rtx new;
+{
+ enum rtx_code code = GET_CODE (x);
+ enum machine_mode mode = GET_MODE (x);
+
+ /* If X is OLD, return NEW. Otherwise, if this is an expression, try
+ to build a new expression substituting recursively. If we can't do
+ anything, return our input. */
+
+ if (x == old)
+ return new;
+
+ switch (GET_RTX_CLASS (code))
+ {
+ case '1':
+ {
+ enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
+ rtx op = (XEXP (x, 0) == old
+ ? new : simplify_replace_rtx (XEXP (x, 0), old, new));
+
+ return simplify_gen_unary (code, mode, op, op_mode);
+ }
+
+ case '2':
+ case 'c':
+ return
+ simplify_gen_binary (code, mode,
+ simplify_replace_rtx (XEXP (x, 0), old, new),
+ simplify_replace_rtx (XEXP (x, 1), old, new));
+ case '<':
+ return
+ simplify_gen_relational (code, mode,
+ (GET_MODE (XEXP (x, 0)) != VOIDmode
+ ? GET_MODE (XEXP (x, 0))
+ : GET_MODE (XEXP (x, 1))),
+ simplify_replace_rtx (XEXP (x, 0), old, new),
+ simplify_replace_rtx (XEXP (x, 1), old, new));
+
+ case '3':
+ case 'b':
+ return
+ simplify_gen_ternary (code, mode, GET_MODE (XEXP (x, 0)),
+ simplify_replace_rtx (XEXP (x, 0), old, new),
+ simplify_replace_rtx (XEXP (x, 1), old, new),
+ simplify_replace_rtx (XEXP (x, 2), old, new));
+
+ case 'x':
+ /* The only case we try to handle is a SUBREG. */
+ if (code == SUBREG)
+ {
+ rtx exp;
+ exp = simplify_gen_subreg (GET_MODE (x),
+ simplify_replace_rtx (SUBREG_REG (x),
+ old, new),
+ GET_MODE (SUBREG_REG (x)),
+ SUBREG_BYTE (x));
+ if (exp)
+ x = exp;
+ }
+ return x;
+
+ default:
+ if (GET_CODE (x) == MEM)
+ {
+ /* We can't use change_address here, since it verifies memory address
+ for corectness. We don't want such check, since we may handle
+ addresses previously incorect (such as ones in push instructions)
+ and it is caller's work to verify whether resulting insn match. */
+ rtx addr = simplify_replace_rtx (XEXP (x, 0), old, new);
+ rtx mem;
+ if (XEXP (x, 0) != addr)
+ {
+ mem = gen_rtx_MEM (GET_MODE (x), addr);
+ MEM_COPY_ATTRIBUTES (mem, x);
+ }
+ else
+ mem = x;
+ return mem;
+ }
+
+ return x;
+ }
+ return x;
+}
+\f
/* Try to simplify a unary operation CODE whose output mode is to be
MODE with input operand OP whose mode was originally OP_MODE.
Return zero if no simplification can be made. */
rtx op;
enum machine_mode op_mode;
{
- register int width = GET_MODE_BITSIZE (mode);
+ unsigned int width = GET_MODE_BITSIZE (mode);
/* The order of these tests is critical so that, for example, we don't
check the wrong mode (input vs. output) for a conversion operation,
REAL_VALUE_TYPE d;
if (GET_CODE (op) == CONST_INT)
- lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
+ lv = INTVAL (op), hv = HWI_SIGN_EXTEND (lv);
else
lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
REAL_VALUE_TYPE d;
if (GET_CODE (op) == CONST_INT)
- lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
+ lv = INTVAL (op), hv = HWI_SIGN_EXTEND (lv);
else
lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
break;
case SQRT:
+ case FLOAT_EXTEND:
+ case FLOAT_TRUNCATE:
return 0;
default:
else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
&& (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
{
- HOST_WIDE_INT l1, h1, lv, hv;
+ unsigned HOST_WIDE_INT l1, lv;
+ HOST_WIDE_INT h1, hv;
if (GET_CODE (op) == CONST_DOUBLE)
l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
else
- l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
+ l1 = INTVAL (op), h1 = HWI_SIGN_EXTEND (l1);
switch (code)
{
<< (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
- hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
+ hv = HWI_SIGN_EXTEND (lv);
}
break;
}
x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
- set_float_handler (NULL_PTR);
+ set_float_handler (NULL);
return x;
}
abort ();
}
- set_float_handler (NULL_PTR);
+ set_float_handler (NULL);
val = trunc_int_for_mode (val, mode);
eggert@twinsun.com says it is safe for IEEE also. */
else
{
+ enum rtx_code reversed;
/* There are some simplifications we can do even if the operands
aren't constant. */
switch (code)
{
- case NEG:
case NOT:
- /* (not (not X)) == X, similarly for NEG. */
- if (GET_CODE (op) == code)
+ /* (not (not X)) == X. */
+ if (GET_CODE (op) == NOT)
+ return XEXP (op, 0);
+
+ /* (not (eq X Y)) == (ne X Y), etc. */
+ if (mode == BImode && GET_RTX_CLASS (GET_CODE (op)) == '<'
+ && ((reversed = reversed_comparison_code (op, NULL_RTX))
+ != UNKNOWN))
+ return gen_rtx_fmt_ee (reversed,
+ op_mode, XEXP (op, 0), XEXP (op, 1));
+ break;
+
+ case NEG:
+ /* (neg (neg X)) == X. */
+ if (GET_CODE (op) == NEG)
return XEXP (op, 0);
break;
#ifdef POINTERS_EXTEND_UNSIGNED
if (! POINTERS_EXTEND_UNSIGNED
&& mode == Pmode && GET_MODE (op) == ptr_mode
- && CONSTANT_P (op))
+ && (CONSTANT_P (op)
+ || (GET_CODE (op) == SUBREG
+ && GET_CODE (SUBREG_REG (op)) == REG
+ && REG_POINTER (SUBREG_REG (op))
+ && GET_MODE (SUBREG_REG (op)) == Pmode)))
return convert_memory_address (Pmode, op);
#endif
break;
case ZERO_EXTEND:
if (POINTERS_EXTEND_UNSIGNED
&& mode == Pmode && GET_MODE (op) == ptr_mode
- && CONSTANT_P (op))
+ && (CONSTANT_P (op)
+ || (GET_CODE (op) == SUBREG
+ && GET_CODE (SUBREG_REG (op)) == REG
+ && REG_POINTER (SUBREG_REG (op))
+ && GET_MODE (SUBREG_REG (op)) == Pmode)))
return convert_memory_address (Pmode, op);
break;
#endif
{
register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
HOST_WIDE_INT val;
- int width = GET_MODE_BITSIZE (mode);
+ unsigned int width = GET_MODE_BITSIZE (mode);
rtx tem;
/* Relational operations don't work here. We must know the mode
#endif
value = real_value_truncate (mode, value);
- set_float_handler (NULL_PTR);
+ set_float_handler (NULL);
return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
}
#endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
&& (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
&& (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
{
- HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
+ unsigned HOST_WIDE_INT l1, l2, lv;
+ HOST_WIDE_INT h1, h2, hv;
if (GET_CODE (op0) == CONST_DOUBLE)
l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
else
- l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
+ l1 = INTVAL (op0), h1 = HWI_SIGN_EXTEND (l1);
if (GET_CODE (op1) == CONST_DOUBLE)
l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
else
- l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
+ l2 = INTVAL (op1), h2 = HWI_SIGN_EXTEND (l2);
switch (code)
{
l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
#endif
- if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
+ if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
return 0;
if (code == LSHIFTRT || code == ASHIFTRT)
/* In IEEE floating point, x+0 is not the same as x. Similarly
for the other optimizations below. */
if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
- && FLOAT_MODE_P (mode) && ! flag_fast_math)
+ && FLOAT_MODE_P (mode) && ! flag_unsafe_math_optimizations)
break;
if (op1 == CONST0_RTX (mode))
else if (GET_CODE (op1) == NEG)
return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
+ /* (~a) + 1 -> -a */
+ if (INTEGRAL_MODE_P (mode)
+ && GET_CODE (op0) == NOT
+ && GET_CODE (op1) == CONST_INT
+ && INTVAL (op1) == 1)
+ return gen_rtx_NEG (mode, XEXP (op0, 0));
+
/* Handle both-operands-constant cases. We can only add
CONST_INTs to constants since the sum of relocatable symbols
can't be handled by most assemblers. Don't add CONST_INT
In IEEE floating point, x-0 is not the same as x. */
if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
- || ! FLOAT_MODE_P (mode) || flag_fast_math)
+ || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& op1 == CONST0_RTX (mode))
return op0;
+#endif
+
+ /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
+ if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
+ || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
+ && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
+ {
+ rtx xop00 = XEXP (op0, 0);
+ rtx xop10 = XEXP (op1, 0);
+
+#ifdef HAVE_cc0
+ if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
#else
- /* Do nothing here. */
+ if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
+ && GET_MODE (xop00) == GET_MODE (xop10)
+ && REGNO (xop00) == REGNO (xop10)
+ && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
+ && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
#endif
- break;
-
+ return xop00;
+ }
+
+ break;
case MINUS:
/* None of these optimizations can be done for IEEE
floating point. */
if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
- && FLOAT_MODE_P (mode) && ! flag_fast_math)
+ && FLOAT_MODE_P (mode) && ! flag_unsafe_math_optimizations)
break;
/* We can't assume x-x is 0 even with non-IEEE floating point,
but since it is zero except in very strange circumstances, we
- will treat it as zero with -ffast-math. */
+ will treat it as zero with -funsafe-math-optimizations. */
if (rtx_equal_p (op0, op1)
&& ! side_effects_p (op0)
- && (! FLOAT_MODE_P (mode) || flag_fast_math))
+ && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
return CONST0_RTX (mode);
/* Change subtraction from zero into negation. */
/* In IEEE floating point, x*0 is not always 0. */
if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
- || ! FLOAT_MODE_P (mode) || flag_fast_math)
+ || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& op1 == CONST0_RTX (mode)
&& ! side_effects_p (op0))
return op1;
REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
op1is2 = REAL_VALUES_EQUAL (d, dconst2);
op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
- set_float_handler (NULL_PTR);
+ set_float_handler (NULL);
/* x*2 is x+x and x*(-1) is -x */
if (op1is2 && GET_MODE (op0) == mode)
/* In IEEE floating point, 0/x is not always 0. */
if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
- || ! FLOAT_MODE_P (mode) || flag_fast_math)
+ || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& op0 == CONST0_RTX (mode)
&& ! side_effects_p (op1))
return op0;
#if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
/* Change division by a constant into multiplication. Only do
- this with -ffast-math until an expert says it is safe in
- general. */
+ this with -funsafe-math-optimizations. */
else if (GET_CODE (op1) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
&& op1 != CONST0_RTX (mode)
- && flag_fast_math)
+ && flag_unsafe_math_optimizations)
{
REAL_VALUE_TYPE d;
REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
break;
case DIV:
- if (arg1s == 0)
+ if (arg1s == 0
+ || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
+ && arg1s == -1))
return 0;
val = arg0s / arg1s;
break;
case MOD:
- if (arg1s == 0)
+ if (arg1s == 0
+ || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
+ && arg1s == -1))
return 0;
val = arg0s % arg1s;
break;
case UDIV:
- if (arg1 == 0)
+ if (arg1 == 0
+ || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
+ && arg1s == -1))
return 0;
val = (unsigned HOST_WIDE_INT) arg0 / arg1;
break;
case UMOD:
- if (arg1 == 0)
+ if (arg1 == 0
+ || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
+ && arg1s == -1))
return 0;
val = (unsigned HOST_WIDE_INT) arg0 % arg1;
break;
int first = 1, negate = 0, changed;
int i, j;
- bzero ((char *) ops, sizeof ops);
+ memset ((char *) ops, 0, sizeof ops);
/* Set up the two operands and then expand them until nothing has been
changed. If we run out of room in our array, give up; this should
{
rtx op0, op1; /* Input */
int equal, op0lt, op1lt; /* Output */
+ int unordered;
};
static void
struct cfc_args *args = (struct cfc_args *) data;
REAL_VALUE_TYPE d0, d1;
+ /* We may possibly raise an exception while reading the value. */
+ args->unordered = 1;
REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
+
+ /* Comparisons of Inf versus Inf are ordered. */
+ if (REAL_VALUE_ISNAN (d0)
+ || REAL_VALUE_ISNAN (d1))
+ return;
args->equal = REAL_VALUES_EQUAL (d0, d1);
args->op0lt = REAL_VALUES_LESS (d0, d1);
args->op1lt = REAL_VALUES_LESS (d1, d0);
+ args->unordered = 0;
}
/* Like simplify_binary_operation except used for relational operators.
int equal, op0lt, op0ltu, op1lt, op1ltu;
rtx tem;
+ if (mode == VOIDmode
+ && (GET_MODE (op0) != VOIDmode
+ || GET_MODE (op1) != VOIDmode))
+ abort ();
+
/* If op0 is a compare, extract the comparison arguments from it. */
if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
)
return 0;
+ /* Make sure the constant is second. */
+ if (swap_commutative_operands_p (op0, op1))
+ {
+ tem = op0, op0 = op1, op1 = tem;
+ code = swap_condition (code);
+ }
+
/* For integer comparisons of A and B maybe we can simplify A - B and can
then simplify a comparison of that with zero. If A and B are both either
a register or a CONST_INT, this can't help; testing for these cases will
return simplify_relational_operation (signed_condition (code),
mode, tem, const0_rtx);
+ if (flag_unsafe_math_optimizations && code == ORDERED)
+ return const_true_rtx;
+
+ if (flag_unsafe_math_optimizations && code == UNORDERED)
+ return const0_rtx;
+
/* For non-IEEE floating-point, if the two operands are equal, we know the
result. */
if (rtx_equal_p (op0, op1)
&& (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
- || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
+ || ! FLOAT_MODE_P (GET_MODE (op0))
+ || flag_unsafe_math_optimizations))
equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
/* If the operands are floating-point constants, see if we can fold
args.op0 = op0;
args.op1 = op1;
- if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
- /* We got an exception from check_fold_consts() */
- return 0;
+
+ if (!do_float_handler (check_fold_consts, (PTR) &args))
+ args.unordered = 1;
+
+ if (args.unordered)
+ switch (code)
+ {
+ case UNEQ:
+ case UNLT:
+ case UNGT:
+ case UNLE:
+ case UNGE:
+ case NE:
+ case UNORDERED:
+ return const_true_rtx;
+ case EQ:
+ case LT:
+ case GT:
+ case LE:
+ case GE:
+ case LTGT:
+ case ORDERED:
+ return const0_rtx;
+ default:
+ return 0;
+ }
/* Receive output from check_fold_consts() */
equal = args.equal;
else
{
l0u = l0s = INTVAL (op0);
- h0u = h0s = l0s < 0 ? -1 : 0;
+ h0u = h0s = HWI_SIGN_EXTEND (l0s);
}
if (GET_CODE (op1) == CONST_DOUBLE)
else
{
l1u = l1s = INTVAL (op1);
- h1u = h1s = l1s < 0 ? -1 : 0;
+ h1u = h1s = HWI_SIGN_EXTEND (l1s);
}
/* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
we have to sign or zero-extend the values. */
- if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
- h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
-
if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
{
l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
l1s |= ((HOST_WIDE_INT) (-1) << width);
}
+ if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
+ h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
equal = (h0u == h1u && l0u == l1u);
- op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
- op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
+ op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
+ op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
}
switch (code)
{
case EQ:
+ case UNEQ:
return equal ? const_true_rtx : const0_rtx;
case NE:
+ case LTGT:
return ! equal ? const_true_rtx : const0_rtx;
case LT:
+ case UNLT:
return op0lt ? const_true_rtx : const0_rtx;
case GT:
+ case UNGT:
return op1lt ? const_true_rtx : const0_rtx;
case LTU:
return op0ltu ? const_true_rtx : const0_rtx;
case GTU:
return op1ltu ? const_true_rtx : const0_rtx;
case LE:
+ case UNLE:
return equal || op0lt ? const_true_rtx : const0_rtx;
case GE:
+ case UNGE:
return equal || op1lt ? const_true_rtx : const0_rtx;
case LEU:
return equal || op0ltu ? const_true_rtx : const0_rtx;
case GEU:
return equal || op1ltu ? const_true_rtx : const0_rtx;
+ case ORDERED:
+ return const_true_rtx;
+ case UNORDERED:
+ return const0_rtx;
default:
abort ();
}
enum machine_mode mode, op0_mode;
rtx op0, op1, op2;
{
- int width = GET_MODE_BITSIZE (mode);
+ unsigned int width = GET_MODE_BITSIZE (mode);
/* VOIDmode means "infinite" precision. */
if (width == 0)
if (GET_CODE (op0) == CONST_INT
&& GET_CODE (op1) == CONST_INT
&& GET_CODE (op2) == CONST_INT
- && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
- && width <= HOST_BITS_PER_WIDE_INT)
+ && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
+ && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
{
/* Extracting a bit-field from a constant */
HOST_WIDE_INT val = INTVAL (op0);
/* Convert a == b ? b : a to "a". */
if (GET_CODE (op0) == NE && ! side_effects_p (op0)
+ && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& rtx_equal_p (XEXP (op0, 0), op1)
&& rtx_equal_p (XEXP (op0, 1), op2))
return op1;
else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
+ && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& rtx_equal_p (XEXP (op0, 1), op1)
&& rtx_equal_p (XEXP (op0, 0), op2))
return op2;
else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
{
+ enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
+ ? GET_MODE (XEXP (op0, 1))
+ : GET_MODE (XEXP (op0, 0)));
rtx temp;
- temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
- XEXP (op0, 0), XEXP (op0, 1));
+ if (cmp_mode == VOIDmode)
+ cmp_mode = op0_mode;
+ temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
+ XEXP (op0, 0), XEXP (op0, 1));
+
/* See if any simplifications were possible. */
if (temp == const0_rtx)
return op2;
else if (temp == const1_rtx)
return op1;
+ else if (temp)
+ op0 = temp;
+
+ /* Look for happy constants in op1 and op2. */
+ if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
+ {
+ HOST_WIDE_INT t = INTVAL (op1);
+ HOST_WIDE_INT f = INTVAL (op2);
+
+ if (t == STORE_FLAG_VALUE && f == 0)
+ code = GET_CODE (op0);
+ else if (t == 0 && f == STORE_FLAG_VALUE)
+ {
+ enum rtx_code tmp;
+ tmp = reversed_comparison_code (op0, NULL_RTX);
+ if (tmp == UNKNOWN)
+ break;
+ code = tmp;
+ }
+ else
+ break;
+
+ return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
+ }
}
break;
return 0;
}
+/* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
+ Return 0 if no simplifications is possible. */
+rtx
+simplify_subreg (outermode, op, innermode, byte)
+ rtx op;
+ unsigned int byte;
+ enum machine_mode outermode, innermode;
+{
+ /* Little bit of sanity checking. */
+ if (innermode == VOIDmode || outermode == VOIDmode
+ || innermode == BLKmode || outermode == BLKmode)
+ abort ();
+
+ if (GET_MODE (op) != innermode
+ && GET_MODE (op) != VOIDmode)
+ abort ();
+
+ if (byte % GET_MODE_SIZE (outermode)
+ || byte >= GET_MODE_SIZE (innermode))
+ abort ();
+
+ if (outermode == innermode && !byte)
+ return op;
+
+ /* Attempt to simplify constant to non-SUBREG expression. */
+ if (CONSTANT_P (op))
+ {
+ int offset, part;
+ unsigned HOST_WIDE_INT val;
+
+ /* ??? This code is partly redundant with code bellow, but can handle
+ the subregs of floats and similar corner cases.
+ Later it we should move all simplification code here and rewrite
+ GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
+ using SIMPLIFY_SUBREG. */
+ if (subreg_lowpart_offset (outermode, innermode) == byte)
+ {
+ rtx new = gen_lowpart_if_possible (outermode, op);
+ if (new)
+ return new;
+ }
+
+ /* Similar comment as above apply here. */
+ if (GET_MODE_SIZE (outermode) == UNITS_PER_WORD
+ && GET_MODE_SIZE (innermode) > UNITS_PER_WORD
+ && GET_MODE_CLASS (outermode) == MODE_INT)
+ {
+ rtx new = constant_subword (op,
+ (byte / UNITS_PER_WORD),
+ innermode);
+ if (new)
+ return new;
+ }
+
+ offset = byte * BITS_PER_UNIT;
+ switch (GET_CODE (op))
+ {
+ case CONST_DOUBLE:
+ if (GET_MODE (op) != VOIDmode)
+ break;
+
+ /* We can't handle this case yet. */
+ if (GET_MODE_BITSIZE (outermode) >= HOST_BITS_PER_WIDE_INT)
+ return NULL;
+
+ part = offset >= HOST_BITS_PER_WIDE_INT;
+ if ((BITS_PER_WORD > HOST_BITS_PER_WIDE_INT
+ && BYTES_BIG_ENDIAN)
+ || (BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
+ && WORDS_BIG_ENDIAN))
+ part = !part;
+ val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
+ offset %= HOST_BITS_PER_WIDE_INT;
+
+ /* We've already picked the word we want from a double, so
+ pretend this is actually an integer. */
+ innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
+
+ /* FALLTHROUGH */
+ case CONST_INT:
+ if (GET_CODE (op) == CONST_INT)
+ val = INTVAL (op);
+
+ /* We don't handle synthetizing of non-integral constants yet. */
+ if (GET_MODE_CLASS (outermode) != MODE_INT)
+ return NULL;
+
+ if (BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
+ {
+ if (WORDS_BIG_ENDIAN)
+ offset = (GET_MODE_BITSIZE (innermode)
+ - GET_MODE_BITSIZE (outermode) - offset);
+ if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN
+ && GET_MODE_SIZE (outermode) < UNITS_PER_WORD)
+ offset = (offset + BITS_PER_WORD - GET_MODE_BITSIZE (outermode)
+ - 2 * (offset % BITS_PER_WORD));
+ }
+
+ if (offset >= HOST_BITS_PER_WIDE_INT)
+ return ((HOST_WIDE_INT) val < 0) ? constm1_rtx : const0_rtx;
+ else
+ {
+ val >>= offset;
+ if (GET_MODE_BITSIZE (outermode) < HOST_BITS_PER_WIDE_INT)
+ val = trunc_int_for_mode (val, outermode);
+ return GEN_INT (val);
+ }
+ default:
+ break;
+ }
+ }
+
+ /* Changing mode twice with SUBREG => just change it once,
+ or not at all if changing back op starting mode. */
+ if (GET_CODE (op) == SUBREG)
+ {
+ enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
+ int final_offset = byte + SUBREG_BYTE (op);
+ rtx new;
+
+ if (outermode == innermostmode
+ && byte == 0 && SUBREG_BYTE (op) == 0)
+ return SUBREG_REG (op);
+
+ /* The SUBREG_BYTE represents offset, as if the value were stored
+ in memory. Irritating exception is paradoxical subreg, where
+ we define SUBREG_BYTE to be 0. On big endian machines, this
+ value should be negative. For a moment, undo this exception. */
+ if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
+ {
+ int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
+ if (WORDS_BIG_ENDIAN)
+ final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
+ if (BYTES_BIG_ENDIAN)
+ final_offset += difference % UNITS_PER_WORD;
+ }
+ if (SUBREG_BYTE (op) == 0
+ && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
+ {
+ int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
+ if (WORDS_BIG_ENDIAN)
+ final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
+ if (BYTES_BIG_ENDIAN)
+ final_offset += difference % UNITS_PER_WORD;
+ }
+
+ /* See whether resulting subreg will be paradoxical. */
+ if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
+ {
+ /* In nonparadoxical subregs we can't handle negative offsets. */
+ if (final_offset < 0)
+ return NULL_RTX;
+ /* Bail out in case resulting subreg would be incorrect. */
+ if (final_offset % GET_MODE_SIZE (outermode)
+ || final_offset >= GET_MODE_SIZE (innermostmode))
+ return NULL;
+ }
+ else
+ {
+ int offset = 0;
+ int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
+
+ /* In paradoxical subreg, see if we are still looking on lower part.
+ If so, our SUBREG_BYTE will be 0. */
+ if (WORDS_BIG_ENDIAN)
+ offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
+ if (BYTES_BIG_ENDIAN)
+ offset += difference % UNITS_PER_WORD;
+ if (offset == final_offset)
+ final_offset = 0;
+ else
+ return NULL;
+ }
+
+ /* Recurse for futher possible simplifications. */
+ new = simplify_subreg (outermode, SUBREG_REG (op),
+ GET_MODE (SUBREG_REG (op)),
+ final_offset);
+ if (new)
+ return new;
+ return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
+ }
+
+ /* SUBREG of a hard register => just change the register number
+ and/or mode. If the hard register is not valid in that mode,
+ suppress this simplification. If the hard register is the stack,
+ frame, or argument pointer, leave this as a SUBREG. */
+
+ if (REG_P (op)
+ && (! REG_FUNCTION_VALUE_P (op)
+ || ! rtx_equal_function_value_matters)
+#ifdef CLASS_CANNOT_CHANGE_MODE
+ && ! (CLASS_CANNOT_CHANGE_MODE_P (outermode, innermode)
+ && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
+ && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT
+ && (TEST_HARD_REG_BIT
+ (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
+ REGNO (op))))
+#endif
+ && REGNO (op) < FIRST_PSEUDO_REGISTER
+ && ((reload_completed && !frame_pointer_needed)
+ || (REGNO (op) != FRAME_POINTER_REGNUM
+#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ && REGNO (op) != HARD_FRAME_POINTER_REGNUM
+#endif
+ ))
+#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
+ && REGNO (op) != ARG_POINTER_REGNUM
+#endif
+ && REGNO (op) != STACK_POINTER_REGNUM)
+ {
+ int final_regno = subreg_hard_regno (gen_rtx_SUBREG (outermode, op, byte),
+ 0);
+
+ /* ??? We do allow it if the current REG is not valid for
+ its mode. This is a kludge to work around how float/complex
+ arguments are passed on 32-bit Sparc and should be fixed. */
+ if (HARD_REGNO_MODE_OK (final_regno, outermode)
+ || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
+ return gen_rtx_REG (outermode, final_regno);
+ }
+
+ /* If we have a SUBREG of a register that we are replacing and we are
+ replacing it with a MEM, make a new MEM and try replacing the
+ SUBREG with it. Don't do this if the MEM has a mode-dependent address
+ or if we would be widening it. */
+
+ if (GET_CODE (op) == MEM
+ && ! mode_dependent_address_p (XEXP (op, 0))
+ /* Allow splitting of volatile memory references in case we don't
+ have instruction to move the whole thing. */
+ && (! MEM_VOLATILE_P (op)
+ || (mov_optab->handlers[(int) innermode].insn_code
+ == CODE_FOR_nothing))
+ && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
+ {
+ rtx new;
+
+ new = gen_rtx_MEM (outermode, plus_constant (XEXP (op, 0), byte));
+ MEM_COPY_ATTRIBUTES (new, op);
+ return new;
+ }
+
+ /* Handle complex values represented as CONCAT
+ of real and imaginary part. */
+ if (GET_CODE (op) == CONCAT)
+ {
+ int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode);
+ rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
+ unsigned int final_offset;
+ rtx res;
+
+ final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
+ res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
+ if (res)
+ return res;
+ /* We can at least simplify it by referring directly to the relevent part. */
+ return gen_rtx_SUBREG (outermode, part, final_offset);
+ }
+
+ return NULL_RTX;
+}
+/* Make a SUBREG operation or equivalent if it folds. */
+
+rtx
+simplify_gen_subreg (outermode, op, innermode, byte)
+ rtx op;
+ unsigned int byte;
+ enum machine_mode outermode, innermode;
+{
+ rtx new;
+ /* Little bit of sanity checking. */
+ if (innermode == VOIDmode || outermode == VOIDmode
+ || innermode == BLKmode || outermode == BLKmode)
+ abort ();
+
+ if (GET_MODE (op) != innermode
+ && GET_MODE (op) != VOIDmode)
+ abort ();
+
+ if (byte % GET_MODE_SIZE (outermode)
+ || byte >= GET_MODE_SIZE (innermode))
+ abort ();
+
+ new = simplify_subreg (outermode, op, innermode, byte);
+ if (new)
+ return new;
+
+ if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
+ return NULL_RTX;
+
+ return gen_rtx_SUBREG (outermode, op, byte);
+}
/* Simplify X, an rtx expression.
Return the simplified expression or NULL if no simplifications
simplify_rtx (x)
rtx x;
{
- enum rtx_code code;
- enum machine_mode mode;
- rtx new;
-
- mode = GET_MODE (x);
- code = GET_CODE (x);
+ enum rtx_code code = GET_CODE (x);
+ enum machine_mode mode = GET_MODE (x);
switch (GET_RTX_CLASS (code))
{
case '1':
return simplify_unary_operation (code, mode,
XEXP (x, 0), GET_MODE (XEXP (x, 0)));
- case '2':
case 'c':
+ if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
+ {
+ rtx tem;
+
+ tem = XEXP (x, 0);
+ XEXP (x, 0) = XEXP (x, 1);
+ XEXP (x, 1) = tem;
+ return simplify_binary_operation (code, mode,
+ XEXP (x, 0), XEXP (x, 1));
+ }
+
+ case '2':
return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
case '3':
case 'b':
return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
- XEXP (x, 0), XEXP (x, 1), XEXP (x, 2));
+ XEXP (x, 0), XEXP (x, 1),
+ XEXP (x, 2));
case '<':
- return simplify_relational_operation (code, GET_MODE (XEXP (x, 0)),
+ return simplify_relational_operation (code,
+ ((GET_MODE (XEXP (x, 0))
+ != VOIDmode)
+ ? GET_MODE (XEXP (x, 0))
+ : GET_MODE (XEXP (x, 1))),
XEXP (x, 0), XEXP (x, 1));
+ case 'x':
+ /* The only case we try to handle is a SUBREG. */
+ if (code == SUBREG)
+ return simplify_gen_subreg (mode, SUBREG_REG (x),
+ GET_MODE (SUBREG_REG (x)),
+ SUBREG_BYTE (x));
+ return NULL;
default:
return NULL;
}
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