/* Instruction scheduling pass.
- Copyright (C) 1992 Free Software Foundation, Inc.
+ Copyright (C) 1992, 93-96, 1997 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com)
Enhanced by, and currently maintained by, Jim Wilson (wilson@cygnus.com)
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
/* Instruction scheduling pass.
predecessors in the list according to their priority order. We
consider this insn scheduled by setting the pointer to the "end" of
the list to point to the previous insn. When an insn has no
- predecessors, we also add it to the ready list. When all insns down
- to the lowest priority have been scheduled, the critical path of the
- basic block has been made as short as possible. The remaining insns
- are then scheduled in remaining slots.
-
- The following list shows the order in which we want to break ties:
+ predecessors, we either queue it until sufficient time has elapsed
+ or add it to the ready list. As the instructions are scheduled or
+ when stalls are introduced, the queue advances and dumps insns into
+ the ready list. When all insns down to the lowest priority have
+ been scheduled, the critical path of the basic block has been made
+ as short as possible. The remaining insns are then scheduled in
+ remaining slots.
+
+ Function unit conflicts are resolved during reverse list scheduling
+ by tracking the time when each insn is committed to the schedule
+ and from that, the time the function units it uses must be free.
+ As insns on the ready list are considered for scheduling, those
+ that would result in a blockage of the already committed insns are
+ queued until no blockage will result. Among the remaining insns on
+ the ready list to be considered, the first one with the largest
+ potential for causing a subsequent blockage is chosen.
+
+ The following list shows the order in which we want to break ties
+ among insns in the ready list:
1. choose insn with lowest conflict cost, ties broken by
2. choose insn with the longest path to end of bb, ties broken by
reg_n_calls_crossed, and reg_live_length. Also, basic_block_head,
basic_block_end.
- The information in the line number notes is carefully retained by this
- pass. All other NOTE insns are grouped in their same relative order at
- the beginning of basic blocks that have been scheduled. */
+ The information in the line number notes is carefully retained by
+ this pass. Notes that refer to the starting and ending of
+ exception regions are also carefully retained by this pass. All
+ other NOTE insns are grouped in their same relative order at the
+ beginning of basic blocks that have been scheduled. */
\f
#include <stdio.h>
#include "config.h"
#include "insn-config.h"
#include "insn-attr.h"
+#ifdef INSN_SCHEDULING
/* Arrays set up by scheduling for the same respective purposes as
similar-named arrays set up by flow analysis. We work with these
arrays during the scheduling pass so we can compare values against
Values of these arrays are copied at the end of this pass into the
arrays set up by flow analysis. */
-static short *sched_reg_n_deaths;
static int *sched_reg_n_calls_crossed;
static int *sched_reg_live_length;
by splitting insns. */
static rtx *reg_last_uses;
static rtx *reg_last_sets;
+static regset reg_pending_sets;
+static int reg_pending_sets_all;
/* Vector indexed by INSN_UID giving the original ordering of the insns. */
static int *insn_luid;
static int *insn_priority;
#define INSN_PRIORITY(INSN) (insn_priority[INSN_UID (INSN)])
+static short *insn_costs;
+#define INSN_COST(INSN) insn_costs[INSN_UID (INSN)]
+
+/* Vector indexed by INSN_UID giving an encoding of the function units
+ used. */
+static short *insn_units;
+#define INSN_UNIT(INSN) insn_units[INSN_UID (INSN)]
+
+/* Vector indexed by INSN_UID giving an encoding of the blockage range
+ function. The unit and the range are encoded. */
+static unsigned int *insn_blockage;
+#define INSN_BLOCKAGE(INSN) insn_blockage[INSN_UID (INSN)]
+#define UNIT_BITS 5
+#define BLOCKAGE_MASK ((1 << BLOCKAGE_BITS) - 1)
+#define ENCODE_BLOCKAGE(U,R) \
+ ((((U) << UNIT_BITS) << BLOCKAGE_BITS \
+ | MIN_BLOCKAGE_COST (R)) << BLOCKAGE_BITS \
+ | MAX_BLOCKAGE_COST (R))
+#define UNIT_BLOCKED(B) ((B) >> (2 * BLOCKAGE_BITS))
+#define BLOCKAGE_RANGE(B) \
+ (((((B) >> BLOCKAGE_BITS) & BLOCKAGE_MASK) << (HOST_BITS_PER_INT / 2)) \
+ | (B) & BLOCKAGE_MASK)
+
+/* Encodings of the `<name>_unit_blockage_range' function. */
+#define MIN_BLOCKAGE_COST(R) ((R) >> (HOST_BITS_PER_INT / 2))
+#define MAX_BLOCKAGE_COST(R) ((R) & ((1 << (HOST_BITS_PER_INT / 2)) - 1))
+
#define DONE_PRIORITY -1
#define MAX_PRIORITY 0x7fffffff
#define TAIL_PRIORITY 0x7ffffffe
/* Regset telling whether a given register is live after the insn currently
being scheduled. Before processing an insn, this is equal to bb_live_regs
- above. This is used so that we can find regsiters that are newly born/dead
+ above. This is used so that we can find registers that are newly born/dead
after processing an insn. */
static regset old_live_regs;
/* An instruction is ready to be scheduled when all insns following it
have already been scheduled. It is important to ensure that all
insns which use its result will not be executed until its result
- has been computed. We maintain three lists (conceptually):
-
- (1) a "Ready" list of unscheduled, uncommitted insns
- (2) a "Scheduled" list of scheduled insns
- (3) a "Pending" list of insns which can be scheduled, but
- for stalls.
-
- Insns move from the "Ready" list to the "Pending" list when
- all insns following them have been scheduled.
-
- Insns move from the "Pending" list to the "Scheduled" list
- when there is sufficient space in the pipeline to prevent
- stalls between the insn and scheduled insns which use it.
+ has been computed. An insn is maintained in one of four structures:
+
+ (P) the "Pending" set of insns which cannot be scheduled until
+ their dependencies have been satisfied.
+ (Q) the "Queued" set of insns that can be scheduled when sufficient
+ time has passed.
+ (R) the "Ready" list of unscheduled, uncommitted insns.
+ (S) the "Scheduled" list of insns.
+
+ Initially, all insns are either "Pending" or "Ready" depending on
+ whether their dependencies are satisfied.
+
+ Insns move from the "Ready" list to the "Scheduled" list as they
+ are committed to the schedule. As this occurs, the insns in the
+ "Pending" list have their dependencies satisfied and move to either
+ the "Ready" list or the "Queued" set depending on whether
+ sufficient time has passed to make them ready. As time passes,
+ insns move from the "Queued" set to the "Ready" list. Insns may
+ move from the "Ready" list to the "Queued" set if they are blocked
+ due to a function unit conflict.
+
+ The "Pending" list (P) are the insns in the LOG_LINKS of the unscheduled
+ insns, i.e., those that are ready, queued, and pending.
+ The "Queued" set (Q) is implemented by the variable `insn_queue'.
+ The "Ready" list (R) is implemented by the variables `ready' and
+ `n_ready'.
+ The "Scheduled" list (S) is the new insn chain built by this pass.
+
+ The transition (R->S) is implemented in the scheduling loop in
+ `schedule_block' when the best insn to schedule is chosen.
+ The transition (R->Q) is implemented in `schedule_select' when an
+ insn is found to to have a function unit conflict with the already
+ committed insns.
+ The transitions (P->R and P->Q) are implemented in `schedule_insn' as
+ insns move from the ready list to the scheduled list.
+ The transition (Q->R) is implemented at the top of the scheduling
+ loop in `schedule_block' as time passes or stalls are introduced. */
+
+/* Implement a circular buffer to delay instructions until sufficient
+ time has passed. INSN_QUEUE_SIZE is a power of two larger than
+ MAX_BLOCKAGE and MAX_READY_COST computed by genattr.c. This is the
+ longest time an isnsn may be queued. */
+static rtx insn_queue[INSN_QUEUE_SIZE];
+static int q_ptr = 0;
+static int q_size = 0;
+#define NEXT_Q(X) (((X)+1) & (INSN_QUEUE_SIZE-1))
+#define NEXT_Q_AFTER(X,C) (((X)+C) & (INSN_QUEUE_SIZE-1))
- The "Pending" list acts as a buffer to prevent insns
- from avalanching.
+/* Vector indexed by INSN_UID giving the minimum clock tick at which
+ the insn becomes ready. This is used to note timing constraints for
+ insns in the pending list. */
+static int *insn_tick;
+#define INSN_TICK(INSN) (insn_tick[INSN_UID (INSN)])
- The "Ready" list is implemented by the variable `ready'.
- The "Pending" list are the insns in the LOG_LINKS of ready insns.
- The "Scheduled" list is the new insn chain built by this pass. */
+/* Data structure for keeping track of register information
+ during that register's life. */
-/* Implement a circular buffer from which instructions are issued. */
-#define Q_SIZE 128
-static rtx insn_queue[Q_SIZE];
-static int q_ptr = 0;
-static int q_size = 0;
-#define NEXT_Q(X) (((X)+1) & (Q_SIZE-1))
-#define NEXT_Q_AFTER(X,C) (((X)+C) & (Q_SIZE-1))
+struct sometimes
+{
+ int regno;
+ int live_length;
+ int calls_crossed;
+};
/* Forward declarations. */
-static void sched_analyze_2 ();
-static void schedule_block ();
+static rtx canon_rtx PROTO((rtx));
+static int rtx_equal_for_memref_p PROTO((rtx, rtx));
+static rtx find_symbolic_term PROTO((rtx));
+static int memrefs_conflict_p PROTO((int, rtx, int, rtx,
+ HOST_WIDE_INT));
+static void add_dependence PROTO((rtx, rtx, enum reg_note));
+static void remove_dependence PROTO((rtx, rtx));
+static rtx find_insn_list PROTO((rtx, rtx));
+static int insn_unit PROTO((rtx));
+static unsigned int blockage_range PROTO((int, rtx));
+static void clear_units PROTO((void));
+static void prepare_unit PROTO((int));
+static int actual_hazard_this_instance PROTO((int, int, rtx, int, int));
+static void schedule_unit PROTO((int, rtx, int));
+static int actual_hazard PROTO((int, rtx, int, int));
+static int potential_hazard PROTO((int, rtx, int));
+static int insn_cost PROTO((rtx, rtx, rtx));
+static int priority PROTO((rtx));
+static void free_pending_lists PROTO((void));
+static void add_insn_mem_dependence PROTO((rtx *, rtx *, rtx, rtx));
+static void flush_pending_lists PROTO((rtx, int));
+static void sched_analyze_1 PROTO((rtx, rtx));
+static void sched_analyze_2 PROTO((rtx, rtx));
+static void sched_analyze_insn PROTO((rtx, rtx, rtx));
+static int sched_analyze PROTO((rtx, rtx));
+static void sched_note_set PROTO((int, rtx, int));
+static int rank_for_schedule PROTO((rtx *, rtx *));
+static void swap_sort PROTO((rtx *, int));
+static void queue_insn PROTO((rtx, int));
+static int birthing_insn PROTO((rtx));
+static void adjust_priority PROTO((rtx));
+static int schedule_insn PROTO((rtx, rtx *, int, int));
+static int schedule_select PROTO((rtx *, int, int, FILE *));
+static void create_reg_dead_note PROTO((rtx, rtx));
+static void attach_deaths PROTO((rtx, rtx, int));
+static void attach_deaths_insn PROTO((rtx));
+static rtx unlink_notes PROTO((rtx, rtx));
+static int new_sometimes_live PROTO((struct sometimes *, int, int));
+static void finish_sometimes_live PROTO((struct sometimes *, int));
+static rtx reemit_notes PROTO((rtx, rtx));
+static void schedule_block PROTO((int, FILE *));
+static rtx regno_use_in PROTO((int, rtx));
+static void split_hard_reg_notes PROTO((rtx, rtx, rtx, rtx));
+static void new_insn_dead_notes PROTO((rtx, rtx, rtx, rtx));
+static void update_n_sets PROTO((rtx, int));
+static void update_flow_info PROTO((rtx, rtx, rtx, rtx));
/* Main entry point of this file. */
-void schedule_insns ();
+void schedule_insns PROTO((FILE *));
+
+#endif /* INSN_SCHEDULING */
\f
#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
for pseudo-register N. */
static rtx *reg_known_value;
+/* Vector recording for each reg_known_value whether it is due to a
+ REG_EQUIV note. Future passes (viz., reload) may replace the
+ pseudo with the equivalent expression and so we account for the
+ dependences that would be introduced if that happens. */
+/* ??? This is a problem only on the Convex. The REG_EQUIV notes created in
+ assign_parms mention the arg pointer, and there are explicit insns in the
+ RTL that modify the arg pointer. Thus we must ensure that such insns don't
+ get scheduled across each other because that would invalidate the REG_EQUIV
+ notes. One could argue that the REG_EQUIV notes are wrong, but solving
+ the problem in the scheduler will likely give better code, so we do it
+ here. */
+static char *reg_known_equiv_p;
+
/* Indicates number of valid entries in reg_known_value. */
static int reg_known_value_size;
canon_rtx (x)
rtx x;
{
+ /* Recursively look for equivalences. */
if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
&& REGNO (x) <= reg_known_value_size)
- return reg_known_value[REGNO (x)];
+ return reg_known_value[REGNO (x)] == x
+ ? x : canon_rtx (reg_known_value[REGNO (x)]);
else if (GET_CODE (x) == PLUS)
{
rtx x0 = canon_rtx (XEXP (x, 0));
return gen_rtx (PLUS, GET_MODE (x), x0, x1);
}
}
+ /* This gives us much better alias analysis when called from
+ the loop optimizer. Note we want to leave the original
+ MEM alone, but need to return the canonicalized MEM with
+ all the flags with their original values. */
+ else if (GET_CODE (x) == MEM)
+ {
+ rtx copy = copy_rtx (x);
+ XEXP (copy, 0) = canon_rtx (XEXP (copy, 0));
+ x = copy;
+ }
return x;
}
reg_known_value
= (rtx *) oballoc ((maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx))
- FIRST_PSEUDO_REGISTER;
- bzero (reg_known_value+FIRST_PSEUDO_REGISTER,
+ bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER),
(maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx));
+ reg_known_equiv_p
+ = (char *) oballoc ((maxreg -FIRST_PSEUDO_REGISTER) * sizeof (char))
+ - FIRST_PSEUDO_REGISTER;
+ bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER,
+ (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char));
+
/* Fill in the entries with known constant values. */
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
if ((set = single_set (insn)) != 0
&& GET_CODE (SET_DEST (set)) == REG
&& REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
&& (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
- && reg_n_sets[REGNO (SET_DEST (set))] == 1)
- || (note = find_reg_note (insn, REG_EQUIV, 0)) != 0)
+ && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
+ || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
&& GET_CODE (XEXP (note, 0)) != EXPR_LIST)
- reg_known_value[REGNO (SET_DEST (set))] = XEXP (note, 0);
+ {
+ int regno = REGNO (SET_DEST (set));
+ reg_known_value[regno] = XEXP (note, 0);
+ reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
+ }
/* Fill in the remaining entries. */
while (--maxreg >= FIRST_PSEUDO_REGISTER)
if (code == SYMBOL_REF)
return XSTR (x, 0) == XSTR (y, 0);
+ /* For commutative operations, the RTX match if the operand match in any
+ order. Also handle the simple binary and unary cases without a loop. */
+ if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
+ return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
+ && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
+ || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
+ && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
+ else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
+ return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
+ && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
+ else if (GET_RTX_CLASS (code) == '1')
+ return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
+
/* Compare the elements. If any pair of corresponding elements
fail to match, return 0 for the whole things. */
{
switch (fmt[i])
{
+ case 'w':
+ if (XWINT (x, i) != XWINT (y, i))
+ return 0;
+ break;
+
case 'n':
case 'i':
if (XINT (x, i) != XINT (y, i))
with addresses involving static variables.
(2) static variables with different addresses cannot conflict.
- Nice to notice that varying addresses cannot confict with fp if no
+ Nice to notice that varying addresses cannot conflict with fp if no
local variables had their addresses taken, but that's too hard now. */
+/* ??? In Fortran, references to a array parameter can never conflict with
+ another array parameter. */
+
static int
memrefs_conflict_p (xsize, x, ysize, y, c)
rtx x, y;
int xsize, ysize;
- int c;
+ HOST_WIDE_INT c;
{
if (GET_CODE (x) == HIGH)
x = XEXP (x, 0);
y = canon_rtx (y);
if (rtx_equal_for_memref_p (x, y))
- return (xsize == 0 || ysize == 0 ||
- (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
+ return (xsize == 0 || ysize == 0
+ || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
- if (y == frame_pointer_rtx || y == stack_pointer_rtx)
+ if (y == frame_pointer_rtx || y == hard_frame_pointer_rtx
+ || y == stack_pointer_rtx)
{
rtx t = y;
int tsize = ysize;
x = t; xsize = tsize;
}
- if (x == frame_pointer_rtx || x == stack_pointer_rtx)
+ if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
+ || x == stack_pointer_rtx)
{
rtx y1;
if (GET_CODE (x) == PLUS)
{
- /* The fact that X is canonnicallized means that this
- PLUS rtx is canonnicallized. */
+ /* The fact that X is canonicalized means that this
+ PLUS rtx is canonicalized. */
rtx x0 = XEXP (x, 0);
rtx x1 = XEXP (x, 1);
if (GET_CODE (y) == PLUS)
{
- /* The fact that Y is canonnicallized means that this
- PLUS rtx is canonnicallized. */
+ /* The fact that Y is canonicalized means that this
+ PLUS rtx is canonicalized. */
rtx y0 = XEXP (y, 0);
rtx y1 = XEXP (y, 1);
}
else if (GET_CODE (y) == PLUS)
{
- /* The fact that Y is canonnicallized means that this
- PLUS rtx is canonnicallized. */
+ /* The fact that Y is canonicalized means that this
+ PLUS rtx is canonicalized. */
rtx y0 = XEXP (y, 0);
rtx y1 = XEXP (y, 1);
changed. A volatile and non-volatile reference can be interchanged
though.
- A MEM_IN_STRUCT reference at a varying address can never conflict with a
- non-MEM_IN_STRUCT reference at a fixed address. */
+ A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never
+ conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must
+ allow QImode aliasing because the ANSI C standard allows character
+ pointers to alias anything. We are assuming that characters are
+ always QImode here. We also must allow AND addresses, because they may
+ generate accesses outside the object being referenced. This is used to
+ generate aligned addresses from unaligned addresses, for instance, the
+ alpha storeqi_unaligned pattern. */
/* Read dependence: X is read after read in MEM takes place. There can
only be a dependence here if both reads are volatile. */
rtx mem;
rtx x;
{
- if (RTX_UNCHANGING_P (x))
+ /* If X is an unchanging read, then it can't possibly conflict with any
+ non-unchanging store. It may conflict with an unchanging write though,
+ because there may be a single store to this address to initialize it.
+ Just fall through to the code below to resolve the case where we have
+ both an unchanging read and an unchanging write. This won't handle all
+ cases optimally, but the possible performance loss should be
+ negligible. */
+ x = canon_rtx (x);
+ mem = canon_rtx (mem);
+ if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
return 0;
return ((MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
|| (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
SIZE_FOR_MODE (x), XEXP (x, 0), 0)
&& ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
+ && GET_MODE (mem) != QImode
+ && GET_CODE (XEXP (mem, 0)) != AND
&& ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
&& ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
+ && GET_MODE (x) != QImode
+ && GET_CODE (XEXP (x, 0)) != AND
&& ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))));
}
rtx mem;
rtx x;
{
+ /* If MEM is an unchanging read, then it can't possibly conflict with
+ the store to X, because there is at most one store to MEM, and it must
+ have occurred somewhere before MEM. */
+ x = canon_rtx (x);
+ mem = canon_rtx (mem);
if (RTX_UNCHANGING_P (mem))
return 0;
|| (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
SIZE_FOR_MODE (x), XEXP (x, 0), 0)
&& ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
+ && GET_MODE (mem) != QImode
+ && GET_CODE (XEXP (mem, 0)) != AND
&& ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
&& ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
+ && GET_MODE (x) != QImode
+ && GET_CODE (XEXP (x, 0)) != AND
&& ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))));
}
rtx mem;
rtx x;
{
+ x = canon_rtx (x);
+ mem = canon_rtx (mem);
return ((MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
|| (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
SIZE_FOR_MODE (x), XEXP (x, 0), 0)
&& ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
+ && GET_MODE (mem) != QImode
+ && GET_CODE (XEXP (mem, 0)) != AND
&& ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
&& ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
+ && GET_MODE (x) != QImode
+ && GET_CODE (XEXP (x, 0)) != AND
&& ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))));
}
\f
LOG_LINKS of INSN, if not already there. DEP_TYPE indicates the type
of dependence that this link represents. */
-void
+static void
add_dependence (insn, elem, dep_type)
rtx insn;
rtx elem;
next = NEXT_INSN (next);
#endif
- if (next && SCHED_GROUP_P (next))
+ if (next && SCHED_GROUP_P (next)
+ && GET_CODE (next) != CODE_LABEL)
{
/* Notes will never intervene here though, so don't bother checking
for them. */
- while (NEXT_INSN (next) && SCHED_GROUP_P (NEXT_INSN (next)))
+ /* We must reject CODE_LABELs, so that we don't get confused by one
+ that has LABEL_PRESERVE_P set, which is represented by the same
+ bit in the rtl as SCHED_GROUP_P. A CODE_LABEL can never be
+ SCHED_GROUP_P. */
+ while (NEXT_INSN (next) && SCHED_GROUP_P (NEXT_INSN (next))
+ && GET_CODE (NEXT_INSN (next)) != CODE_LABEL)
next = NEXT_INSN (next);
/* Again, don't depend an insn on itself. */
/* Remove ELEM wrapped in an INSN_LIST from the LOG_LINKS
of INSN. Abort if not found. */
-void
+
+static void
remove_dependence (insn, elem)
rtx insn;
rtx elem;
}
\f
#ifndef INSN_SCHEDULING
-void schedule_insns () {}
+void
+schedule_insns (dump_file)
+ FILE *dump_file;
+{
+}
#else
#ifndef __GNUC__
#define __inline
return 0;
}
-/* Compute cost of executing INSN. This is the number of virtual
- cycles taken between instruction issue and instruction results. */
+/* Compute the function units used by INSN. This caches the value
+ returned by function_units_used. A function unit is encoded as the
+ unit number if the value is non-negative and the compliment of a
+ mask if the value is negative. A function unit index is the
+ non-negative encoding. */
__inline static int
-insn_cost (insn)
+insn_unit (insn)
rtx insn;
{
- register int cost;
+ register int unit = INSN_UNIT (insn);
- recog_memoized (insn);
+ if (unit == 0)
+ {
+ recog_memoized (insn);
- /* A USE insn, or something else we don't need to understand.
- We can't pass these directly to result_ready_cost because it will trigger
- a fatal error for unrecognizable insns. */
- if (INSN_CODE (insn) < 0)
- return 1;
+ /* A USE insn, or something else we don't need to understand.
+ We can't pass these directly to function_units_used because it will
+ trigger a fatal error for unrecognizable insns. */
+ if (INSN_CODE (insn) < 0)
+ unit = -1;
+ else
+ {
+ unit = function_units_used (insn);
+ /* Increment non-negative values so we can cache zero. */
+ if (unit >= 0) unit++;
+ }
+ /* We only cache 16 bits of the result, so if the value is out of
+ range, don't cache it. */
+ if (FUNCTION_UNITS_SIZE < HOST_BITS_PER_SHORT
+ || unit >= 0
+ || (~unit & ((1 << (HOST_BITS_PER_SHORT - 1)) - 1)) == 0)
+ INSN_UNIT (insn) = unit;
+ }
+ return (unit > 0 ? unit - 1 : unit);
+}
+
+/* Compute the blockage range for executing INSN on UNIT. This caches
+ the value returned by the blockage_range_function for the unit.
+ These values are encoded in an int where the upper half gives the
+ minimum value and the lower half gives the maximum value. */
+
+__inline static unsigned int
+blockage_range (unit, insn)
+ int unit;
+ rtx insn;
+{
+ unsigned int blockage = INSN_BLOCKAGE (insn);
+ unsigned int range;
+
+ if (UNIT_BLOCKED (blockage) != unit + 1)
+ {
+ range = function_units[unit].blockage_range_function (insn);
+ /* We only cache the blockage range for one unit and then only if
+ the values fit. */
+ if (HOST_BITS_PER_INT >= UNIT_BITS + 2 * BLOCKAGE_BITS)
+ INSN_BLOCKAGE (insn) = ENCODE_BLOCKAGE (unit + 1, range);
+ }
+ else
+ range = BLOCKAGE_RANGE (blockage);
+
+ return range;
+}
+
+/* A vector indexed by function unit instance giving the last insn to use
+ the unit. The value of the function unit instance index for unit U
+ instance I is (U + I * FUNCTION_UNITS_SIZE). */
+static rtx unit_last_insn[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY];
+
+/* A vector indexed by function unit instance giving the minimum time when
+ the unit will unblock based on the maximum blockage cost. */
+static int unit_tick[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY];
+
+/* A vector indexed by function unit number giving the number of insns
+ that remain to use the unit. */
+static int unit_n_insns[FUNCTION_UNITS_SIZE];
+
+/* Reset the function unit state to the null state. */
+
+static void
+clear_units ()
+{
+ bzero ((char *) unit_last_insn, sizeof (unit_last_insn));
+ bzero ((char *) unit_tick, sizeof (unit_tick));
+ bzero ((char *) unit_n_insns, sizeof (unit_n_insns));
+}
+
+/* Record an insn as one that will use the units encoded by UNIT. */
+
+__inline static void
+prepare_unit (unit)
+ int unit;
+{
+ int i;
+
+ if (unit >= 0)
+ unit_n_insns[unit]++;
+ else
+ for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
+ if ((unit & 1) != 0)
+ prepare_unit (i);
+}
+
+/* Return the actual hazard cost of executing INSN on the unit UNIT,
+ instance INSTANCE at time CLOCK if the previous actual hazard cost
+ was COST. */
+
+__inline static int
+actual_hazard_this_instance (unit, instance, insn, clock, cost)
+ int unit, instance, clock, cost;
+ rtx insn;
+{
+ int tick = unit_tick[instance];
+
+ if (tick - clock > cost)
+ {
+ /* The scheduler is operating in reverse, so INSN is the executing
+ insn and the unit's last insn is the candidate insn. We want a
+ more exact measure of the blockage if we execute INSN at CLOCK
+ given when we committed the execution of the unit's last insn.
+
+ The blockage value is given by either the unit's max blockage
+ constant, blockage range function, or blockage function. Use
+ the most exact form for the given unit. */
+
+ if (function_units[unit].blockage_range_function)
+ {
+ if (function_units[unit].blockage_function)
+ tick += (function_units[unit].blockage_function
+ (insn, unit_last_insn[instance])
+ - function_units[unit].max_blockage);
+ else
+ tick += ((int) MAX_BLOCKAGE_COST (blockage_range (unit, insn))
+ - function_units[unit].max_blockage);
+ }
+ if (tick - clock > cost)
+ cost = tick - clock;
+ }
+ return cost;
+}
+
+/* Record INSN as having begun execution on the units encoded by UNIT at
+ time CLOCK. */
+
+__inline static void
+schedule_unit (unit, insn, clock)
+ int unit, clock;
+ rtx insn;
+{
+ int i;
+
+ if (unit >= 0)
+ {
+ int instance = unit;
+#if MAX_MULTIPLICITY > 1
+ /* Find the first free instance of the function unit and use that
+ one. We assume that one is free. */
+ for (i = function_units[unit].multiplicity - 1; i > 0; i--)
+ {
+ if (! actual_hazard_this_instance (unit, instance, insn, clock, 0))
+ break;
+ instance += FUNCTION_UNITS_SIZE;
+ }
+#endif
+ unit_last_insn[instance] = insn;
+ unit_tick[instance] = (clock + function_units[unit].max_blockage);
+ }
+ else
+ for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
+ if ((unit & 1) != 0)
+ schedule_unit (i, insn, clock);
+}
+
+/* Return the actual hazard cost of executing INSN on the units encoded by
+ UNIT at time CLOCK if the previous actual hazard cost was COST. */
+
+__inline static int
+actual_hazard (unit, insn, clock, cost)
+ int unit, clock, cost;
+ rtx insn;
+{
+ int i;
+
+ if (unit >= 0)
+ {
+ /* Find the instance of the function unit with the minimum hazard. */
+ int instance = unit;
+ int best_cost = actual_hazard_this_instance (unit, instance, insn,
+ clock, cost);
+ int this_cost;
+
+#if MAX_MULTIPLICITY > 1
+ if (best_cost > cost)
+ {
+ for (i = function_units[unit].multiplicity - 1; i > 0; i--)
+ {
+ instance += FUNCTION_UNITS_SIZE;
+ this_cost = actual_hazard_this_instance (unit, instance, insn,
+ clock, cost);
+ if (this_cost < best_cost)
+ {
+ best_cost = this_cost;
+ if (this_cost <= cost)
+ break;
+ }
+ }
+ }
+#endif
+ cost = MAX (cost, best_cost);
+ }
else
+ for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
+ if ((unit & 1) != 0)
+ cost = actual_hazard (i, insn, clock, cost);
+
+ return cost;
+}
+
+/* Return the potential hazard cost of executing an instruction on the
+ units encoded by UNIT if the previous potential hazard cost was COST.
+ An insn with a large blockage time is chosen in preference to one
+ with a smaller time; an insn that uses a unit that is more likely
+ to be used is chosen in preference to one with a unit that is less
+ used. We are trying to minimize a subsequent actual hazard. */
+
+__inline static int
+potential_hazard (unit, insn, cost)
+ int unit, cost;
+ rtx insn;
+{
+ int i, ncost;
+ unsigned int minb, maxb;
+
+ if (unit >= 0)
+ {
+ minb = maxb = function_units[unit].max_blockage;
+ if (maxb > 1)
+ {
+ if (function_units[unit].blockage_range_function)
+ {
+ maxb = minb = blockage_range (unit, insn);
+ maxb = MAX_BLOCKAGE_COST (maxb);
+ minb = MIN_BLOCKAGE_COST (minb);
+ }
+
+ if (maxb > 1)
+ {
+ /* Make the number of instructions left dominate. Make the
+ minimum delay dominate the maximum delay. If all these
+ are the same, use the unit number to add an arbitrary
+ ordering. Other terms can be added. */
+ ncost = minb * 0x40 + maxb;
+ ncost *= (unit_n_insns[unit] - 1) * 0x1000 + unit;
+ if (ncost > cost)
+ cost = ncost;
+ }
+ }
+ }
+ else
+ for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
+ if ((unit & 1) != 0)
+ cost = potential_hazard (i, insn, cost);
+
+ return cost;
+}
+
+/* Compute cost of executing INSN given the dependence LINK on the insn USED.
+ This is the number of virtual cycles taken between instruction issue and
+ instruction results. */
+
+__inline static int
+insn_cost (insn, link, used)
+ rtx insn, link, used;
+{
+ register int cost = INSN_COST (insn);
+
+ if (cost == 0)
{
- cost = result_ready_cost (insn);
+ recog_memoized (insn);
+
+ /* A USE insn, or something else we don't need to understand.
+ We can't pass these directly to result_ready_cost because it will
+ trigger a fatal error for unrecognizable insns. */
+ if (INSN_CODE (insn) < 0)
+ {
+ INSN_COST (insn) = 1;
+ return 1;
+ }
+ else
+ {
+ cost = result_ready_cost (insn);
+
+ if (cost < 1)
+ cost = 1;
- if (cost < 1)
- cost = 1;
+ INSN_COST (insn) = cost;
+ }
+ }
- return cost;
+ /* A USE insn should never require the value used to be computed. This
+ allows the computation of a function's result and parameter values to
+ overlap the return and call. */
+ recog_memoized (used);
+ if (INSN_CODE (used) < 0)
+ LINK_COST_FREE (link) = 1;
+
+ /* If some dependencies vary the cost, compute the adjustment. Most
+ commonly, the adjustment is complete: either the cost is ignored
+ (in the case of an output- or anti-dependence), or the cost is
+ unchanged. These values are cached in the link as LINK_COST_FREE
+ and LINK_COST_ZERO. */
+
+ if (LINK_COST_FREE (link))
+ cost = 1;
+#ifdef ADJUST_COST
+ else if (! LINK_COST_ZERO (link))
+ {
+ int ncost = cost;
+
+ ADJUST_COST (used, link, insn, ncost);
+ if (ncost <= 1)
+ LINK_COST_FREE (link) = ncost = 1;
+ if (cost == ncost)
+ LINK_COST_ZERO (link) = 1;
+ cost = ncost;
}
+#endif
+ return cost;
}
/* Compute the priority number for INSN. */
{
rtx x = XEXP (prev, 0);
- /* A dependence pointing to a note is always obsolete, because
- sched_analyze_insn will have created any necessary new dependences
- which replace it. Notes can be created when instructions are
- deleted by insn splitting, or by register allocation. */
- if (GET_CODE (x) == NOTE)
+ /* A dependence pointing to a note or deleted insn is always
+ obsolete, because sched_analyze_insn will have created any
+ necessary new dependences which replace it. Notes and deleted
+ insns can be created when instructions are deleted by insn
+ splitting, or by register allocation. */
+ if (GET_CODE (x) == NOTE || INSN_DELETED_P (x))
{
remove_dependence (insn, x);
continue;
}
+ /* Clear the link cost adjustment bits. */
+ LINK_COST_FREE (prev) = 0;
+#ifdef ADJUST_COST
+ LINK_COST_ZERO (prev) = 0;
+#endif
+
/* This priority calculation was chosen because it results in the
least instruction movement, and does not hurt the performance
of the resulting code compared to the old algorithm.
insn_cost of the current instruction to its priority (e.g.
move the insn_cost call down to the end). */
- if (REG_NOTE_KIND (prev) == 0)
- /* Data dependence. */
- prev_priority = priority (x) + insn_cost (x) - 1;
- else
- /* Anti or output dependence. Don't add the latency of this
- insn's result, because it isn't being used. */
- prev_priority = priority (x);
+ prev_priority = priority (x) + insn_cost (x, prev, insn) - 1;
if (prev_priority > max_priority)
max_priority = prev_priority;
INSN_REF_COUNT (x) += 1;
}
+ prepare_unit (insn_unit (insn));
INSN_PRIORITY (insn) = max_priority;
return INSN_PRIORITY (insn);
}
}
\f
/* Make a dependency between every memory reference on the pending lists
- and INSN, thus flushing the pending lists. */
+ and INSN, thus flushing the pending lists. If ONLY_WRITE, don't flush
+ the read list. */
static void
-flush_pending_lists (insn)
+flush_pending_lists (insn, only_write)
rtx insn;
+ int only_write;
{
rtx link;
- while (pending_read_insns)
+ while (pending_read_insns && ! only_write)
{
add_dependence (insn, XEXP (pending_read_insns, 0), REG_DEP_ANTI);
if (GET_CODE (dest) == REG)
{
- register int offset, bit, i;
+ register int i;
regno = REGNO (dest);
if (reg_last_sets[regno + i])
add_dependence (insn, reg_last_sets[regno + i],
REG_DEP_OUTPUT);
- reg_last_sets[regno + i] = insn;
+ SET_REGNO_REG_SET (reg_pending_sets, regno + i);
if ((call_used_regs[i] || global_regs[i])
&& last_function_call)
/* Function calls clobber all call_used regs. */
reg_last_uses[regno] = 0;
if (reg_last_sets[regno])
add_dependence (insn, reg_last_sets[regno], REG_DEP_OUTPUT);
- reg_last_sets[regno] = insn;
+ SET_REGNO_REG_SET (reg_pending_sets, regno);
+
+ /* Pseudos that are REG_EQUIV to something may be replaced
+ by that during reloading. We need only add dependencies for
+ the address in the REG_EQUIV note. */
+ if (! reload_completed
+ && reg_known_equiv_p[regno]
+ && GET_CODE (reg_known_value[regno]) == MEM)
+ sched_analyze_2 (XEXP (reg_known_value[regno], 0), insn);
/* Don't let it cross a call after scheduling if it doesn't
already cross one. */
- if (reg_n_calls_crossed[regno] == 0 && last_function_call)
+ if (REG_N_CALLS_CROSSED (regno) == 0 && last_function_call)
add_dependence (insn, last_function_call, REG_DEP_ANTI);
}
}
/* Flush all pending reads and writes to prevent the pending lists
from getting any larger. Insn scheduling runs too slowly when
these lists get long. The number 32 was chosen because it
- seems like a resonable number. When compiling GCC with itself,
+ seems like a reasonable number. When compiling GCC with itself,
this flush occurs 8 times for sparc, and 10 times for m88k using
the number 32. */
- flush_pending_lists (insn);
+ flush_pending_lists (insn, 0);
}
else
{
{
/* If a dependency already exists, don't create a new one. */
if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
- if (anti_dependence (XEXP (pending_mem, 0), dest, insn))
+ if (anti_dependence (XEXP (pending_mem, 0), dest))
add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
pending = XEXP (pending, 1);
{
rtx link, prev;
+ /* User of CC0 depends on immediately preceding insn. */
+ SCHED_GROUP_P (insn) = 1;
+
/* There may be a note before this insn now, but all notes will
be removed before we actually try to schedule the insns, so
it won't cause a problem later. We must avoid it here though. */
-
- /* User of CC0 depends on immediately preceding insn. */
- SCHED_GROUP_P (insn) = 1;
+ prev = prev_nonnote_insn (insn);
/* Make a copy of all dependencies on the immediately previous insn,
and add to this insn. This is so that all the dependencies will
- apply to the group. */
+ apply to the group. Remove an explicit dependence on this insn
+ as SCHED_GROUP_P now represents it. */
- prev = PREV_INSN (insn);
- while (GET_CODE (prev) == NOTE)
- prev = PREV_INSN (prev);
+ if (find_insn_list (prev, LOG_LINKS (insn)))
+ remove_dependence (insn, prev);
for (link = LOG_LINKS (prev); link; link = XEXP (link, 1))
- add_dependence (insn, XEXP (link, 0), GET_MODE (link));
+ add_dependence (insn, XEXP (link, 0), REG_NOTE_KIND (link));
return;
}
if (reg_last_sets[regno])
add_dependence (insn, reg_last_sets[regno], 0);
+ /* Pseudos that are REG_EQUIV to something may be replaced
+ by that during reloading. We need only add dependencies for
+ the address in the REG_EQUIV note. */
+ if (! reload_completed
+ && reg_known_equiv_p[regno]
+ && GET_CODE (reg_known_value[regno]) == MEM)
+ sched_analyze_2 (XEXP (reg_known_value[regno], 0), insn);
+
/* If the register does not already cross any calls, then add this
insn to the sched_before_next_call list so that it will still
not cross calls after scheduling. */
- if (reg_n_calls_crossed[regno] == 0)
+ if (REG_N_CALLS_CROSSED (regno) == 0)
add_dependence (sched_before_next_call, insn, REG_DEP_ANTI);
}
return;
{
/* Reading memory. */
- /* Don't create a dependence for memory references which are known to
- be unchanging, such as constant pool accesses. These will never
- conflict with any other memory access. */
- if (RTX_UNCHANGING_P (x) == 0)
+ rtx pending, pending_mem;
+
+ pending = pending_read_insns;
+ pending_mem = pending_read_mems;
+ while (pending)
{
- rtx pending, pending_mem;
+ /* If a dependency already exists, don't create a new one. */
+ if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
+ if (read_dependence (XEXP (pending_mem, 0), x))
+ add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
- pending = pending_read_insns;
- pending_mem = pending_read_mems;
- while (pending)
- {
- /* If a dependency already exists, don't create a new one. */
- if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
- if (read_dependence (XEXP (pending_mem, 0), x))
- add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
+ pending = XEXP (pending, 1);
+ pending_mem = XEXP (pending_mem, 1);
+ }
- pending = XEXP (pending, 1);
- pending_mem = XEXP (pending_mem, 1);
- }
+ pending = pending_write_insns;
+ pending_mem = pending_write_mems;
+ while (pending)
+ {
+ /* If a dependency already exists, don't create a new one. */
+ if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
+ if (true_dependence (XEXP (pending_mem, 0), x))
+ add_dependence (insn, XEXP (pending, 0), 0);
- pending = pending_write_insns;
- pending_mem = pending_write_mems;
- while (pending)
- {
- /* If a dependency already exists, don't create a new one. */
- if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
- if (true_dependence (XEXP (pending_mem, 0), x))
- add_dependence (insn, XEXP (pending, 0), 0);
+ pending = XEXP (pending, 1);
+ pending_mem = XEXP (pending_mem, 1);
+ }
+ if (last_pending_memory_flush)
+ add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
- pending = XEXP (pending, 1);
- pending_mem = XEXP (pending_mem, 1);
- }
- if (last_pending_memory_flush)
- add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
+ /* Always add these dependencies to pending_reads, since
+ this insn may be followed by a write. */
+ add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
+ insn, x);
- /* Always add these dependencies to pending_reads, since
- this insn may be followed by a write. */
- add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
- insn, x);
- }
/* Take advantage of tail recursion here. */
sched_analyze_2 (XEXP (x, 0), insn);
return;
case ASM_OPERANDS:
case ASM_INPUT:
case UNSPEC_VOLATILE:
+ case TRAP_IF:
{
rtx u;
/* Traditional and volatile asm instructions must be considered to use
- and clobber all hard registers and all of memory. So must
- UNSPEC_VOLATILE operations. */
- if ((code == ASM_OPERANDS && MEM_VOLATILE_P (x)) || code == ASM_INPUT
- || code == UNSPEC_VOLATILE)
+ and clobber all hard registers, all pseudo-registers and all of
+ memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
+
+ Consider for instance a volatile asm that changes the fpu rounding
+ mode. An insn should not be moved across this even if it only uses
+ pseudo-regs because it might give an incorrectly rounded result. */
+ if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
{
- for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ int max_reg = max_reg_num ();
+ for (i = 0; i < max_reg; i++)
{
for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
- if (GET_CODE (PATTERN (XEXP (u, 0))) != USE)
- add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
+ add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
reg_last_uses[i] = 0;
- if (reg_last_sets[i]
- && GET_CODE (PATTERN (reg_last_sets[i])) != USE)
+ if (reg_last_sets[i])
add_dependence (insn, reg_last_sets[i], 0);
- reg_last_sets[i] = insn;
}
+ reg_pending_sets_all = 1;
- flush_pending_lists (insn);
+ flush_pending_lists (insn, 0);
}
/* For all ASM_OPERANDS, we must traverse the vector of input operands.
case POST_DEC:
case PRE_INC:
case POST_INC:
- /* These read and modify the result; just consider them writes. */
+ /* These both read and modify the result. We must handle them as writes
+ to get proper dependencies for following instructions. We must handle
+ them as reads to get proper dependencies from this to previous
+ instructions. Thus we need to pass them to both sched_analyze_1
+ and sched_analyze_2. We must call sched_analyze_2 first in order
+ to get the proper antecedent for the read. */
+ sched_analyze_2 (XEXP (x, 0), insn);
sched_analyze_1 (x, insn);
return;
}
/* Analyze an INSN with pattern X to find all dependencies. */
static void
-sched_analyze_insn (x, insn)
+sched_analyze_insn (x, insn, loop_notes)
rtx x, insn;
+ rtx loop_notes;
{
register RTX_CODE code = GET_CODE (x);
rtx link;
+ int maxreg = max_reg_num ();
+ int i;
if (code == SET || code == CLOBBER)
sched_analyze_1 (x, insn);
else
sched_analyze_2 (x, insn);
- /* Handle function calls. */
+ /* Mark registers CLOBBERED or used by called function. */
if (GET_CODE (insn) == CALL_INSN)
+ for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
+ {
+ if (GET_CODE (XEXP (link, 0)) == CLOBBER)
+ sched_analyze_1 (XEXP (link, 0), insn);
+ else
+ sched_analyze_2 (XEXP (link, 0), insn);
+ }
+
+ /* If there is a {LOOP,EHREGION}_{BEG,END} note in the middle of a basic block, then
+ we must be sure that no instructions are scheduled across it.
+ Otherwise, the reg_n_refs info (which depends on loop_depth) would
+ become incorrect. */
+
+ if (loop_notes)
+ {
+ int max_reg = max_reg_num ();
+ rtx link;
+
+ for (i = 0; i < max_reg; i++)
+ {
+ rtx u;
+ for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
+ add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
+ reg_last_uses[i] = 0;
+ if (reg_last_sets[i])
+ add_dependence (insn, reg_last_sets[i], 0);
+ }
+ reg_pending_sets_all = 1;
+
+ flush_pending_lists (insn, 0);
+
+ link = loop_notes;
+ while (XEXP (link, 1))
+ link = XEXP (link, 1);
+ XEXP (link, 1) = REG_NOTES (insn);
+ REG_NOTES (insn) = loop_notes;
+ }
+
+ /* After reload, it is possible for an instruction to have a REG_DEAD note
+ for a register that actually dies a few instructions earlier. For
+ example, this can happen with SECONDARY_MEMORY_NEEDED reloads.
+ In this case, we must consider the insn to use the register mentioned
+ in the REG_DEAD note. Otherwise, we may accidentally move this insn
+ after another insn that sets the register, thus getting obviously invalid
+ rtl. This confuses reorg which believes that REG_DEAD notes are still
+ meaningful.
+
+ ??? We would get better code if we fixed reload to put the REG_DEAD
+ notes in the right places, but that may not be worth the effort. */
+
+ if (reload_completed)
+ {
+ rtx note;
+
+ for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ if (REG_NOTE_KIND (note) == REG_DEAD)
+ sched_analyze_2 (XEXP (note, 0), insn);
+ }
+
+ EXECUTE_IF_SET_AND_RESET_IN_REG_SET (reg_pending_sets, 0, i,
+ {
+ reg_last_sets[i] = insn;
+ });
+
+ if (reg_pending_sets_all)
+ {
+ for (i = 0; i < maxreg; i++)
+ reg_last_sets[i] = insn;
+ reg_pending_sets_all = 0;
+ }
+
+ /* Handle function calls and function returns created by the epilogue
+ threading code. */
+ if (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
{
rtx dep_insn;
rtx prev_dep_insn;
/* When scheduling instructions, we make sure calls don't lose their
- accompanying USE insns by depending them one on another in order. */
+ accompanying USE insns by depending them one on another in order.
+
+ Also, we must do the same thing for returns created by the epilogue
+ threading code. Note this code works only in this special case,
+ because other passes make no guarantee that they will never emit
+ an instruction between a USE and a RETURN. There is such a guarantee
+ for USE instructions immediately before a call. */
prev_dep_insn = insn;
dep_insn = PREV_INSN (insn);
while (GET_CODE (dep_insn) == INSN
- && GET_CODE (PATTERN (dep_insn)) == USE)
+ && GET_CODE (PATTERN (dep_insn)) == USE
+ && GET_CODE (XEXP (PATTERN (dep_insn), 0)) == REG)
{
SCHED_GROUP_P (prev_dep_insn) = 1;
group. */
for (link = LOG_LINKS (dep_insn); link; link = XEXP (link, 1))
- add_dependence (insn, XEXP (link, 0), GET_MODE (link));
+ add_dependence (insn, XEXP (link, 0), REG_NOTE_KIND (link));
prev_dep_insn = dep_insn;
dep_insn = PREV_INSN (dep_insn);
register int n_insns = 0;
register rtx u;
register int luid = 0;
+ rtx loop_notes = 0;
for (insn = head; ; insn = NEXT_INSN (insn))
{
if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
{
- sched_analyze_insn (PATTERN (insn), insn);
+ sched_analyze_insn (PATTERN (insn), insn, loop_notes);
+ loop_notes = 0;
n_insns += 1;
}
else if (GET_CODE (insn) == CALL_INSN)
{
- rtx dest = 0;
rtx x;
register int i;
past a void call (i.e. it does not explicitly set the hard
return reg). */
- for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- if (call_used_regs[i] || global_regs[i])
- {
- for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
- if (GET_CODE (PATTERN (XEXP (u, 0))) != USE)
+ /* If this call is followed by a NOTE_INSN_SETJMP, then assume that
+ all registers, not just hard registers, may be clobbered by this
+ call. */
+
+ /* Insn, being a CALL_INSN, magically depends on
+ `last_function_call' already. */
+
+ if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == NOTE
+ && NOTE_LINE_NUMBER (NEXT_INSN (insn)) == NOTE_INSN_SETJMP)
+ {
+ int max_reg = max_reg_num ();
+ for (i = 0; i < max_reg; i++)
+ {
+ for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
- reg_last_uses[i] = 0;
- if (reg_last_sets[i]
- && GET_CODE (PATTERN (reg_last_sets[i])) != USE)
- add_dependence (insn, reg_last_sets[i], REG_DEP_ANTI);
- reg_last_sets[i] = insn;
- /* Insn, being a CALL_INSN, magically depends on
- `last_function_call' already. */
- }
+ reg_last_uses[i] = 0;
+ if (reg_last_sets[i])
+ add_dependence (insn, reg_last_sets[i], 0);
+ }
+ reg_pending_sets_all = 1;
+
+ /* Add a pair of fake REG_NOTEs which we will later
+ convert back into a NOTE_INSN_SETJMP note. See
+ reemit_notes for why we use a pair of of NOTEs. */
+
+ REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD,
+ GEN_INT (0),
+ REG_NOTES (insn));
+ REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD,
+ GEN_INT (NOTE_INSN_SETJMP),
+ REG_NOTES (insn));
+ }
+ else
+ {
+ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+ if (call_used_regs[i] || global_regs[i])
+ {
+ for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
+ add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
+ reg_last_uses[i] = 0;
+ if (reg_last_sets[i])
+ add_dependence (insn, reg_last_sets[i], REG_DEP_ANTI);
+ SET_REGNO_REG_SET (reg_pending_sets, i);
+ }
+ }
/* For each insn which shouldn't cross a call, add a dependence
between that insn and this call insn. */
}
LOG_LINKS (sched_before_next_call) = 0;
- sched_analyze_insn (PATTERN (insn), insn);
+ sched_analyze_insn (PATTERN (insn), insn, loop_notes);
+ loop_notes = 0;
- /* We don't need to flush memory for a function call which does
- not involve memory. */
- if (! CONST_CALL_P (insn))
- {
- /* In the absence of interprocedural alias analysis,
- we must flush all pending reads and writes, and
- start new dependencies starting from here. */
- flush_pending_lists (insn);
- }
+ /* In the absence of interprocedural alias analysis, we must flush
+ all pending reads and writes, and start new dependencies starting
+ from here. But only flush writes for constant calls (which may
+ be passed a pointer to something we haven't written yet). */
+ flush_pending_lists (insn, CONST_CALL_P (insn));
/* Depend this function call (actually, the user of this
function call) on all hard register clobberage. */
n_insns += 1;
}
+ /* See comments on reemit_notes as to why we do this. */
+ else if (GET_CODE (insn) == NOTE
+ && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
+ || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
+ || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
+ || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END
+ || (NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP
+ && GET_CODE (PREV_INSN (insn)) != CALL_INSN)))
+ {
+ loop_notes = gen_rtx (EXPR_LIST, REG_DEAD,
+ GEN_INT (NOTE_BLOCK_NUMBER (insn)), loop_notes);
+ loop_notes = gen_rtx (EXPR_LIST, REG_DEAD,
+ GEN_INT (NOTE_LINE_NUMBER (insn)), loop_notes);
+ CONST_CALL_P (loop_notes) = CONST_CALL_P (insn);
+ }
+
if (insn == tail)
return n_insns;
}
+
+ abort ();
}
\f
/* Called when we see a set of a register. If death is true, then we are
rtx x;
int death;
{
- register int regno, j;
+ register int regno;
register rtx reg = SET_DEST (x);
int subreg_p = 0;
{
/* Must treat modification of just one hardware register of a multi-reg
value or just a byte field of a register exactly the same way that
- mark_set_1 in flow.c does. */
- if (GET_CODE (reg) == ZERO_EXTRACT
- || GET_CODE (reg) == SIGN_EXTRACT
- || (GET_CODE (reg) == SUBREG
- && REG_SIZE (SUBREG_REG (reg)) > REG_SIZE (reg)))
+ mark_set_1 in flow.c does, i.e. anything except a paradoxical subreg
+ does not kill the entire register. */
+ if (GET_CODE (reg) != SUBREG
+ || REG_SIZE (SUBREG_REG (reg)) > REG_SIZE (reg))
subreg_p = 1;
reg = SUBREG_REG (reg);
regno = REGNO (reg);
if (regno >= FIRST_PSEUDO_REGISTER || ! global_regs[regno])
{
- register int offset = regno / REGSET_ELT_BITS;
- register int bit = 1 << (regno % REGSET_ELT_BITS);
-
if (death)
{
/* If we only set part of the register, then this set does not
int j = HARD_REGNO_NREGS (regno, GET_MODE (reg));
while (--j >= 0)
{
- offset = (regno + j) / REGSET_ELT_BITS;
- bit = 1 << ((regno + j) % REGSET_ELT_BITS);
-
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
+ SET_REGNO_REG_SET (bb_dead_regs, regno + j);
}
}
else
{
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno);
+ SET_REGNO_REG_SET (bb_dead_regs, regno);
}
}
else
int j = HARD_REGNO_NREGS (regno, GET_MODE (reg));
while (--j >= 0)
{
- offset = (regno + j) / REGSET_ELT_BITS;
- bit = 1 << ((regno + j) % REGSET_ELT_BITS);
-
- bb_live_regs[offset] |= bit;
- bb_dead_regs[offset] &= ~bit;
+ SET_REGNO_REG_SET (bb_live_regs, regno + j);
+ CLEAR_REGNO_REG_SET (bb_dead_regs, regno + j);
}
}
else
{
- bb_live_regs[offset] |= bit;
- bb_dead_regs[offset] &= ~bit;
+ SET_REGNO_REG_SET (bb_live_regs, regno);
+ CLEAR_REGNO_REG_SET (bb_dead_regs, regno);
}
}
}
}
\f
/* Macros and functions for keeping the priority queue sorted, and
- dealing with queueing and unqueueing of instructions. */
+ dealing with queueing and dequeueing of instructions. */
#define SCHED_SORT(READY, NEW_READY, OLD_READY) \
do { if ((NEW_READY) - (OLD_READY) == 1) \
{
rtx tmp = *y;
rtx tmp2 = *x;
- rtx tmp_dep, tmp2_dep;
+ rtx link;
int tmp_class, tmp2_class;
int value;
2) Anti/Output dependent on last scheduled insn.
3) Independent of last scheduled insn, or has latency of one.
Choose the insn from the highest numbered class if different. */
- tmp_dep = find_insn_list (tmp, LOG_LINKS (last_scheduled_insn));
- if (tmp_dep == 0 || insn_cost (tmp) == 1)
+ link = find_insn_list (tmp, LOG_LINKS (last_scheduled_insn));
+ if (link == 0 || insn_cost (tmp, link, last_scheduled_insn) == 1)
tmp_class = 3;
- else if (REG_NOTE_KIND (tmp_dep) == 0)
+ else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */
tmp_class = 1;
else
tmp_class = 2;
- tmp2_dep = find_insn_list (tmp2, LOG_LINKS (last_scheduled_insn));
- if (tmp2_dep == 0 || insn_cost (tmp2) == 1)
+ link = find_insn_list (tmp2, LOG_LINKS (last_scheduled_insn));
+ if (link == 0 || insn_cost (tmp2, link, last_scheduled_insn) == 1)
tmp2_class = 3;
- else if (REG_NOTE_KIND (tmp2_dep) == 0)
+ else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */
tmp2_class = 1;
else
tmp2_class = 2;
{
rtx dest = SET_DEST (pat);
int i = REGNO (dest);
- int offset = i / REGSET_ELT_BITS;
- int bit = 1 << (i % REGSET_ELT_BITS);
/* It would be more accurate to use refers_to_regno_p or
reg_mentioned_p to determine when the dest is not live before this
insn. */
- if (bb_live_regs[offset] & bit)
- return (reg_n_sets[i] == 1);
+ if (REGNO_REG_SET_P (bb_live_regs, i))
+ return (REG_N_SETS (i) == 1);
return 0;
}
return 0;
}
-/* If PREV is an insn which is immediately ready to execute, return 1,
- otherwise return 0. We may adjust its priority if that will help shorten
- register lifetimes. */
+/* PREV is an insn that is ready to execute. Adjust its priority if that
+ will help shorten register lifetimes. */
-static int
-launch_link (prev)
+__inline static void
+adjust_priority (prev)
rtx prev;
{
- rtx pat = PATTERN (prev);
- rtx note;
- /* MAX of (a) number of cycles needed by prev
- (b) number of cycles before needed resources are free. */
- int n_cycles = insn_cost (prev);
- int n_deaths = 0;
-
/* Trying to shorten register lives after reload has completed
is useless and wrong. It gives inaccurate schedules. */
if (reload_completed == 0)
{
+ rtx note;
+ int n_deaths = 0;
+
+ /* ??? This code has no effect, because REG_DEAD notes are removed
+ before we ever get here. */
for (note = REG_NOTES (prev); note; note = XEXP (note, 1))
if (REG_NOTE_KIND (note) == REG_DEAD)
n_deaths += 1;
INSN_PRIORITY (prev) >>= 1;
break;
case 0:
- if (birthing_insn_p (pat))
+ if (birthing_insn_p (PATTERN (prev)))
{
int max = max_priority;
}
break;
}
+#ifdef ADJUST_PRIORITY
+ ADJUST_PRIORITY (prev);
+#endif
}
-
- if (n_cycles <= 1)
- return 1;
- queue_insn (prev, n_cycles);
- return 0;
}
/* INSN is the "currently executing insn". Launch each insn which was
waiting on INSN (in the backwards dataflow sense). READY is a
vector of insns which are ready to fire. N_READY is the number of
- elements in READY. */
+ elements in READY. CLOCK is the current virtual cycle. */
static int
-launch_links (insn, ready, n_ready)
+schedule_insn (insn, ready, n_ready, clock)
rtx insn;
rtx *ready;
int n_ready;
+ int clock;
{
rtx link;
int new_ready = n_ready;
+ if (MAX_BLOCKAGE > 1)
+ schedule_unit (insn_unit (insn), insn, clock);
+
if (LOG_LINKS (insn) == 0)
return n_ready;
- /* This is used by the function launch_link above. */
+ /* This is used by the function adjust_priority above. */
if (n_ready > 0)
max_priority = MAX (INSN_PRIORITY (ready[0]), INSN_PRIORITY (insn));
else
for (link = LOG_LINKS (insn); link != 0; link = XEXP (link, 1))
{
rtx prev = XEXP (link, 0);
+ int cost = insn_cost (prev, link, insn);
+
+ if ((INSN_REF_COUNT (prev) -= 1) != 0)
+ {
+ /* We satisfied one requirement to fire PREV. Record the earliest
+ time when PREV can fire. No need to do this if the cost is 1,
+ because PREV can fire no sooner than the next cycle. */
+ if (cost > 1)
+ INSN_TICK (prev) = MAX (INSN_TICK (prev), clock + cost);
+ }
+ else
+ {
+ /* We satisfied the last requirement to fire PREV. Ensure that all
+ timing requirements are satisfied. */
+ if (INSN_TICK (prev) - clock > cost)
+ cost = INSN_TICK (prev) - clock;
+
+ /* Adjust the priority of PREV and either put it on the ready
+ list or queue it. */
+ adjust_priority (prev);
+ if (cost <= 1)
+ ready[new_ready++] = prev;
+ else
+ queue_insn (prev, cost);
+ }
+ }
+
+ return new_ready;
+}
+
+/* Given N_READY insns in the ready list READY at time CLOCK, queue
+ those that are blocked due to function unit hazards and rearrange
+ the remaining ones to minimize subsequent function unit hazards. */
+
+static int
+schedule_select (ready, n_ready, clock, file)
+ rtx *ready;
+ int n_ready, clock;
+ FILE *file;
+{
+ int pri = INSN_PRIORITY (ready[0]);
+ int i, j, k, q, cost, best_cost, best_insn = 0, new_ready = n_ready;
+ rtx insn;
+
+ /* Work down the ready list in groups of instructions with the same
+ priority value. Queue insns in the group that are blocked and
+ select among those that remain for the one with the largest
+ potential hazard. */
+ for (i = 0; i < n_ready; i = j)
+ {
+ int opri = pri;
+ for (j = i + 1; j < n_ready; j++)
+ if ((pri = INSN_PRIORITY (ready[j])) != opri)
+ break;
+
+ /* Queue insns in the group that are blocked. */
+ for (k = i, q = 0; k < j; k++)
+ {
+ insn = ready[k];
+ if ((cost = actual_hazard (insn_unit (insn), insn, clock, 0)) != 0)
+ {
+ q++;
+ ready[k] = 0;
+ queue_insn (insn, cost);
+ if (file)
+ fprintf (file, "\n;; blocking insn %d for %d cycles",
+ INSN_UID (insn), cost);
+ }
+ }
+ new_ready -= q;
+
+ /* Check the next group if all insns were queued. */
+ if (j - i - q == 0)
+ continue;
- if ((INSN_REF_COUNT (prev) -= 1) == 0 && launch_link (prev))
- ready[new_ready++] = prev;
+ /* If more than one remains, select the first one with the largest
+ potential hazard. */
+ else if (j - i - q > 1)
+ {
+ best_cost = -1;
+ for (k = i; k < j; k++)
+ {
+ if ((insn = ready[k]) == 0)
+ continue;
+ if ((cost = potential_hazard (insn_unit (insn), insn, 0))
+ > best_cost)
+ {
+ best_cost = cost;
+ best_insn = k;
+ }
+ }
+ }
+ /* We have found a suitable insn to schedule. */
+ break;
}
+ /* Move the best insn to be front of the ready list. */
+ if (best_insn != 0)
+ {
+ if (file)
+ {
+ fprintf (file, ", now");
+ for (i = 0; i < n_ready; i++)
+ if (ready[i])
+ fprintf (file, " %d", INSN_UID (ready[i]));
+ fprintf (file, "\n;; insn %d has a greater potential hazard",
+ INSN_UID (ready[best_insn]));
+ }
+ for (i = best_insn; i > 0; i--)
+ {
+ insn = ready[i-1];
+ ready[i-1] = ready[i];
+ ready[i] = insn;
+ }
+ }
+
+ /* Compact the ready list. */
+ if (new_ready < n_ready)
+ for (i = j = 0; i < n_ready; i++)
+ if (ready[i])
+ ready[j++] = ready[i];
+
return new_ready;
}
create_reg_dead_note (reg, insn)
rtx reg, insn;
{
- rtx link = dead_notes;
+ rtx link;
- if (link == 0)
- /* In theory, we should not end up with more REG_DEAD reg notes than we
- started with. In practice, this can occur as the result of bugs in
- flow, combine and/or sched. */
+ /* The number of registers killed after scheduling must be the same as the
+ number of registers killed before scheduling. The number of REG_DEAD
+ notes may not be conserved, i.e. two SImode hard register REG_DEAD notes
+ might become one DImode hard register REG_DEAD note, but the number of
+ registers killed will be conserved.
+
+ We carefully remove REG_DEAD notes from the dead_notes list, so that
+ there will be none left at the end. If we run out early, then there
+ is a bug somewhere in flow, combine and/or sched. */
+
+ if (dead_notes == 0)
{
#if 1
abort ();
#endif
}
else
- dead_notes = XEXP (dead_notes, 1);
+ {
+ /* Number of regs killed by REG. */
+ int regs_killed = (REGNO (reg) >= FIRST_PSEUDO_REGISTER ? 1
+ : HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)));
+ /* Number of regs killed by REG_DEAD notes taken off the list. */
+ int reg_note_regs;
+
+ link = dead_notes;
+ reg_note_regs = (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
+ : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
+ GET_MODE (XEXP (link, 0))));
+ while (reg_note_regs < regs_killed)
+ {
+ link = XEXP (link, 1);
+ reg_note_regs += (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
+ : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
+ GET_MODE (XEXP (link, 0))));
+ }
+ dead_notes = XEXP (link, 1);
+
+ /* If we took too many regs kills off, put the extra ones back. */
+ while (reg_note_regs > regs_killed)
+ {
+ rtx temp_reg, temp_link;
+
+ temp_reg = gen_rtx (REG, word_mode, 0);
+ temp_link = rtx_alloc (EXPR_LIST);
+ PUT_REG_NOTE_KIND (temp_link, REG_DEAD);
+ XEXP (temp_link, 0) = temp_reg;
+ XEXP (temp_link, 1) = dead_notes;
+ dead_notes = temp_link;
+ reg_note_regs--;
+ }
+ }
XEXP (link, 0) = reg;
XEXP (link, 1) = REG_NOTES (insn);
/* This code is very similar to mark_used_1 (if set_p is false)
and mark_set_1 (if set_p is true) in flow.c. */
- register int regno = REGNO (x);
- register int offset = regno / REGSET_ELT_BITS;
- register int bit = 1 << (regno % REGSET_ELT_BITS);
- int all_needed = (old_live_regs[offset] & bit);
- int some_needed = (old_live_regs[offset] & bit);
+ register int regno;
+ int some_needed;
+ int all_needed;
if (set_p)
return;
+ regno = REGNO (x);
+ all_needed = some_needed = REGNO_REG_SET_P (old_live_regs, regno);
if (regno < FIRST_PSEUDO_REGISTER)
{
int n;
n = HARD_REGNO_NREGS (regno, GET_MODE (x));
while (--n > 0)
{
- some_needed |= (old_live_regs[(regno + n) / REGSET_ELT_BITS]
- & 1 << ((regno + n) % REGSET_ELT_BITS));
- all_needed &= (old_live_regs[(regno + n) / REGSET_ELT_BITS]
- & 1 << ((regno + n) % REGSET_ELT_BITS));
+ int needed = (REGNO_REG_SET_P (old_live_regs, regno + n));
+ some_needed |= needed;
+ all_needed &= needed;
}
}
STACK_POINTER_REGNUM, since these are always considered to be
live. Similarly for ARG_POINTER_REGNUM if it is fixed. */
if (regno != FRAME_POINTER_REGNUM
+#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
+ && ! (regno == HARD_FRAME_POINTER_REGNUM)
+#endif
#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
&& ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
#endif
&& regno != STACK_POINTER_REGNUM)
{
- if (! all_needed && ! dead_or_set_p (insn, x))
+ /* ??? It is perhaps a dead_or_set_p bug that it does
+ not check for REG_UNUSED notes itself. This is necessary
+ for the case where the SET_DEST is a subreg of regno, as
+ dead_or_set_p handles subregs specially. */
+ if (! all_needed && ! dead_or_set_p (insn, x)
+ && ! find_reg_note (insn, REG_UNUSED, x))
{
+ /* Check for the case where the register dying partially
+ overlaps the register set by this insn. */
+ if (regno < FIRST_PSEUDO_REGISTER
+ && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
+ {
+ int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
+ while (--n >= 0)
+ some_needed |= dead_or_set_regno_p (insn, regno + n);
+ }
+
/* If none of the words in X is needed, make a REG_DEAD
note. Otherwise, we must make partial REG_DEAD
notes. */
register that is set in the insn. */
for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
i >= 0; i--)
- if ((old_live_regs[(regno + i) / REGSET_ELT_BITS]
- & 1 << ((regno +i) % REGSET_ELT_BITS)) == 0
+ if (! REGNO_REG_SET_P (old_live_regs, regno + i)
&& ! dead_or_set_regno_p (insn, regno + i))
- create_reg_dead_note (gen_rtx (REG, word_mode,
+ create_reg_dead_note (gen_rtx (REG,
+ reg_raw_mode[regno + i],
regno + i),
insn);
}
int j = HARD_REGNO_NREGS (regno, GET_MODE (x));
while (--j >= 0)
{
- offset = (regno + j) / REGSET_ELT_BITS;
- bit = 1 << ((regno + j) % REGSET_ELT_BITS);
-
- bb_dead_regs[offset] &= ~bit;
- bb_live_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_dead_regs, regno + j);
+ SET_REGNO_REG_SET (bb_live_regs, regno + j);
}
}
else
{
- bb_dead_regs[offset] &= ~bit;
- bb_live_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_dead_regs, regno);
+ SET_REGNO_REG_SET (bb_live_regs, regno);
}
}
return;
{
rtx x = PATTERN (insn);
register RTX_CODE code = GET_CODE (x);
+ rtx link;
if (code == SET)
{
attach_deaths (SET_DEST (XVECEXP (x, 0, i)), insn, 1);
}
- else if (code == CLOBBER)
- attach_deaths (XEXP (XVECEXP (x, 0, i), 0), insn, 1);
- else
+ /* Flow does not add REG_DEAD notes to registers that die in
+ clobbers, so we can't either. */
+ else if (code != CLOBBER)
attach_deaths (XVECEXP (x, 0, i), insn, 0);
}
}
- else if (code == CLOBBER)
- attach_deaths (XEXP (x, 0), insn, 1);
- else
+ /* If this is a CLOBBER, only add REG_DEAD notes to registers inside a
+ MEM being clobbered, just like flow. */
+ else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == MEM)
+ attach_deaths (XEXP (XEXP (x, 0), 0), insn, 0);
+ /* Otherwise don't add a death note to things being clobbered. */
+ else if (code != CLOBBER)
attach_deaths (x, insn, 0);
+
+ /* Make death notes for things used in the called function. */
+ if (GET_CODE (insn) == CALL_INSN)
+ for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
+ attach_deaths (XEXP (XEXP (link, 0), 0), insn,
+ GET_CODE (XEXP (link, 0)) == CLOBBER);
}
/* Delete notes beginning with INSN and maybe put them in the chain
if (write_symbols != NO_DEBUG && NOTE_LINE_NUMBER (insn) > 0)
/* Record line-number notes so they can be reused. */
LINE_NOTE (insn) = insn;
- else
+
+ /* Don't save away NOTE_INSN_SETJMPs, because they must remain
+ immediately after the call they follow. We use a fake
+ (REG_DEAD (const_int -1)) note to remember them.
+ Likewise with NOTE_INSN_{LOOP,EHREGION}_{BEG, END}. */
+ else if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_SETJMP
+ && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG
+ && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_END
+ && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_BEG
+ && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_END)
{
/* Insert the note at the end of the notes list. */
PREV_INSN (insn) = note_list;
return insn;
}
-/* Data structure for keeping track of register information
- during that register's life. */
-
-struct sometimes
-{
- short offset; short bit;
- short live_length; short calls_crossed;
-};
-
/* Constructor for `sometimes' data structure. */
static int
-new_sometimes_live (regs_sometimes_live, offset, bit, sometimes_max)
+new_sometimes_live (regs_sometimes_live, regno, sometimes_max)
struct sometimes *regs_sometimes_live;
- int offset, bit;
+ int regno;
int sometimes_max;
{
register struct sometimes *p;
- register int regno = offset * REGSET_ELT_BITS + bit;
- int i;
/* There should never be a register greater than max_regno here. If there
is, it means that a define_split has created a new pseudo reg. This
abort ();
p = ®s_sometimes_live[sometimes_max];
- p->offset = offset;
- p->bit = bit;
+ p->regno = regno;
p->live_length = 0;
p->calls_crossed = 0;
sometimes_max++;
for (i = 0; i < sometimes_max; i++)
{
register struct sometimes *p = ®s_sometimes_live[i];
- int regno;
-
- regno = p->offset * REGSET_ELT_BITS + p->bit;
+ int regno = p->regno;
sched_reg_live_length[regno] += p->live_length;
sched_reg_n_calls_crossed[regno] += p->calls_crossed;
}
}
+/* Search INSN for fake REG_DEAD note pairs for NOTE_INSN_SETJMP,
+ NOTE_INSN_{LOOP,EHREGION}_{BEG,END}; and convert them back into
+ NOTEs. The REG_DEAD note following first one is contains the saved
+ value for NOTE_BLOCK_NUMBER which is useful for
+ NOTE_INSN_EH_REGION_{BEG,END} NOTEs. LAST is the last instruction
+ output by the instruction scheduler. Return the new value of LAST. */
+
+static rtx
+reemit_notes (insn, last)
+ rtx insn;
+ rtx last;
+{
+ rtx note;
+
+ for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ {
+ if (REG_NOTE_KIND (note) == REG_DEAD
+ && GET_CODE (XEXP (note, 0)) == CONST_INT)
+ {
+ if (INTVAL (XEXP (note, 0)) == NOTE_INSN_SETJMP)
+ {
+ CONST_CALL_P (emit_note_after (INTVAL (XEXP (note, 0)), insn))
+ = CONST_CALL_P (note);
+ remove_note (insn, note);
+ note = XEXP (note, 1);
+ }
+ else
+ {
+ last = emit_note_before (INTVAL (XEXP (note, 0)), last);
+ remove_note (insn, note);
+ note = XEXP (note, 1);
+ NOTE_BLOCK_NUMBER (last) = INTVAL (XEXP (note, 0));
+ }
+ remove_note (insn, note);
+ }
+ }
+ return last;
+}
+
/* Use modified list scheduling to rearrange insns in basic block
B. FILE, if nonzero, is where we dump interesting output about
this pass. */
FILE *file;
{
rtx insn, last;
- rtx last_note = 0;
rtx *ready, link;
- int i, j, n_ready = 0, new_ready, n_insns = 0;
+ int i, j, n_ready = 0, new_ready, n_insns;
int sched_n_insns = 0;
+ int clock;
#define NEED_NOTHING 0
#define NEED_HEAD 1
#define NEED_TAIL 2
i = max_reg_num ();
reg_last_uses = (rtx *) alloca (i * sizeof (rtx));
- bzero (reg_last_uses, i * sizeof (rtx));
+ bzero ((char *) reg_last_uses, i * sizeof (rtx));
reg_last_sets = (rtx *) alloca (i * sizeof (rtx));
- bzero (reg_last_sets, i * sizeof (rtx));
+ bzero ((char *) reg_last_sets, i * sizeof (rtx));
+ reg_pending_sets = ALLOCA_REG_SET ();
+ CLEAR_REG_SET (reg_pending_sets);
+ reg_pending_sets_all = 0;
+ clear_units ();
/* Remove certain insns at the beginning from scheduling,
by advancing HEAD. */
return;
#endif
- /* Exclude certain insns at the end of the basic block by advancing TAIL. */
- /* This isn't correct. Instead of advancing TAIL, should assign very
- high priorities to these insns to guarantee that they get scheduled last.
- If these insns are ignored, as is currently done, the register life info
- may be incorrectly computed. */
- if (GET_CODE (tail) == INSN
- && GET_CODE (PATTERN (tail)) == USE
- && next_nonnote_insn (tail) == 0)
- {
- /* Don't try to reorder any USE insns at the end of a function.
- They must be last to ensure proper register allocation.
- Exclude them all from scheduling. */
- do
- {
- /* If we are down to one USE insn, then there are no insns to
- schedule. */
- if (head == tail)
- return;
-
- tail = prev_nonnote_insn (tail);
- }
- while (GET_CODE (tail) == INSN
- && GET_CODE (PATTERN (tail)) == USE);
-
-#if 0
- /* This short-cut does not work. See comment above. */
- if (head == tail)
- return;
-#endif
- }
- else if (GET_CODE (tail) == JUMP_INSN
- && SCHED_GROUP_P (tail) == 0
- && GET_CODE (PREV_INSN (tail)) == INSN
- && GET_CODE (PATTERN (PREV_INSN (tail))) == USE
- && REG_FUNCTION_VALUE_P (XEXP (PATTERN (PREV_INSN (tail)), 0)))
- {
- /* Don't let the setting of the function's return value register
- move from this jump. For the same reason we want to get the
- parameters into pseudo registers as quickly as possible, we
- want to set the function's return value register as late as
- possible. */
-
- /* If this is the only insn in the block, then there is no need to
- schedule the block. */
- if (head == tail)
- return;
-
- tail = PREV_INSN (tail);
- if (head == tail)
- return;
-
- tail = prev_nonnote_insn (tail);
-
-#if 0
- /* This shortcut does not work. See comment above. */
- if (head == tail)
- return;
-#endif
- }
-
-#ifdef HAVE_cc0
- /* This is probably wrong. Instead of doing this, should give this insn
- a very high priority to guarantee that it gets scheduled last. */
- /* Can not separate an insn that sets the condition code from one that
- uses it. So we must leave an insn that sets cc0 where it is. */
- if (sets_cc0_p (PATTERN (tail)))
- tail = PREV_INSN (tail);
-#endif
-
/* Now HEAD through TAIL are the insns actually to be rearranged;
Let PREV_HEAD and NEXT_TAIL enclose them. */
prev_head = PREV_INSN (head);
LOG_LINKS (sched_before_next_call) = 0;
- n_insns += sched_analyze (head, tail);
+ n_insns = sched_analyze (head, tail);
if (n_insns == 0)
{
free_pending_lists ();
Put those insns into the READY vector. */
insn = tail;
- /* If the last insn is a branch, force it to be the last insn after
- scheduling. Also, don't try to reorder calls at the ends the basic
- block -- this will only lead to worse register allocation. */
- if (GET_CODE (tail) == CALL_INSN || GET_CODE (tail) == JUMP_INSN)
+ /* For all branches, calls, uses, and cc0 setters, force them to remain
+ in order at the end of the block by adding dependencies and giving
+ the last a high priority. There may be notes present, and prev_head
+ may also be a note.
+
+ Branches must obviously remain at the end. Calls should remain at the
+ end since moving them results in worse register allocation. Uses remain
+ at the end to ensure proper register allocation. cc0 setters remaim
+ at the end because they can't be moved away from their cc0 user. */
+ last = 0;
+ while (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
+ || (GET_CODE (insn) == INSN
+ && (GET_CODE (PATTERN (insn)) == USE
+#ifdef HAVE_cc0
+ || sets_cc0_p (PATTERN (insn))
+#endif
+ ))
+ || GET_CODE (insn) == NOTE)
{
- priority (tail);
- ready[n_ready++] = tail;
- INSN_PRIORITY (tail) = TAIL_PRIORITY;
- INSN_REF_COUNT (tail) = 0;
- insn = PREV_INSN (tail);
+ if (GET_CODE (insn) != NOTE)
+ {
+ priority (insn);
+ if (last == 0)
+ {
+ ready[n_ready++] = insn;
+ INSN_PRIORITY (insn) = TAIL_PRIORITY - i;
+ INSN_REF_COUNT (insn) = 0;
+ }
+ else if (! find_insn_list (insn, LOG_LINKS (last)))
+ {
+ add_dependence (last, insn, REG_DEP_ANTI);
+ INSN_REF_COUNT (insn)++;
+ }
+ last = insn;
+
+ /* Skip over insns that are part of a group. */
+ while (SCHED_GROUP_P (insn))
+ {
+ insn = prev_nonnote_insn (insn);
+ priority (insn);
+ }
+ }
+
+ insn = PREV_INSN (insn);
+ /* Don't overrun the bounds of the basic block. */
+ if (insn == prev_head)
+ break;
}
/* Assign priorities to instructions. Also check whether they
{
priority (insn);
if (INSN_REF_COUNT (insn) == 0)
- ready[n_ready++] = insn;
+ {
+ if (last == 0)
+ ready[n_ready++] = insn;
+ else
+ {
+ /* Make this dependent on the last of the instructions
+ that must remain in order at the end of the block. */
+ add_dependence (last, insn, REG_DEP_ANTI);
+ INSN_REF_COUNT (insn) = 1;
+ }
+ }
if (SCHED_GROUP_P (insn))
{
while (SCHED_GROUP_P (insn))
{
- insn = PREV_INSN (insn);
- while (GET_CODE (insn) == NOTE)
- insn = PREV_INSN (insn);
+ insn = prev_nonnote_insn (insn);
priority (insn);
}
continue;
if (reload_completed == 0)
{
- bcopy (basic_block_live_at_start[b], bb_live_regs, regset_bytes);
- bzero (bb_dead_regs, regset_bytes);
+ bcopy ((char *) basic_block_live_at_start[b], (char *) bb_live_regs,
+ regset_bytes);
+ bzero ((char *) bb_dead_regs, regset_bytes);
if (b == 0)
{
sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
}
+ /* Each call clobbers (makes live) all call-clobbered regs
+ that are not global or fixed. Note that the function-value
+ reg is a call_clobbered reg. */
+
+ if (GET_CODE (insn) == CALL_INSN)
+ {
+ int j;
+ for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
+ if (call_used_regs[j] && ! global_regs[j]
+ && ! fixed_regs[j])
+ {
+ SET_REGNO_REG_SET (bb_live_regs, j);
+ CLEAR_REGNO_REG_SET (bb_dead_regs, j);
+ }
+ }
+
for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
{
if ((REG_NOTE_KIND (link) == REG_DEAD
|| REG_NOTE_KIND (link) == REG_UNUSED)
- /* Verify that the REG_NOTE has a legal value. */
+ /* Verify that the REG_NOTE has a valid value. */
&& GET_CODE (XEXP (link, 0)) == REG)
{
register int regno = REGNO (XEXP (link, 0));
- register int offset = regno / REGSET_ELT_BITS;
- register int bit = 1 << (regno % REGSET_ELT_BITS);
if (regno < FIRST_PSEUDO_REGISTER)
{
GET_MODE (XEXP (link, 0)));
while (--j >= 0)
{
- offset = (regno + j) / REGSET_ELT_BITS;
- bit = 1 << ((regno + j) % REGSET_ELT_BITS);
-
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
+ SET_REGNO_REG_SET (bb_dead_regs, regno + j);
}
}
else
{
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno);
+ SET_REGNO_REG_SET (bb_dead_regs, regno);
}
}
}
sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
}
+ /* Each call clobbers (makes live) all call-clobbered regs that are
+ not global or fixed. Note that the function-value reg is a
+ call_clobbered reg. */
+
+ if (GET_CODE (insn) == CALL_INSN)
+ {
+ int j;
+ for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
+ if (call_used_regs[j] && ! global_regs[j]
+ && ! fixed_regs[j])
+ {
+ SET_REGNO_REG_SET (bb_live_regs, j);
+ CLEAR_REGNO_REG_SET (bb_dead_regs, j);
+ }
+ }
+
/* Need to know what registers this insn kills. */
for (prev = 0, link = REG_NOTES (insn); link; link = next)
{
- int regno;
-
next = XEXP (link, 1);
if ((REG_NOTE_KIND (link) == REG_DEAD
|| REG_NOTE_KIND (link) == REG_UNUSED)
- /* Verify that the REG_NOTE has a legal value. */
+ /* Verify that the REG_NOTE has a valid value. */
&& GET_CODE (XEXP (link, 0)) == REG)
{
register int regno = REGNO (XEXP (link, 0));
- register int offset = regno / REGSET_ELT_BITS;
- register int bit = 1 << (regno % REGSET_ELT_BITS);
/* Only unlink REG_DEAD notes; leave REG_UNUSED notes
alone. */
GET_MODE (XEXP (link, 0)));
while (--j >= 0)
{
- offset = (regno + j) / REGSET_ELT_BITS;
- bit = 1 << ((regno + j) % REGSET_ELT_BITS);
-
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
+ SET_REGNO_REG_SET (bb_dead_regs, regno + j);
}
}
else
{
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, regno);
+ SET_REGNO_REG_SET (bb_dead_regs, regno);
}
}
else
if (reload_completed == 0)
{
/* Keep track of register lives. */
- old_live_regs = (regset) alloca (regset_bytes);
+ old_live_regs = ALLOCA_REG_SET ();
regs_sometimes_live
= (struct sometimes *) alloca (max_regno * sizeof (struct sometimes));
sometimes_max = 0;
/* Start with registers live at end. */
- for (j = 0; j < regset_size; j++)
- {
- int live = bb_live_regs[j];
- old_live_regs[j] = live;
- if (live)
- {
- register int bit;
- for (bit = 0; bit < REGSET_ELT_BITS; bit++)
- if (live & (1 << bit))
- sometimes_max = new_sometimes_live (regs_sometimes_live, j,
- bit, sometimes_max);
- }
- }
+ COPY_REG_SET (old_live_regs, bb_live_regs);
+ EXECUTE_IF_SET_IN_REG_SET (bb_live_regs, 0, j,
+ {
+ sometimes_max
+ = new_sometimes_live (regs_sometimes_live,
+ j, sometimes_max);
+ });
}
SCHED_SORT (ready, n_ready, 1);
/* Now HEAD and TAIL are going to become disconnected
entirely from the insn chain. */
- tail = ready[0];
+ tail = 0;
/* Q_SIZE will always be zero here. */
- q_ptr = 0;
- bzero (insn_queue, sizeof (insn_queue));
+ q_ptr = 0; clock = 0;
+ bzero ((char *) insn_queue, sizeof (insn_queue));
/* Now, perform list scheduling. */
new_ready = n_ready;
while (sched_n_insns < n_insns)
{
- q_ptr = NEXT_Q (q_ptr);
+ q_ptr = NEXT_Q (q_ptr); clock++;
/* Add all pending insns that can be scheduled without stalls to the
ready list. */
for (insn = insn_queue[q_ptr]; insn; insn = NEXT_INSN (insn))
{
if (file)
- fprintf (file, ";; launching %d before %d with no stalls\n",
- INSN_UID (insn), INSN_UID (last));
+ fprintf (file, ";; launching %d before %d with no stalls at T-%d\n",
+ INSN_UID (insn), INSN_UID (last), clock);
ready[new_ready++] = insn;
q_size -= 1;
}
{
register int stalls;
- for (stalls = 1; stalls < Q_SIZE; stalls++)
+ for (stalls = 1; stalls < INSN_QUEUE_SIZE; stalls++)
if (insn = insn_queue[NEXT_Q_AFTER (q_ptr, stalls)])
{
for (; insn; insn = NEXT_INSN (insn))
{
if (file)
- fprintf (file, ";; issue insn %d before %d with %d stalls\n",
- INSN_UID (insn), INSN_UID (last), stalls);
+ fprintf (file, ";; launching %d before %d with %d stalls at T-%d\n",
+ INSN_UID (insn), INSN_UID (last), stalls, clock);
ready[new_ready++] = insn;
q_size -= 1;
}
break;
}
-#if 0
- /* This looks logically correct, but on the SPEC benchmark set on
- the SPARC, I get better code without it. */
- q_ptr = NEXT_Q_AFTER (q_ptr, stalls);
-#endif
+ q_ptr = NEXT_Q_AFTER (q_ptr, stalls); clock += stalls;
}
/* There should be some instructions waiting to fire. */
if (new_ready == 0)
abort ();
- /* Sort the ready list and choose the best insn to schedule.
+ if (file)
+ {
+ fprintf (file, ";; ready list at T-%d:", clock);
+ for (i = 0; i < new_ready; i++)
+ fprintf (file, " %d (%x)",
+ INSN_UID (ready[i]), INSN_PRIORITY (ready[i]));
+ }
+
+ /* Sort the ready list and choose the best insn to schedule. Select
+ which insn should issue in this cycle and queue those that are
+ blocked by function unit hazards.
+
N_READY holds the number of items that were scheduled the last time,
minus the one instruction scheduled on the last loop iteration; it
is not modified for any other reason in this loop. */
+
SCHED_SORT (ready, new_ready, n_ready);
+ if (MAX_BLOCKAGE > 1)
+ {
+ new_ready = schedule_select (ready, new_ready, clock, file);
+ if (new_ready == 0)
+ {
+ if (file)
+ fprintf (file, "\n");
+ /* We must set n_ready here, to ensure that sorting always
+ occurs when we come back to the SCHED_SORT line above. */
+ n_ready = 0;
+ continue;
+ }
+ }
n_ready = new_ready;
last_scheduled_insn = insn = ready[0];
+ /* The first insn scheduled becomes the new tail. */
+ if (tail == 0)
+ tail = insn;
+
+ if (file)
+ {
+ fprintf (file, ", now");
+ for (i = 0; i < n_ready; i++)
+ fprintf (file, " %d", INSN_UID (ready[i]));
+ fprintf (file, "\n");
+ }
+
if (DONE_PRIORITY_P (insn))
abort ();
{
register struct sometimes *p;
- /* A call kills all call used and global registers, except
- for those mentioned in the call pattern which will be
- made live again later. */
+ /* A call kills all call used registers that are not
+ global or fixed, except for those mentioned in the call
+ pattern which will be made live again later. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- if (call_used_regs[i] || global_regs[i])
+ if (call_used_regs[i] && ! global_regs[i]
+ && ! fixed_regs[i])
{
- register int offset = i / REGSET_ELT_BITS;
- register int bit = 1 << (i % REGSET_ELT_BITS);
-
- bb_live_regs[offset] &= ~bit;
- bb_dead_regs[offset] |= bit;
+ CLEAR_REGNO_REG_SET (bb_live_regs, i);
+ SET_REGNO_REG_SET (bb_dead_regs, i);
}
/* Regs live at the time of a call instruction must not
(below). */
p = regs_sometimes_live;
for (i = 0; i < sometimes_max; i++, p++)
- if (bb_live_regs[p->offset] & (1 << p->bit))
+ if (REGNO_REG_SET_P (bb_live_regs, p->regno))
p->calls_crossed += 1;
}
attach_deaths_insn (insn);
/* Find registers now made live by that instruction. */
- for (i = 0; i < regset_size; i++)
- {
- int diff = bb_live_regs[i] & ~old_live_regs[i];
- if (diff)
- {
- register int bit;
- old_live_regs[i] |= diff;
- for (bit = 0; bit < REGSET_ELT_BITS; bit++)
- if (diff & (1 << bit))
- sometimes_max
- = new_sometimes_live (regs_sometimes_live, i, bit,
- sometimes_max);
- }
- }
+ EXECUTE_IF_AND_COMPL_IN_REG_SET (bb_live_regs, old_live_regs, 0, i,
+ {
+ sometimes_max
+ = new_sometimes_live (regs_sometimes_live,
+ i, sometimes_max);
+ });
+ IOR_REG_SET (old_live_regs, bb_live_regs);
/* Count lengths of all regs we are worrying about now,
and handle registers no longer live. */
for (i = 0; i < sometimes_max; i++)
{
register struct sometimes *p = ®s_sometimes_live[i];
- int regno = p->offset*REGSET_ELT_BITS + p->bit;
+ int regno = p->regno;
p->live_length += 1;
- if ((bb_live_regs[p->offset] & (1 << p->bit)) == 0)
+ if (!REGNO_REG_SET_P (bb_live_regs, p->regno))
{
/* This is the end of one of this register's lifetime
segments. Save the lifetime info collected so far,
and clear its bit in the old_live_regs entry. */
sched_reg_live_length[regno] += p->live_length;
sched_reg_n_calls_crossed[regno] += p->calls_crossed;
- old_live_regs[p->offset] &= ~(1 << p->bit);
+ CLEAR_REGNO_REG_SET (old_live_regs, p->regno);
/* Delete the reg_sometimes_live entry for this reg by
copying the last entry over top of it. */
sched_n_insns += 1;
NEXT_INSN (insn) = last;
PREV_INSN (last) = insn;
- last = insn;
/* Everything that precedes INSN now either becomes "ready", if
it can execute immediately before INSN, or "pending", if
ahead of all others. Mark INSN as scheduled by changing its
priority to -1. */
INSN_PRIORITY (insn) = LAUNCH_PRIORITY;
- new_ready = launch_links (insn, ready, n_ready);
+ new_ready = schedule_insn (insn, ready, n_ready, clock);
INSN_PRIORITY (insn) = DONE_PRIORITY;
/* Schedule all prior insns that must not be moved. */
if (SCHED_GROUP_P (insn))
{
- /* Disable these insns from being launched. */
+ /* Disable these insns from being launched, in case one of the
+ insns in the group has a dependency on an earlier one. */
link = insn;
while (SCHED_GROUP_P (link))
{
INSN_REF_COUNT (link) = 0;
}
- /* None of these insns can move forward into delay slots. */
- while (SCHED_GROUP_P (insn))
+ /* Now handle each group insn like the main insn was handled
+ above. */
+ link = insn;
+ while (SCHED_GROUP_P (link))
{
- insn = PREV_INSN (insn);
- new_ready = launch_links (insn, ready, new_ready);
- INSN_PRIORITY (insn) = DONE_PRIORITY;
+ link = PREV_INSN (link);
sched_n_insns += 1;
- NEXT_INSN (insn) = last;
- PREV_INSN (last) = insn;
- last = insn;
+
+ /* ??? Why don't we set LAUNCH_PRIORITY here? */
+ new_ready = schedule_insn (link, ready, new_ready, clock);
+ INSN_PRIORITY (link) = DONE_PRIORITY;
+ }
+ }
+
+ /* Put back NOTE_INSN_SETJMP,
+ NOTE_INSN_{LOOP,EHREGION}_{BEGIN,END} notes. */
+
+ /* To prime the loop. We need to handle INSN and all the insns in the
+ sched group. */
+ last = NEXT_INSN (insn);
+ do
+ {
+ insn = PREV_INSN (last);
+
+ /* Maintain a valid chain so emit_note_before works.
+ This is necessary because PREV_INSN (insn) isn't valid
+ (if ! SCHED_GROUP_P) and if it points to an insn already
+ scheduled, a circularity will result. */
+ if (! SCHED_GROUP_P (insn))
+ {
+ NEXT_INSN (prev_head) = insn;
+ PREV_INSN (insn) = prev_head;
}
+
+ last = reemit_notes (insn, insn);
}
+ while (SCHED_GROUP_P (insn));
}
if (q_size != 0)
abort ();
/* HEAD is now the first insn in the chain of insns that
been scheduled by the loop above.
TAIL is the last of those insns. */
- head = insn;
+ head = last;
/* NOTE_LIST is the end of a chain of notes previously found
among the insns. Insert them at the beginning of the insns. */
head = note_head;
}
- /* In theory, there should be no REG_DEAD notes leftover at the end.
+ /* There should be no REG_DEAD notes leftover at the end.
In practice, this can occur as the result of bugs in flow, combine.c,
and/or sched.c. The values of the REG_DEAD notes remaining are
meaningless, because dead_notes is just used as a free list. */
for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
line = insn;
- else if (! (GET_CODE (insn) == NOTE
- && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
+ /* This used to emit line number notes before every non-deleted note.
+ However, this confuses a debugger, because line notes not separated
+ by real instructions all end up at the same address. I can find no
+ use for line number notes before other notes, so none are emitted. */
+ else if (GET_CODE (insn) != NOTE
&& (note = LINE_NOTE (insn)) != 0
&& note != line
&& (line == 0
prev = PREV_INSN (insn);
if (LINE_NOTE (note))
{
- /* Re-use the orignal line-number note. */
+ /* Re-use the original line-number note. */
LINE_NOTE (note) = 0;
PREV_INSN (note) = prev;
NEXT_INSN (prev) = note;
notes++;
new = emit_note_after (NOTE_LINE_NUMBER (note), prev);
NOTE_SOURCE_FILE (new) = NOTE_SOURCE_FILE (note);
+ RTX_INTEGRATED_P (new) = RTX_INTEGRATED_P (note);
}
}
if (file && notes)
if (file)
{
- fprintf (file, ";; new basic block head = %d\n;; new basic block end = %d\n\n",
- INSN_UID (basic_block_head[b]), INSN_UID (basic_block_end[b]));
+ fprintf (file, ";; total time = %d\n;; new basic block head = %d\n;; new basic block end = %d\n\n",
+ clock, INSN_UID (basic_block_head[b]), INSN_UID (basic_block_end[b]));
}
/* Yow! We're done! */
REGNO, returning the rtx of the reference found if any. Otherwise,
returns 0. */
-rtx
+static rtx
regno_use_in (regno, x)
int regno;
rtx x;
n_regs = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg));
- /* ??? Could add check here to see whether, the hard register is referenced
- in the same mode as in the original insn. If so, then it has not been
- split, and the rest of the code below is unnecessary. */
-
- for (i = 1; i < n_regs; i++)
+ for (i = 0; i < n_regs; i++)
{
new_reg = REGNO (reg) + i;
XEXP (link, 0) = temp;
XEXP (link, 1) = REG_NOTES (insn);
REG_NOTES (insn) = link;
+
+ /* If killed multiple registers here, then add in the excess. */
+ i += HARD_REGNO_NREGS (REGNO (temp), GET_MODE (temp)) - 1;
+
break;
}
/* It isn't mentioned anywhere, so no new reg note is needed for
|| GET_CODE (tem_dest) == SIGN_EXTRACT)
tem_dest = XEXP (tem_dest, 0);
- if (tem_dest != dest)
+ if (! rtx_equal_p (tem_dest, dest))
{
/* Use the same scheme as combine.c, don't put both REG_DEAD
and REG_UNUSED notes on the same insn. */
int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (dest));
for (i = regno; i < endregno; i++)
- reg_n_sets[i] += inc;
+ REG_N_SETS (i) += inc;
}
else
- reg_n_sets[regno] += inc;
+ REG_N_SETS (regno) += inc;
}
}
if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
&& reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
{
- XEXP (note, 1) = REG_NOTES (insn);
- REG_NOTES (insn) = note;
+ /* If this note refers to a multiple word hard register, it
+ may have been split into several smaller hard register
+ references, so handle it specially. */
+ temp = XEXP (note, 0);
+ if (REG_NOTE_KIND (note) == REG_DEAD
+ && GET_CODE (temp) == REG
+ && REGNO (temp) < FIRST_PSEUDO_REGISTER
+ && HARD_REGNO_NREGS (REGNO (temp), GET_MODE (temp)) > 1)
+ split_hard_reg_notes (note, first, last, orig_insn);
+ else
+ {
+ XEXP (note, 1) = REG_NOTES (insn);
+ REG_NOTES (insn) = note;
+ }
/* Sometimes need to convert REG_UNUSED notes to REG_DEAD
notes. */
- /* ??? This won't handle mutiple word registers correctly,
+ /* ??? This won't handle multiple word registers correctly,
but should be good enough for now. */
if (REG_NOTE_KIND (note) == REG_UNUSED
&& ! dead_or_set_p (insn, XEXP (note, 0)))
pattern, so we can safely ignore it. */
if (insn == first)
{
+ /* After reload, REG_DEAD notes come sometimes an
+ instruction after the register actually dies. */
+ if (reload_completed && REG_NOTE_KIND (note) == REG_DEAD)
+ {
+ XEXP (note, 1) = REG_NOTES (insn);
+ REG_NOTES (insn) = note;
+ break;
+ }
+
if (REG_NOTE_KIND (note) != REG_UNUSED)
abort ();
break;
}
}
-
- /* If this note refers to a multiple word hard register, it may
- have been split into several smaller hard register references.
- Check to see if there are any new register references that
- need REG_NOTES added for them. */
- temp = XEXP (note, 0);
- if (REG_NOTE_KIND (note) == REG_DEAD
- && GET_CODE (temp) == REG
- && REGNO (temp) < FIRST_PSEUDO_REGISTER
- && HARD_REGNO_NREGS (REGNO (temp), GET_MODE (temp)))
- split_hard_reg_notes (note, first, last, orig_insn);
break;
case REG_WAS_0:
uses it. */
break;
}
+ /* If this note refers to a multiple word hard
+ register, it may have been split into several smaller
+ hard register references. We could split the notes,
+ but simply dropping them is good enough. */
+ if (GET_CODE (orig_dest) == REG
+ && REGNO (orig_dest) < FIRST_PSEUDO_REGISTER
+ && HARD_REGNO_NREGS (REGNO (orig_dest),
+ GET_MODE (orig_dest)) > 1)
+ break;
/* It must be set somewhere, fail if we couldn't find where it
was set. */
if (insn == last)
/* The original dest must still be set someplace. Abort if we
couldn't find it. */
if (insn == first)
- abort ();
+ {
+ /* However, if this note refers to a multiple word hard
+ register, it may have been split into several smaller
+ hard register references. We could split the notes,
+ but simply dropping them is good enough. */
+ if (GET_CODE (orig_dest) == REG
+ && REGNO (orig_dest) < FIRST_PSEUDO_REGISTER
+ && HARD_REGNO_NREGS (REGNO (orig_dest),
+ GET_MODE (orig_dest)) > 1)
+ break;
+ /* Likewise for multi-word memory references. */
+ if (GET_CODE (orig_dest) == MEM
+ && SIZE_FOR_MODE (orig_dest) > MOVE_MAX)
+ break;
+ abort ();
+ }
}
break;
REG_NOTES (first) = note;
insn = XEXP (note, 0);
- note = find_reg_note (insn, REG_RETVAL, 0);
+ note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
if (note)
XEXP (note, 0) = first;
break;
+ case REG_EXEC_COUNT:
+ /* Move a REG_EXEC_COUNT note to the first insn created. */
+ XEXP (note, 1) = REG_NOTES (first);
+ REG_NOTES (first) = note;
+ break;
+
case REG_RETVAL:
/* Move a REG_RETVAL note to the last insn created, and update
the corresponding REG_LIBCALL note. */
REG_NOTES (last) = note;
insn = XEXP (note, 0);
- note = find_reg_note (insn, REG_LIBCALL, 0);
+ note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
if (note)
XEXP (note, 0) = last;
break;
case REG_NONNEG:
+ case REG_BR_PROB:
/* This should be moved to whichever instruction is a JUMP_INSN. */
for (insn = last; ; insn = PREV_INSN (insn))
break;
case REG_INC:
+ /* reload sometimes leaves obsolete REG_INC notes around. */
+ if (reload_completed)
+ break;
/* This should be moved to whichever instruction now has the
increment operation. */
abort ();
/* If any insn, except the last, uses the register set by the last insn,
then we need a new REG_DEAD note on that insn. In this case, there
would not have been a REG_DEAD note for this register in the original
- insn because it was used and set within one insn.
-
- There is no new REG_DEAD note needed if the last insn uses the register
- that it is setting. */
+ insn because it was used and set within one insn. */
set = single_set (last);
if (set)
dest = XEXP (dest, 0);
if (GET_CODE (dest) == REG
- && ! reg_overlap_mentioned_p (dest, SET_SRC (set)))
+ /* Global registers are always live, so the code below does not
+ apply to them. */
+ && (REGNO (dest) >= FIRST_PSEUDO_REGISTER
+ || ! global_regs[REGNO (dest)]))
{
- for (insn = PREV_INSN (last); ; insn = PREV_INSN (insn))
+ rtx stop_insn = PREV_INSN (first);
+
+ /* If the last insn uses the register that it is setting, then
+ we don't want to put a REG_DEAD note there. Search backwards
+ to find the first insn that sets but does not use DEST. */
+
+ insn = last;
+ if (reg_overlap_mentioned_p (dest, SET_SRC (set)))
+ {
+ for (insn = PREV_INSN (insn); insn != first;
+ insn = PREV_INSN (insn))
+ {
+ if ((set = single_set (insn))
+ && reg_mentioned_p (dest, SET_DEST (set))
+ && ! reg_overlap_mentioned_p (dest, SET_SRC (set)))
+ break;
+ }
+ }
+
+ /* Now find the first insn that uses but does not set DEST. */
+
+ for (insn = PREV_INSN (insn); insn != stop_insn;
+ insn = PREV_INSN (insn))
{
if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
&& reg_mentioned_p (dest, PATTERN (insn))
break;
}
}
- if (insn == first)
- break;
}
}
}
FILE *dump_file;
{
int max_uid = MAX_INSNS_PER_SPLIT * (get_max_uid () + 1);
- int i, b;
+ int b;
+ int i;
rtx insn;
/* Taking care of this degenerate case makes the rest of
return;
/* Create an insn here so that we can hang dependencies off of it later. */
- sched_before_next_call = gen_rtx (INSN, VOIDmode, 0, 0, 0, 0, 0, 0, 0);
+ sched_before_next_call
+ = gen_rtx (INSN, VOIDmode, 0, NULL_RTX, NULL_RTX,
+ NULL_RTX, 0, NULL_RTX, 0);
/* Initialize the unused_*_lists. We can't use the ones left over from
the previous function, because gcc has freed that memory. We can use
/* Allocate data for this pass. See comments, above,
for what these vectors do. */
- /* ??? Instruction splitting below may create new instructions, so these
- arrays must be bigger than just max_uid. */
insn_luid = (int *) alloca (max_uid * sizeof (int));
insn_priority = (int *) alloca (max_uid * sizeof (int));
+ insn_tick = (int *) alloca (max_uid * sizeof (int));
+ insn_costs = (short *) alloca (max_uid * sizeof (short));
+ insn_units = (short *) alloca (max_uid * sizeof (short));
+ insn_blockage = (unsigned int *) alloca (max_uid * sizeof (unsigned int));
insn_ref_count = (int *) alloca (max_uid * sizeof (int));
if (reload_completed == 0)
{
- sched_reg_n_deaths = (short *) alloca (max_regno * sizeof (short));
sched_reg_n_calls_crossed = (int *) alloca (max_regno * sizeof (int));
sched_reg_live_length = (int *) alloca (max_regno * sizeof (int));
- bb_dead_regs = (regset) alloca (regset_bytes);
- bb_live_regs = (regset) alloca (regset_bytes);
- bzero (sched_reg_n_calls_crossed, max_regno * sizeof (int));
- bzero (sched_reg_live_length, max_regno * sizeof (int));
- bcopy (reg_n_deaths, sched_reg_n_deaths, max_regno * sizeof (short));
+ bb_dead_regs = ALLOCA_REG_SET ();
+ bb_live_regs = ALLOCA_REG_SET ();
+ bzero ((char *) sched_reg_n_calls_crossed, max_regno * sizeof (int));
+ bzero ((char *) sched_reg_live_length, max_regno * sizeof (int));
init_alias_analysis ();
}
else
{
- sched_reg_n_deaths = 0;
sched_reg_n_calls_crossed = 0;
sched_reg_live_length = 0;
bb_dead_regs = 0;
rtx line;
line_note = (rtx *) alloca (max_uid * sizeof (rtx));
- bzero (line_note, max_uid * sizeof (rtx));
+ bzero ((char *) line_note, max_uid * sizeof (rtx));
line_note_head = (rtx *) alloca (n_basic_blocks * sizeof (rtx));
- bzero (line_note_head, n_basic_blocks * sizeof (rtx));
+ bzero ((char *) line_note_head, n_basic_blocks * sizeof (rtx));
/* Determine the line-number at the start of each basic block.
This must be computed and saved now, because after a basic block's
}
}
- bzero (insn_luid, max_uid * sizeof (int));
- bzero (insn_priority, max_uid * sizeof (int));
- bzero (insn_ref_count, max_uid * sizeof (int));
+ bzero ((char *) insn_luid, max_uid * sizeof (int));
+ bzero ((char *) insn_priority, max_uid * sizeof (int));
+ bzero ((char *) insn_tick, max_uid * sizeof (int));
+ bzero ((char *) insn_costs, max_uid * sizeof (short));
+ bzero ((char *) insn_units, max_uid * sizeof (short));
+ bzero ((char *) insn_blockage, max_uid * sizeof (unsigned int));
+ bzero ((char *) insn_ref_count, max_uid * sizeof (int));
/* Schedule each basic block, block by block. */
- if (NEXT_INSN (basic_block_end[n_basic_blocks-1]) == 0
- || (GET_CODE (basic_block_end[n_basic_blocks-1]) != NOTE
- && GET_CODE (basic_block_end[n_basic_blocks-1]) != CODE_LABEL))
+ /* ??? Add a NOTE after the last insn of the last basic block. It is not
+ known why this is done. */
+ /* ??? Perhaps it's done to ensure NEXT_TAIL in schedule_block is a
+ valid insn. */
+
+ insn = basic_block_end[n_basic_blocks-1];
+ if (NEXT_INSN (insn) == 0
+ || (GET_CODE (insn) != NOTE
+ && GET_CODE (insn) != CODE_LABEL
+ /* Don't emit a NOTE if it would end up between an unconditional
+ jump and a BARRIER. */
+ && ! (GET_CODE (insn) == JUMP_INSN
+ && GET_CODE (NEXT_INSN (insn)) == BARRIER)))
emit_note_after (NOTE_INSN_DELETED, basic_block_end[n_basic_blocks-1]);
for (b = 0; b < n_basic_blocks; b++)
{
rtx insn, next;
- rtx insns;
note_list = 0;
/* Split insns here to get max fine-grain parallelism. */
prev = PREV_INSN (insn);
- if (reload_completed == 0)
+ /* It is probably not worthwhile to try to split again in the
+ second pass. However, if flag_schedule_insns is not set,
+ the first and only (if any) scheduling pass is after reload. */
+ if (reload_completed == 0 || ! flag_schedule_insns)
{
rtx last, first = PREV_INSN (insn);
rtx notes = REG_NOTES (insn);
#endif
}
+ /* Reposition the prologue and epilogue notes in case we moved the
+ prologue/epilogue insns. */
+ if (reload_completed)
+ reposition_prologue_and_epilogue_notes (get_insns ());
+
if (write_symbols != NO_DEBUG)
{
rtx line = 0;
{
if (dump_file)
{
- if (reg_live_length[regno] > sched_reg_live_length[regno])
+ if (REG_LIVE_LENGTH (regno) > sched_reg_live_length[regno])
fprintf (dump_file,
";; register %d life shortened from %d to %d\n",
- regno, reg_live_length[regno],
+ regno, REG_LIVE_LENGTH (regno),
sched_reg_live_length[regno]);
/* Negative values are special; don't overwrite the current
reg_live_length value if it is negative. */
- else if (reg_live_length[regno] < sched_reg_live_length[regno]
- && reg_live_length[regno] >= 0)
+ else if (REG_LIVE_LENGTH (regno) < sched_reg_live_length[regno]
+ && REG_LIVE_LENGTH (regno) >= 0)
fprintf (dump_file,
";; register %d life extended from %d to %d\n",
- regno, reg_live_length[regno],
+ regno, REG_LIVE_LENGTH (regno),
sched_reg_live_length[regno]);
- if (reg_n_calls_crossed[regno]
- && ! sched_reg_n_calls_crossed[regno])
- fprintf (dump_file,
- ";; register %d no longer crosses calls\n", regno);
- else if (! reg_n_calls_crossed[regno]
- && sched_reg_n_calls_crossed[regno])
+ if (! REG_N_CALLS_CROSSED (regno)
+ && sched_reg_n_calls_crossed[regno])
fprintf (dump_file,
";; register %d now crosses calls\n", regno);
+ else if (REG_N_CALLS_CROSSED (regno)
+ && ! sched_reg_n_calls_crossed[regno]
+ && REG_BASIC_BLOCK (regno) != REG_BLOCK_GLOBAL)
+ fprintf (dump_file,
+ ";; register %d no longer crosses calls\n", regno);
+
}
/* Negative values are special; don't overwrite the current
reg_live_length value if it is negative. */
- if (reg_live_length[regno] >= 0)
- reg_live_length[regno] = sched_reg_live_length[regno];
- reg_n_calls_crossed[regno] = sched_reg_n_calls_crossed[regno];
+ if (REG_LIVE_LENGTH (regno) >= 0)
+ REG_LIVE_LENGTH (regno) = sched_reg_live_length[regno];
+
+ /* We can't change the value of reg_n_calls_crossed to zero for
+ pseudos which are live in more than one block.
+
+ This is because combine might have made an optimization which
+ invalidated basic_block_live_at_start and reg_n_calls_crossed,
+ but it does not update them. If we update reg_n_calls_crossed
+ here, the two variables are now inconsistent, and this might
+ confuse the caller-save code into saving a register that doesn't
+ need to be saved. This is only a problem when we zero calls
+ crossed for a pseudo live in multiple basic blocks.
+
+ Alternatively, we could try to correctly update basic block live
+ at start here in sched, but that seems complicated. */
+ if (sched_reg_n_calls_crossed[regno]
+ || REG_BASIC_BLOCK (regno) != REG_BLOCK_GLOBAL)
+ REG_N_CALLS_CROSSED (regno) = sched_reg_n_calls_crossed[regno];
}
}
}
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