-@c Copyright (C) 1988, 89, 92, 94, 97, 1998, 1999 Free Software Foundation, Inc.
+@c Copyright (C) 1988, 89, 92, 94, 97, 1998, 1999, 2000 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
* Arithmetic:: Expressions representing arithmetic on other expressions.
* Comparisons:: Expressions representing comparison of expressions.
* Bit Fields:: Expressions representing bitfields in memory or reg.
+* Vector Operations:: Expressions involving vector datatypes.
* Conversions:: Extending, truncating, floating or fixing.
* RTL Declarations:: Declaring volatility, constancy, etc.
* Side Effects:: Expressions for storing in registers, etc.
An RTX code for something that matches in insns, such as
@code{MATCH_DUP}. These only occur in machine descriptions.
+@item a
+An RTX code for an auto-increment addressing mode, such as
+@code{POST_INC}.
+
@item x
All other RTX codes. This category includes the remaining codes used
only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
@item (minus:@var{m} @var{x} @var{y})
Like @code{plus} but represents subtraction.
+@findex ss_plus
+@cindex RTL addition with signed saturation
+@item (ss_plus:@var{m} @var{x} @var{y})
+
+Like @code{plus}, but using signed saturation in case of an overflow.
+
+@findex us_plus
+@cindex RTL addition with unsigned saturation
+@item (us_plus:@var{m} @var{x} @var{y})
+
+Like @code{plus}, but using unsigned saturation in case of an overflow.
+
+@findex ss_minus
+@cindex RTL addition with signed saturation
+@item (ss_minus:@var{m} @var{x} @var{y})
+
+Like @code{minus}, but using signed saturation in case of an overflow.
+
+@findex us_minus
+@cindex RTL addition with unsigned saturation
+@item (us_minus:@var{m} @var{x} @var{y})
+
+Like @code{minus}, but using unsigned saturation in case of an overflow.
+
@findex compare
@cindex RTL comparison
@item (compare:@var{m} @var{x} @var{y})
comparison operators may be used to compare the condition codes
@code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
a construct actually refers to the result of the preceding instruction
-in which the condition codes were set. The instructing setting the
+in which the condition codes were set. The instruction setting the
condition code must be adjacent to the instruction using the condition
code; only @code{note} insns may separate them.
are filled to an entire word with zeros instead of by sign-extension.
@end table
+@node Vector Operations
+@section Vector Operations
+@cindex vector operations
+
+All normal rtl expressions can be used with vector modes; they are
+interpreted as operating on each part of the vector independently.
+Additionally, there are a few new expressions to describe specific vector
+operations.
+
+@table @code
+@findex vec_merge
+@item (vec_merge:@var{m} @var{vec1} @var{vec2} @var{items})
+This describes a merge operation between two vectors. The result is a vector
+of mode @var{m}; its elements are selected from either @var{vec1} or
+@var{vec2}. Which elements are selected is described by @var{items}, which
+is a bit mask represented by a @code{const_int}; a zero bit indicates the
+corresponding element in the result vector is taken from @var{vec2} while
+a set bit indicates it is taken from @var{vec1}.
+
+@findex vec_select
+@item (vec_select:@var{m} @var{vec1} @var{selection})
+This describes an operation that selects parts of a vector. @var{vec1} is
+the source vector, @var{selection} is a @code{parallel} that contains a
+@code{const_int} for each of the subparts of the result vector, giving the
+number of the source subpart that should be stored into it.
+
+@findex vec_concat
+@item (vec_concat:@var{m} @var{vec1} @var{vec2})
+Describes a vector concat operation. The result is a concatenation of the
+vectors @var{vec1} and @var{vec2}; its length is the sum of the lengths of
+the two inputs.
+
+@findex vec_const
+@item (vec_const:@var{m} @var{subparts})
+This describes a constant vector. @var{subparts} is a @code{parallel} that
+contains a constant for each of the subparts of the vector.
+
+@findex vec_duplicate
+@item (vec_duplicate:@var{m} @var{vec})
+This operation converts a small vector into a larger one by duplicating the
+input values. The output vector mode must have the same submodes as the
+input vector mode, and the number of output parts must be an integer multiple
+of the number of input parts.
+
+@end table
+
@node Conversions
@section Conversions
@cindex conversions
to machine mode @var{m}. @var{m} must be a fixed-point mode
and @var{x} a fixed-point value of a mode wider than @var{m}.
+@findex ss_truncate
+@item (ss_truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}, using signed saturation in the case of
+overflow. Both @var{m} and the mode of @var{x} must be fixed-point
+modes.
+
+@findex us_truncate
+@item (us_truncate:@var{m} @var{x})
+Represents the result of truncating the value @var{x}
+to machine mode @var{m}, using unsigned saturation in the case of
+overflow. Both @var{m} and the mode of @var{x} must be fixed-point
+modes.
+
@findex float_truncate
@item (float_truncate:@var{m} @var{x})
Represents the result of truncating the value @var{x}
@cindex @code{const_int}, RTL sharing
@item
-There is only one @code{const_int} expression with value 0, only
-one with value 1, and only one with value @minus{}1.
-Some other integer values are also stored uniquely.
+All @code{const_int} expressions with equal values are shared.
@cindex @code{pc}, RTL sharing
@item
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