/* Definitions for computing resource usage of specific insns.
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GCC.
{
/* If INSN is an annulled branch, skip any insns from the target
of the branch. */
- if (INSN_ANNULLED_BRANCH_P (insn)
+ if ((GET_CODE (insn) == JUMP_INSN
+ || GET_CODE (insn) == CALL_INSN
+ || GET_CODE (insn) == INSN)
+ && INSN_ANNULLED_BRANCH_P (insn)
&& NEXT_INSN (PREV_INSN (insn)) != insn)
- while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
- insn = NEXT_INSN (insn);
+ {
+ rtx next = NEXT_INSN (insn);
+ enum rtx_code code = GET_CODE (next);
+
+ while ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
+ && INSN_FROM_TARGET_P (next))
+ {
+ insn = next;
+ next = NEXT_INSN (insn);
+ code = GET_CODE (next);
+ }
+ }
insn = NEXT_INSN (insn);
if (insn && GET_CODE (insn) == INSN
void
mark_referenced_resources (x, res, include_delayed_effects)
- register rtx x;
- register struct resources *res;
- register int include_delayed_effects;
+ rtx x;
+ struct resources *res;
+ int include_delayed_effects;
{
enum rtx_code code = GET_CODE (x);
int i, j;
unsigned int r;
- register const char *format_ptr;
+ const char *format_ptr;
/* Handle leaf items for which we set resource flags. Also, special-case
CALL, SET and CLOBBER operators. */
case CONST:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case PC:
case SYMBOL_REF:
case LABEL_REF:
We can not just fall through here since then we would be confused
by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
traditional asms unlike their normal usage. */
-
+
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
return;
}
\f
/* A subroutine of mark_target_live_regs. Search forward from TARGET
- looking for registers that are set before they are used. These are dead.
+ looking for registers that are set before they are used. These are dead.
Stop after passing a few conditional jumps, and/or a small
number of unconditional branches. */
SETs CC0 even though this is not totally correct. The reason for this is
that we require a SET of CC0 to immediately precede the reference to CC0.
So if some other insn sets CC0 as a side-effect, we know it cannot affect
- our computation and thus may be placed in a delay slot. */
+ our computation and thus may be placed in a delay slot. */
void
mark_set_resources (x, res, in_dest, mark_type)
- register rtx x;
- register struct resources *res;
+ rtx x;
+ struct resources *res;
int in_dest;
enum mark_resource_type mark_type;
{
case USE:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case LABEL_REF:
case SYMBOL_REF:
case CONST:
case CLOBBER:
mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
return;
-
+
case SEQUENCE:
for (i = 0; i < XVECLEN (x, 0); i++)
if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
We can not just fall through here since then we would be confused
by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
traditional asms unlike their normal usage. */
-
+
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
MARK_SRC_DEST);
}
else
{
- /* Allocate a place to put our results and chain it into the
+ /* Allocate a place to put our results and chain it into the
hash table. */
tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
tinfo->uid = INSN_UID (target);
{
rtx link;
rtx real_insn = insn;
+ enum rtx_code code = GET_CODE (insn);
/* If this insn is from the target of a branch, it isn't going to
be used in the sequel. If it is used in both cases, this
test will not be true. */
- if (INSN_FROM_TARGET_P (insn))
+ if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
+ && INSN_FROM_TARGET_P (insn))
continue;
/* If this insn is a USE made by update_block, we care about the
underlying insn. */
- if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
+ if (code == INSN && GET_CODE (PATTERN (insn)) == USE
&& INSN_P (XEXP (PATTERN (insn), 0)))
real_insn = XEXP (PATTERN (insn), 0);
/* CALL clobbers all call-used regs that aren't fixed except
sp, ap, and fp. Do this before setting the result of the
call live. */
- for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- if (call_used_regs[i]
- && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
- && i != ARG_POINTER_REGNUM
-#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
- && i != HARD_FRAME_POINTER_REGNUM
-#endif
-#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
- && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
-#endif
-#if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
- && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
-#endif
- )
- CLEAR_HARD_REG_BIT (current_live_regs, i);
+ AND_COMPL_HARD_REG_SET (current_live_regs,
+ regs_invalidated_by_call);
/* A CALL_INSN sets any global register live, since it may
have been modified by the call. */
= (first_regno
+ HARD_REGNO_NREGS (first_regno,
GET_MODE (XEXP (link, 0))));
-
+
for (i = first_regno; i < last_regno; i++)
SET_HARD_REG_BIT (pending_dead_regs, i);
}
= (first_regno
+ HARD_REGNO_NREGS (first_regno,
GET_MODE (XEXP (link, 0))));
-
+
for (i = first_regno; i < last_regno; i++)
CLEAR_HARD_REG_BIT (current_live_regs, i);
}
RTL chain when there are no epilogue insns. Certain resources
are implicitly required at that point. */
else if (GET_CODE (real_insn) == NOTE
- && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
+ && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
}
if (target_hash_table != NULL)
{
int i;
-
- for (i = 0; i < TARGET_HASH_PRIME; ++i)
+
+ for (i = 0; i < TARGET_HASH_PRIME; ++i)
{
struct target_info *ti = target_hash_table[i];
- while (ti)
+ while (ti)
{
struct target_info *next = ti->next;
free (ti);
rtx insn;
{
struct target_info *tinfo;
-
+
if (target_hash_table != NULL)
{
for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];