PR middle-end/45876

[pf3gnuchains/gcc-fork.git] / gcc / reload.h

diff --git a/gcc/reload.h b/gcc/reload.h
index a285670..340f81d 100644 (file)
--- a/gcc/reload.h
+++ b/gcc/reload.h
@@ -30,12 +30,9 @@ along with GCC; see the file COPYING3.  If not see
   SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
 #endif
 
-/* If MEMORY_MOVE_COST isn't defined, give it a default here.  */
-#ifndef MEMORY_MOVE_COST
-#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
-  (4 + memory_move_secondary_cost ((MODE), (CLASS), (IN)))
-#endif
-extern int memory_move_secondary_cost (enum machine_mode, enum reg_class, int);
+extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
+extern int memory_move_cost (enum machine_mode, enum reg_class, bool);
+extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
 
 /* Maximum number of reloads we can need.  */
 #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
@@ -155,6 +152,58 @@ extern struct reload rld[MAX_RELOADS];
 extern int n_reloads;
 #endif
 
+/* Target-dependent globals.  */
+struct target_reload {
+  /* Nonzero if indirect addressing is supported when the innermost MEM is
+     of the form (MEM (SYMBOL_REF sym)).  It is assumed that the level to
+     which these are valid is the same as spill_indirect_levels, above.  */
+  bool x_indirect_symref_ok;
+
+  /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid.  */
+  bool x_double_reg_address_ok;
+
+  /* Nonzero if indirect addressing is supported on the machine; this means
+     that spilling (REG n) does not require reloading it into a register in
+     order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))).  The
+     value indicates the level of indirect addressing supported, e.g., two
+     means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
+     a hard register.  */
+  bool x_spill_indirect_levels;
+
+  /* True if caller-save has been reinitialized.  */
+  bool x_caller_save_initialized_p;
+
+  /* Modes for each hard register that we can save.  The smallest mode is wide
+     enough to save the entire contents of the register.  When saving the
+     register because it is live we first try to save in multi-register modes.
+     If that is not possible the save is done one register at a time.  */
+  enum machine_mode (x_regno_save_mode
+                    [FIRST_PSEUDO_REGISTER]
+                    [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
+
+  /* We will only make a register eligible for caller-save if it can be
+     saved in its widest mode with a simple SET insn as long as the memory
+     address is valid.  We record the INSN_CODE is those insns here since
+     when we emit them, the addresses might not be valid, so they might not
+     be recognized.  */
+  int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+  int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+};
+
+extern struct target_reload default_target_reload;
+#if SWITCHABLE_TARGET
+extern struct target_reload *this_target_reload;
+#else
+#define this_target_reload (&default_target_reload)
+#endif
+
+#define indirect_symref_ok \
+  (this_target_reload->x_indirect_symref_ok)
+#define double_reg_address_ok \
+  (this_target_reload->x_double_reg_address_ok)
+#define caller_save_initialized_p \
+  (this_target_reload->x_caller_save_initialized_p)
+
 extern GTY (()) VEC(rtx,gc) *reg_equiv_memory_loc_vec;
 extern rtx *reg_equiv_constant;
 extern rtx *reg_equiv_invariant;
@@ -182,15 +231,6 @@ extern int reload_n_operands;
    Used in find_equiv_reg.  */
 extern int reload_first_uid;
 
-/* Nonzero if indirect addressing is supported when the innermost MEM is
-   of the form (MEM (SYMBOL_REF sym)).  It is assumed that the level to
-   which these are valid is the same as spill_indirect_levels, above.  */
-
-extern char indirect_symref_ok;
-
-/* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid.  */
-extern char double_reg_address_ok;
-
 extern int num_not_at_initial_offset;
 
 #if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
@@ -250,8 +290,8 @@ extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
 
 /* Functions from reload.c:  */
 
-extern enum reg_class secondary_reload_class (bool, enum reg_class,
-                                             enum machine_mode, rtx);
+extern reg_class_t secondary_reload_class (bool, reg_class_t,
+                                          enum machine_mode, rtx);
 
 #ifdef GCC_INSN_CODES_H
 extern enum reg_class scratch_reload_class (enum insn_code);
@@ -349,12 +389,13 @@ extern void mark_home_live (int);
 extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
 extern bool elimination_target_reg_p (rtx);
 
+/* Called from the register allocator to estimate costs of eliminating
+   invariant registers.  */
+extern void calculate_elim_costs_all_insns (void);
+
 /* Deallocate the reload register used by reload number R.  */
 extern void deallocate_reload_reg (int r);
 
-/* True if caller-save has been reinitialized.  */
-extern bool caller_save_initialized_p;
-
 /* Functions in caller-save.c:  */
 
 /* Initialize for caller-save.  */