SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
#endif
-extern int register_move_cost (enum machine_mode, enum reg_class,
- enum reg_class);
+extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
extern int memory_move_cost (enum machine_mode, enum reg_class, bool);
-extern int memory_move_secondary_cost (enum machine_mode, enum reg_class,
- bool);
+extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
/* Maximum number of reloads we can need. */
#define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
enum machine_mode (x_regno_save_mode
[FIRST_PSEUDO_REGISTER]
[MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
+
+ /* We will only make a register eligible for caller-save if it can be
+ saved in its widest mode with a simple SET insn as long as the memory
+ address is valid. We record the INSN_CODE is those insns here since
+ when we emit them, the addresses might not be valid, so they might not
+ be recognized. */
+ int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
+ int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
};
extern struct target_reload default_target_reload;
/* Functions from reload.c: */
-extern enum reg_class secondary_reload_class (bool, enum reg_class,
- enum machine_mode, rtx);
+extern reg_class_t secondary_reload_class (bool, reg_class_t,
+ enum machine_mode, rtx);
#ifdef GCC_INSN_CODES_H
extern enum reg_class scratch_reload_class (enum insn_code);