/* Search an insn for pseudo regs that must be in hard regs and are not.
- Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
+ Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
when reloaded, on input.
reload_outmode enum machine_mode; mode this operand should have
when reloaded, on output.
- reload_strict_low char; currently always zero; used to mean that this
- reload is inside a STRICT_LOW_PART, but we don't
- need to know this anymore.
reload_optional char, nonzero for an optional reload.
Optional reloads are ignored unless the
value is already sitting in a register.
reload_inmode or reload_outmode.
reload_nocombine char, nonzero if this reload shouldn't be
combined with another reload.
- reload_needed_for rtx, operand this reload is needed for address of.
- 0 means it isn't needed for addressing.
- reload_needed_for_multiple
- int, 1 if this reload needed for more than one thing.
- reload_when_needed enum, classifies reload as needed either for
+ reload_opnum int, operand number being reloaded. This is
+ used to group related reloads and need not always
+ be equal to the actual operand number in the insn,
+ though it current will be; for in-out operands, it
+ is one of the two operand numbers.
+ reload_when_needed enum, classifies reload as needed either for
addressing an input reload, addressing an output,
for addressing a non-reloaded mem ref,
or for unspecified purposes (i.e., more than one
enum reg_class reload_reg_class[MAX_RELOADS];
enum machine_mode reload_inmode[MAX_RELOADS];
enum machine_mode reload_outmode[MAX_RELOADS];
-char reload_strict_low[MAX_RELOADS];
rtx reload_reg_rtx[MAX_RELOADS];
char reload_optional[MAX_RELOADS];
int reload_inc[MAX_RELOADS];
rtx reload_in_reg[MAX_RELOADS];
char reload_nocombine[MAX_RELOADS];
-int reload_needed_for_multiple[MAX_RELOADS];
-rtx reload_needed_for[MAX_RELOADS];
-enum reload_when_needed reload_when_needed[MAX_RELOADS];
+int reload_opnum[MAX_RELOADS];
+enum reload_type reload_when_needed[MAX_RELOADS];
int reload_secondary_reload[MAX_RELOADS];
int reload_secondary_p[MAX_RELOADS];
enum insn_code reload_secondary_icode[MAX_RELOADS];
int n_earlyclobbers;
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
+int reload_n_operands;
+
/* Replacing reloads.
If `replace_reloads' is nonzero, then as each reload is recorded
/* Number of replacements currently recorded. */
static int n_replacements;
+/* Used to track what is modified by an operand. */
+struct decomposition
+{
+ int reg_flag; /* Nonzero if referencing a register. */
+ int safe; /* Nonzero if this can't conflict with anything. */
+ rtx base; /* Base adddress for MEM. */
+ HOST_WIDE_INT start; /* Starting offset or register number. */
+ HOST_WIDE_INT end; /* Endinf offset or register number. */
+};
+
/* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
(see reg_equiv_address). */
static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
static int n_memlocs;
+#ifdef SECONDARY_MEMORY_NEEDED
+
+/* Save MEMs needed to copy from one class of registers to another. One MEM
+ is used per mode, but normally only one or two modes are ever used.
+
+ We keep two versions, before and after register elimination. The one
+ after register elimination is record separately for each operand. This
+ is done in case the address is not valid to be sure that we separately
+ reload each. */
+
+static rtx secondary_memlocs[NUM_MACHINE_MODES];
+static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
+#endif
+
/* The instruction we are doing reloads for;
so we can test whether a register dies in it. */
static rtx this_insn;
operand, which can be different for that from the input operand. */
static int output_reloadnum;
-static int alternative_allows_memconst ();
-static rtx find_dummy_reload ();
-static rtx find_reloads_toplev ();
-static int find_reloads_address ();
-static int find_reloads_address_1 ();
-static void find_reloads_address_part ();
-static int hard_reg_set_here_p ();
-/* static rtx forget_volatility (); */
-static rtx subst_reg_equivs ();
-static rtx subst_indexed_address ();
-rtx find_equiv_reg ();
-static int find_inc_amount ();
+static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
+ enum machine_mode, int,
+ enum insn_code *,
+ enum machine_mode *,
+ enum reg_class *,
+ enum insn_code *,
+ enum machine_mode *));
+static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
+ enum machine_mode, enum machine_mode,
+ int, int, int, enum reload_type));
+static void push_replacement PROTO((rtx *, int, enum machine_mode));
+static void combine_reloads PROTO((void));
+static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
+ enum reg_class, int));
+static int hard_reg_set_here_p PROTO((int, int, rtx));
+static struct decomposition decompose PROTO((rtx));
+static int immune_p PROTO((rtx, rtx, struct decomposition));
+static int alternative_allows_memconst PROTO((char *, int));
+static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
+static rtx make_memloc PROTO((rtx, int));
+static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
+ int, enum reload_type, int));
+static rtx subst_reg_equivs PROTO((rtx));
+static rtx subst_indexed_address PROTO((rtx));
+static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
+ enum reload_type,int));
+static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
+ enum machine_mode, int,
+ enum reload_type, int));
+static int find_inc_amount PROTO((rtx, rtx));
\f
#ifdef HAVE_SECONDARY_RELOADS
}
#endif /* HAVE_SECONDARY_RELOADS */
\f
-/* Record one (sometimes two) reload that needs to be performed.
+#ifdef SECONDARY_MEMORY_NEEDED
+
+/* Return a memory location that will be used to copy X in mode MODE.
+ If we haven't already made a location for this mode in this insn,
+ call find_reloads_address on the location being returned. */
+
+rtx
+get_secondary_mem (x, mode, opnum, type)
+ rtx x;
+ enum machine_mode mode;
+ int opnum;
+ enum reload_type type;
+{
+ rtx loc;
+ int mem_valid;
+
+ /* If MODE is narrower than a word, widen it. This is required because
+ most machines that require these memory locations do not support
+ short load and stores from all registers (e.g., FP registers). We could
+ possibly conditionalize this, but we lose nothing by doing the wider
+ mode. */
+
+ if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
+ mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
+
+ /* If we already have made a MEM for this operand in MODE, return it. */
+ if (secondary_memlocs_elim[(int) mode][opnum] != 0)
+ return secondary_memlocs_elim[(int) mode][opnum];
+
+ /* If this is the first time we've tried to get a MEM for this mode,
+ allocate a new one. `something_changed' in reload will get set
+ by noticing that the frame size has changed. */
+
+ if (secondary_memlocs[(int) mode] == 0)
+ {
+#ifdef SECONDARY_MEMORY_NEEDED_RTX
+ secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
+#else
+ secondary_memlocs[(int) mode]
+ = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
+#endif
+ }
+
+ /* Get a version of the address doing any eliminations needed. If that
+ didn't give us a new MEM, make a new one if it isn't valid. */
+
+ loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
+ mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
+
+ if (! mem_valid && loc == secondary_memlocs[(int) mode])
+ loc = copy_rtx (loc);
+
+ /* The only time the call below will do anything is if the stack
+ offset is too large. In that case IND_LEVELS doesn't matter, so we
+ can just pass a zero. Adjust the type to be the address of the
+ corresponding object. If the address was valid, save the eliminated
+ address. If it wasn't valid, we need to make a reload each time, so
+ don't save it. */
+
+ if (! mem_valid)
+ {
+ type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
+ : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
+ : RELOAD_OTHER);
+
+ find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
+ opnum, type, 0);
+ }
+
+ secondary_memlocs_elim[(int) mode][opnum] = loc;
+ return loc;
+}
+
+/* Clear any secondary memory locations we've made. */
+
+void
+clear_secondary_mem ()
+{
+ bzero (secondary_memlocs, sizeof secondary_memlocs);
+}
+#endif /* SECONDARY_MEMORY_NEEDED */
+\f
+/* Record one reload that needs to be performed.
IN is an rtx saying where the data are to be found before this instruction.
OUT says where they must be stored after the instruction.
(IN is zero for data not read, and OUT is zero for data not written.)
INLOC and OUTLOC point to the places in the instructions where
IN and OUT were found.
+ If IN and OUT are both non-zero, it means the same register must be used
+ to reload both IN and OUT.
+
CLASS is a register class required for the reloaded data.
INMODE is the machine mode that the instruction requires
for the reg that replaces IN and OUTMODE is likewise for OUT.
OPTIONAL nonzero means this reload does not need to be performed:
it can be discarded if that is more convenient.
+ OPNUM and TYPE say what the purpose of this reload is.
+
The return value is the reload-number for this reload.
If both IN and OUT are nonzero, in some rare cases we might
static int
push_reload (in, out, inloc, outloc, class,
- inmode, outmode, strict_low, optional, needed_for)
+ inmode, outmode, strict_low, optional, opnum, type)
register rtx in, out;
rtx *inloc, *outloc;
enum reg_class class;
enum machine_mode inmode, outmode;
int strict_low;
int optional;
- rtx needed_for;
+ int opnum;
+ enum reload_type type;
{
register int i;
int dont_share = 0;
? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
: rtx_equal_p (x, y) && ! side_effects_p (x))))
+ /* Indicates if two reloads purposes are for similar enough things that we
+ can merge their reloads. */
+#define MERGABLE_RELOADS(when1, when2, op1, op2) \
+ ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
+ || ((when1) == (when2) && (op1) == (op2)) \
+ || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
+ || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
+ && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
+ || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
+ && (when2) == RELOAD_FOR_OTHER_ADDRESS))
+
+ /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
+#define MERGE_TO_OTHER(when1, when2, op1, op2) \
+ ((when1) != (when2) \
+ || ! ((op1) == (op2) \
+ || (when1) == RELOAD_FOR_INPUT \
+ || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
+ || (when1) == RELOAD_FOR_OTHER_ADDRESS))
+
/* INMODE and/or OUTMODE could be VOIDmode if no mode
has been specified for the operand. In that case,
use the operand's mode as the mode to reload. */
really reload just the inside expression in its own mode.
If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
register is a pseudo, this will become the same as the above case.
- Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
+ Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
either M1 is not valid for R or M2 is wider than a word but we only
need one word to store an M2-sized quantity in R.
+ (However, if OUT is nonzero, we need to reload the reg *and*
+ the subreg, so do nothing here, and let following statement handle it.)
+
Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
we can't handle it here because CONST_INT does not indicate a mode.
Similarly, we must reload the inside expression if we have a
- STRICT_LOW_PART (presumably, in == out in the cas). */
+ STRICT_LOW_PART (presumably, in == out in the cas).
+
+ Also reload the inner expression if it does not require a secondary
+ reload but the SUBREG does. */
if (in != 0 && GET_CODE (in) == SUBREG
&& (GET_CODE (SUBREG_REG (in)) != REG
&& REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
&& (GET_MODE_SIZE (inmode)
> GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
- || (GET_CODE (SUBREG_REG (in)) == REG
- && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ || (REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ /* The case where out is nonzero
+ is handled differently in the following statement. */
+ && (out == 0 || SUBREG_WORD (in) == 0)
&& (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
|| (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
&& (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
&& ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
/ UNITS_PER_WORD)
!= HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
- GET_MODE (SUBREG_REG (in)))))))))
+ GET_MODE (SUBREG_REG (in)))))))
+#ifdef SECONDARY_INPUT_RELOAD_CLASS
+ || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
+ && (SECONDARY_INPUT_RELOAD_CLASS (class,
+ GET_MODE (SUBREG_REG (in)),
+ SUBREG_REG (in))
+ == NO_REGS))
+#endif
+ ))
{
in_subreg_loc = inloc;
inloc = &SUBREG_REG (in);
in = *inloc;
+#if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
if (GET_CODE (in) == MEM)
/* This is supposed to happen only for paradoxical subregs made by
combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
abort ();
+#endif
inmode = GET_MODE (in);
}
+ /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
+ either M1 is not valid for R or M2 is wider than a word but we only
+ need one word to store an M2-sized quantity in R.
+
+ However, we must reload the inner reg *as well as* the subreg in
+ that case. */
+
+ if (in != 0 && GET_CODE (in) == SUBREG
+ && GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
+ && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
+ || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
+ && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ > UNITS_PER_WORD)
+ && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
+ / UNITS_PER_WORD)
+ != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
+ GET_MODE (SUBREG_REG (in)))))))
+ {
+ push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
+ GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
+ }
+
+
/* Similarly for paradoxical and problematical SUBREGs on the output.
Note that there is no reason we need worry about the previous value
of SUBREG_REG (out); even if wider than out,
&& ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
/ UNITS_PER_WORD)
!= HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
- GET_MODE (SUBREG_REG (out)))))))))
+ GET_MODE (SUBREG_REG (out)))))))
+#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
+ || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
+ && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
+ GET_MODE (SUBREG_REG (out)),
+ SUBREG_REG (out))
+ == NO_REGS))
+#endif
+ ))
{
out_subreg_loc = outloc;
outloc = &SUBREG_REG (out);
- out = *outloc;
- if (GET_CODE (out) == MEM
+ out = *outloc;
+#if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
+ if (GET_CODE (out) == MEM
&& GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
abort ();
+#endif
outmode = GET_MODE (out);
}
- /* That's all we use STRICT_LOW for, so clear it. At some point,
- we may want to get rid of reload_strict_low. */
- strict_low = 0;
-
/* If IN appears in OUT, we can't share any input-only reload for IN. */
if (in != 0 && out != 0 && GET_CODE (out) == MEM
&& (GET_CODE (in) == REG || GET_CODE (in) == MEM)
- && reg_overlap_mentioned_p (in, XEXP (out, 0)))
+ && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
dont_share = 1;
+ /* If IN is a SUBREG of a hard register, make a new REG. This
+ simplifies some of the cases below. */
+
+ if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
+ && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
+ in = gen_rtx (REG, GET_MODE (in),
+ REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
+
+ /* Similarly for OUT. */
+ if (out != 0 && GET_CODE (out) == SUBREG
+ && GET_CODE (SUBREG_REG (out)) == REG
+ && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
+ out = gen_rtx (REG, GET_MODE (out),
+ REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
+
/* Narrow down the class of register wanted if that is
desirable on this machine for efficiency. */
if (in != 0)
class = PREFERRED_RELOAD_CLASS (in, class);
+ /* Output reloads may need analogous treatment, different in detail. */
+#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
+ if (out != 0)
+ class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
+#endif
+
/* Make sure we use a class that can handle the actual pseudo
inside any subreg. For example, on the 386, QImode regs
can appear within SImode subregs. Although GENERAL_REGS
class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
#endif
- if (class == NO_REGS)
- abort ();
-
/* Verify that this class is at least possible for the mode that
is specified. */
if (this_insn_is_asm)
mode = inmode;
else
mode = outmode;
+ if (mode == VOIDmode)
+ {
+ error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
+ mode = word_mode;
+ if (in != 0)
+ inmode = word_mode;
+ if (out != 0)
+ outmode = word_mode;
+ }
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (HARD_REGNO_MODE_OK (i, mode)
&& TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
}
}
+ if (class == NO_REGS)
+ abort ();
+
/* We can use an existing reload if the class is right
and at least one of IN and OUT is a match
and the other is at worst neutral.
- (A zero compared against anything is neutral.) */
+ (A zero compared against anything is neutral.)
+
+ If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
+ for the same thing since that can cause us to need more reload registers
+ than we otherwise would. */
+
for (i = 0; i < n_reloads; i++)
if ((reg_class_subset_p (class, reload_reg_class[i])
|| reg_class_subset_p (reload_reg_class[i], class))
- && reload_strict_low[i] == strict_low
/* If the existing reload has a register, it must fit our class. */
&& (reload_reg_rtx[i] == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) class],
&& (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
||
(out != 0 && MATCHES (reload_out[i], out)
- && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
+ && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
+ && (reg_class_size[(int) class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
break;
/* Reloading a plain reg for input can match a reload to postincrement
&& (reload_reg_rtx[i] == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) class],
true_regnum (reload_reg_rtx[i])))
- && reload_strict_low[i] == strict_low
&& out == 0 && reload_out[i] == 0 && reload_in[i] != 0
&& ((GET_CODE (in) == REG
&& (GET_CODE (reload_in[i]) == POST_INC
|| GET_CODE (in) == POST_DEC
|| GET_CODE (in) == PRE_INC
|| GET_CODE (in) == PRE_DEC)
- && MATCHES (XEXP (in, 0), reload_in[i]))))
+ && MATCHES (XEXP (in, 0), reload_in[i])))
+ && (reg_class_size[(int) class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
{
/* Make sure reload_in ultimately has the increment,
not the plain register. */
/* We can only record one secondary and one tertiary reload. If both
IN and OUT need secondary reloads, we can only make an in-out
- reload if neither need an insn and if the classes are compatible. */
+ reload if neither need an insn and if the classes are compatible.
+ If they aren't, all we can do is abort since making two separate
+ reloads is invalid. */
if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
&& reg_class_subset_p (secondary_out_class, secondary_class))
&& (! reg_class_subset_p (secondary_class, secondary_out_class)
|| secondary_icode != CODE_FOR_nothing
|| secondary_out_icode != CODE_FOR_nothing))
- {
- push_reload (0, out, 0, outloc, class, VOIDmode, outmode,
- strict_low, optional, needed_for);
- out = 0;
- outloc = 0;
- outmode = VOIDmode;
- }
+ abort ();
/* If we need a secondary reload for OUT but not IN, copy the
information. */
if (secondary_class != NO_REGS)
{
+ /* Secondary reloads don't conflict as badly as the primary object
+ being reload. Specifically, we can always treat them as
+ being for an input or output address and hence allowed to be
+ reused in the same manner such address components could be
+ reused. This is used as the reload_type for our secondary
+ reloads. */
+
+ enum reload_type secondary_type
+ = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
+ : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
+ : type);
+
/* If we need a tertiary reload, see if we have one we can reuse
or else make one. */
&& ((reload_outmode[tertiary_reload] == tertiary_mode)
|| reload_outmode[tertiary_reload] == VOIDmode)
&& (reload_secondary_icode[tertiary_reload]
- == CODE_FOR_nothing))
-
+ == CODE_FOR_nothing)
+ && (reg_class_size[(int) tertiary_class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (secondary_type,
+ reload_when_needed[tertiary_reload],
+ opnum, reload_opnum[tertiary_reload]))
{
if (tertiary_mode != VOIDmode)
reload_inmode[tertiary_reload] = tertiary_mode;
if (reg_class_subset_p (tertiary_class,
reload_reg_class[tertiary_reload]))
reload_reg_class[tertiary_reload] = tertiary_class;
- if (reload_needed_for[tertiary_reload] != needed_for)
- reload_needed_for_multiple[tertiary_reload] = 1;
+ if (MERGE_TO_OTHER (secondary_type,
+ reload_when_needed[tertiary_reload],
+ opnum,
+ reload_opnum[tertiary_reload]))
+ reload_when_needed[tertiary_reload] = RELOAD_OTHER;
+ reload_opnum[tertiary_reload]
+ = MIN (reload_opnum[tertiary_reload], opnum);
reload_optional[tertiary_reload] &= optional;
reload_secondary_p[tertiary_reload] = 1;
}
reload_reg_rtx[tertiary_reload] = 0;
reload_optional[tertiary_reload] = optional;
reload_inc[tertiary_reload] = 0;
- reload_strict_low[tertiary_reload] = 0;
/* Maybe we could combine these, but it seems too tricky. */
reload_nocombine[tertiary_reload] = 1;
reload_in_reg[tertiary_reload] = 0;
- reload_needed_for[tertiary_reload] = needed_for;
- reload_needed_for_multiple[tertiary_reload] = 0;
+ reload_opnum[tertiary_reload] = opnum;
+ reload_when_needed[tertiary_reload] = secondary_type;
reload_secondary_reload[tertiary_reload] = -1;
reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
reload_secondary_p[tertiary_reload] = 1;
&& ((reload_outmode[secondary_reload] == secondary_out_mode)
|| reload_outmode[secondary_reload] == VOIDmode)
&& reload_secondary_reload[secondary_reload] == tertiary_reload
- && reload_secondary_icode[secondary_reload] == tertiary_icode)
+ && reload_secondary_icode[secondary_reload] == tertiary_icode
+ && (reg_class_size[(int) secondary_class] == 1
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ && MERGABLE_RELOADS (secondary_type,
+ reload_when_needed[secondary_reload],
+ opnum, reload_opnum[secondary_reload]))
{
if (secondary_mode != VOIDmode)
reload_inmode[secondary_reload] = secondary_mode;
if (reg_class_subset_p (secondary_class,
reload_reg_class[secondary_reload]))
reload_reg_class[secondary_reload] = secondary_class;
- if (reload_needed_for[secondary_reload] != needed_for)
- reload_needed_for_multiple[secondary_reload] = 1;
+ if (MERGE_TO_OTHER (secondary_type,
+ reload_when_needed[secondary_reload],
+ opnum, reload_opnum[secondary_reload]))
+ reload_when_needed[secondary_reload] = RELOAD_OTHER;
+ reload_opnum[secondary_reload]
+ = MIN (reload_opnum[secondary_reload], opnum);
reload_optional[secondary_reload] &= optional;
reload_secondary_p[secondary_reload] = 1;
}
reload_reg_rtx[secondary_reload] = 0;
reload_optional[secondary_reload] = optional;
reload_inc[secondary_reload] = 0;
- reload_strict_low[secondary_reload] = 0;
/* Maybe we could combine these, but it seems too tricky. */
reload_nocombine[secondary_reload] = 1;
reload_in_reg[secondary_reload] = 0;
- reload_needed_for[secondary_reload] = needed_for;
- reload_needed_for_multiple[secondary_reload] = 0;
+ reload_opnum[secondary_reload] = opnum;
+ reload_when_needed[secondary_reload] = secondary_type;
reload_secondary_reload[secondary_reload] = tertiary_reload;
reload_secondary_icode[secondary_reload] = tertiary_icode;
reload_secondary_p[secondary_reload] = 1;
n_reloads++;
i = n_reloads;
+
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* If we need a memory location to copy between the two
+ reload regs, set it up now. */
+
+ if (in != 0 && secondary_icode == CODE_FOR_nothing
+ && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
+ get_secondary_mem (in, inmode, opnum, type);
+
+ if (out != 0 && secondary_icode == CODE_FOR_nothing
+ && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
+ get_secondary_mem (out, outmode, opnum, type);
+#endif
}
}
#endif
reload_reg_rtx[i] = 0;
reload_optional[i] = optional;
reload_inc[i] = 0;
- reload_strict_low[i] = strict_low;
reload_nocombine[i] = 0;
reload_in_reg[i] = inloc ? *inloc : 0;
- reload_needed_for[i] = needed_for;
- reload_needed_for_multiple[i] = 0;
+ reload_opnum[i] = opnum;
+ reload_when_needed[i] = type;
reload_secondary_reload[i] = secondary_reload;
reload_secondary_icode[i] = secondary_icode;
reload_secondary_p[i] = 0;
n_reloads++;
+
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* If a memory location is needed for the copy, make one. */
+ if (in != 0 && GET_CODE (in) == REG
+ && REGNO (in) < FIRST_PSEUDO_REGISTER
+ && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
+ class, inmode))
+ get_secondary_mem (in, inmode, opnum, type);
+
+ if (out != 0 && GET_CODE (out) == REG
+ && REGNO (out) < FIRST_PSEUDO_REGISTER
+ && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
+ outmode))
+ get_secondary_mem (out, outmode, opnum, type);
+#endif
}
else
{
if (reg_class_subset_p (class, reload_reg_class[i]))
reload_reg_class[i] = class;
reload_optional[i] &= optional;
- if (reload_needed_for[i] != needed_for)
- reload_needed_for_multiple[i] = 1;
+ if (MERGE_TO_OTHER (type, reload_when_needed[i],
+ opnum, reload_opnum[i]))
+ reload_when_needed[i] = RELOAD_OTHER;
+ reload_opnum[i] = MIN (reload_opnum[i], opnum);
}
/* If the ostensible rtx being reload differs from the rtx found
+ HARD_REGNO_NREGS (regno,
inmode)),
PATTERN (this_insn), inloc)
+ /* If this is also an output reload, IN cannot be used as
+ the reload register if it is set in this insn unless IN
+ is also OUT. */
+ && (out == 0 || in == out
+ || ! hard_reg_set_here_p (regno,
+ (regno
+ + HARD_REGNO_NREGS (regno,
+ inmode)),
+ PATTERN (this_insn)))
+ /* ??? Why is this code so different from the previous?
+ Is there any simple coherent way to describe the two together?
+ What's going on here. */
&& (in != out
|| (GET_CODE (in) == SUBREG
&& (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
}
}
\f
+/* Transfer all replacements that used to be in reload FROM to be in
+ reload TO. */
+
+void
+transfer_replacements (to, from)
+ int to, from;
+{
+ int i;
+
+ for (i = 0; i < n_replacements; i++)
+ if (replacements[i].what == from)
+ replacements[i].what = to;
+}
+\f
/* If there is only one output reload, and it is not for an earlyclobber
operand, try to combine it with a (logically unrelated) input reload
to reduce the number of reload registers needed.
if (reload_in[output_reload] != 0)
return;
- /* If this reload is for an earlyclobber operand, we can't do anyting. */
+ /* If this reload is for an earlyclobber operand, we can't do anything. */
for (i = 0; i < n_earlyclobbers; i++)
if (reload_out[output_reload] == reload_earlyclobbers[i])
for (i = 0; i < n_reloads; i++)
if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
/* Life span of this reload must not extend past main insn. */
- && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
- && reload_inmode[i] == reload_outmode[output_reload]
+ && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
+ && reload_when_needed[i] != RELOAD_OTHER
+ && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
+ == CLASS_MAX_NREGS (reload_reg_class[output_reload],
+ reload_outmode[output_reload]))
&& reload_inc[i] == 0
&& reload_reg_rtx[i] == 0
- && reload_strict_low[i] == 0
/* Don't combine two reloads with different secondary reloads. */
&& (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
|| reload_secondary_reload[i] == -1
|| reload_secondary_reload[output_reload] == -1)
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* Likewise for different secondary memory locations. */
+ && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
+ || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
+ || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
+ secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
+#endif
+#ifdef SMALL_REGISTER_CLASSES
+ && reload_reg_class[i] == reload_reg_class[output_reload]
+#else
&& (reg_class_subset_p (reload_reg_class[i],
reload_reg_class[output_reload])
|| reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i]))
+#endif
&& (MATCHES (reload_in[i], reload_out[output_reload])
/* Args reversed because the first arg seems to be
the one that we imagine being modified
while the second is the one that might be affected. */
- || (! reg_overlap_mentioned_p (reload_out[output_reload],
- reload_in[i])
+ || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
+ reload_in[i])
/* However, if the input is a register that appears inside
the output, then we also can't share.
Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
result to be stored in memory, then that result
will clobber the address of the memory ref. */
&& ! (GET_CODE (reload_in[i]) == REG
- && reg_overlap_mentioned_p (reload_in[i],
- reload_out[output_reload])))))
+ && reg_overlap_mentioned_for_reload_p (reload_in[i],
+ reload_out[output_reload]))))
+ && (reg_class_size[(int) reload_reg_class[i]]
+#ifdef SMALL_REGISTER_CLASSES
+ || 1
+#endif
+ )
+ /* We will allow making things slightly worse by combining an
+ input and an output, but no worse than that. */
+ && (reload_when_needed[i] == RELOAD_FOR_INPUT
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
{
int j;
/* Mark the old output reload as inoperative. */
reload_out[output_reload] = 0;
/* The combined reload is needed for the entire insn. */
- reload_needed_for_multiple[i] = 1;
reload_when_needed[i] = RELOAD_OTHER;
/* If the output reload had a secondary reload, copy it. */
if (reload_secondary_reload[output_reload] != -1)
reload_secondary_reload[i] = reload_secondary_reload[output_reload];
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* Copy any secondary MEM. */
+ if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
+ secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
+ = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
+#endif
/* If required, minimize the register class. */
if (reg_class_subset_p (reload_reg_class[output_reload],
reload_reg_class[i]))
for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
if (REG_NOTE_KIND (note) == REG_DEAD
&& GET_CODE (XEXP (note, 0)) == REG
- && ! reg_overlap_mentioned_p (XEXP (note, 0),
- reload_out[output_reload])
+ && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
+ reload_out[output_reload])
&& REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
&& HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
&& TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
{
register int regno = REGNO (out) + out_offset;
int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
+ rtx saved_rtx;
/* When we consider whether the insn uses OUT,
ignore references within IN. They don't prevent us
If the insn uses IN elsewhere and it contains OUT,
that counts. We can't be sure it's the "same" operand
so it might not go through this reload. */
+ saved_rtx = *inloc;
*inloc = const0_rtx;
if (regno < FIRST_PSEUDO_REGISTER
}
}
- *inloc = real_in;
+ *inloc = saved_rtx;
}
/* Consider using IN if OUT was not acceptable
register int regno = REGNO (in) + in_offset;
int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
- if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, 0)
+ if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
&& ! hard_reg_set_here_p (regno, regno + nwords,
PATTERN (this_insn)))
{
win:
return 1;
}
-
\f
/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
if they are the same hard reg, and has special hacks for
else
j = REGNO (y);
+ /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
+ multiple hard register group, so that for example (reg:DI 0) and
+ (reg:SI 1) will be considered the same register. */
+ if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
+ && i < FIRST_PSEUDO_REGISTER)
+ i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
+ if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
+ && j < FIRST_PSEUDO_REGISTER)
+ j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
+
return i == j;
}
/* If two operands must match, because they are really a single
int val;
switch (fmt[i])
{
+ case 'w':
+ if (XWINT (x, i) != XWINT (y, i))
+ return 0;
+ break;
+
case 'i':
if (XINT (x, i) != XINT (y, i))
return 0;
\f
/* Return the number of times character C occurs in string S. */
-static int
+int
n_occurrences (c, s)
char c;
char *s;
return n;
}
\f
-struct decomposition
-{
- int reg_flag;
- int safe;
- rtx base;
- int start;
- int end;
-};
-
/* Describe the range of registers or memory referenced by X.
If X is a register, set REG_FLAG and put the first register
number into START and the last plus one into END.
struct decomposition xdata;
if (ydata.reg_flag)
- return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, 0);
+ return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
if (ydata.safe)
return 1;
return (xdata.start >= ydata.end || ydata.start >= xdata.end);
}
-/* Similiar, but calls decompose. */
+/* Similar, but calls decompose. */
int
safe_from_earlyclobber (op, clobber)
int live_known;
short *reload_reg_p;
{
- rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
- int n_non_reloaded_operands = 0;
#ifdef REGISTER_CONSTRAINTS
- enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
-
register int insn_code_number;
- register int i;
+ register int i, j;
int noperands;
/* These are the constraints for the insn. We don't change them. */
char *constraints1[MAX_RECOG_OPERANDS];
char pref_or_nothing[MAX_RECOG_OPERANDS];
/* Nonzero for a MEM operand whose entire address needs a reload. */
int address_reloaded[MAX_RECOG_OPERANDS];
+ /* Value of enum reload_type to use for operand. */
+ enum reload_type operand_type[MAX_RECOG_OPERANDS];
+ /* Value of enum reload_type to use within address of operand. */
+ enum reload_type address_type[MAX_RECOG_OPERANDS];
+ /* Save the usage of each operand. */
+ enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
int no_input_reloads = 0, no_output_reloads = 0;
int n_alternatives;
int this_alternative[MAX_RECOG_OPERANDS];
char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
int goal_alternative_swapped;
- enum reload_modified modified[MAX_RECOG_OPERANDS];
int best;
int commutative;
char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
no_output_reloads = 1;
#endif
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* The eliminated forms of any secondary memory locations are per-insn, so
+ clear them out here. */
+
+ bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
+#endif
+
/* Find what kind of insn this is. NOPERANDS gets number of operands.
Make OPERANDS point to a vector of operand values.
Make OPERAND_LOCS point to a vector of pointers to
return;
case PARALLEL:
case ASM_OPERANDS:
- noperands = asm_noperands (body);
+ reload_n_operands = noperands = asm_noperands (body);
if (noperands >= 0)
{
/* This insn is an `asm' with operands. */
if (insn_code_number < 0)
fatal_insn_not_found (insn);
- noperands = insn_n_operands[insn_code_number];
+ reload_n_operands = noperands = insn_n_operands[insn_code_number];
n_alternatives = insn_n_alternatives[insn_code_number];
/* Just return "no reloads" if insn has no operands with constraints. */
if (n_alternatives == 0)
substed_operand[i] = recog_operand[i];
p = constraints[i];
- /* Scan this operand's constraint to see if it should match another. */
+ modified[i] = RELOAD_READ;
+
+ /* Scan this operand's constraint to see if it is an output operand,
+ an in-out operand, is commutative, or should match another. */
while (c = *p++)
- if (c == '%')
- {
- /* The last operand should not be marked commutative. This
- problem is hard to detect, so make it obvious by calling
- abort here. */
- if (i == noperands - 1)
- abort ();
+ {
+ if (c == '=')
+ modified[i] = RELOAD_WRITE;
+ else if (c == '+')
+ modified[i] = RELOAD_READ_WRITE;
+ else if (c == '%')
+ {
+ /* The last operand should not be marked commutative. */
+ if (i == noperands - 1)
+ {
+ if (this_insn_is_asm)
+ warning_for_asm (this_insn,
+ "`%%' constraint used with last operand");
+ else
+ abort ();
+ }
+ else
+ commutative = i;
+ }
+ else if (c >= '0' && c <= '9')
+ {
+ c -= '0';
+ operands_match[c][i]
+ = operands_match_p (recog_operand[c], recog_operand[i]);
- commutative = i;
- }
- else if (c >= '0' && c <= '9')
- {
- c -= '0';
- operands_match[c][i]
- = operands_match_p (recog_operand[c], recog_operand[i]);
- /* If C can be commuted with C+1, and C might need to match I,
- then C+1 might also need to match I. */
- if (commutative >= 0)
- {
- if (c == commutative || c == commutative + 1)
- {
- int other = c + (c == commutative ? 1 : -1);
- operands_match[other][i]
- = operands_match_p (recog_operand[other], recog_operand[i]);
- }
- if (i == commutative || i == commutative + 1)
- {
- int other = i + (i == commutative ? 1 : -1);
- operands_match[c][other]
- = operands_match_p (recog_operand[c], recog_operand[other]);
- }
- /* Note that C is supposed to be less than I.
- No need to consider altering both C and I
- because in that case we would alter one into the other. */
- }
- }
+ /* An operand may not match itself. */
+ if (c == i)
+ {
+ if (this_insn_is_asm)
+ warning_for_asm (this_insn,
+ "operand %d has constraint %d", i, c);
+ else
+ abort ();
+ }
+
+ /* If C can be commuted with C+1, and C might need to match I,
+ then C+1 might also need to match I. */
+ if (commutative >= 0)
+ {
+ if (c == commutative || c == commutative + 1)
+ {
+ int other = c + (c == commutative ? 1 : -1);
+ operands_match[other][i]
+ = operands_match_p (recog_operand[other], recog_operand[i]);
+ }
+ if (i == commutative || i == commutative + 1)
+ {
+ int other = i + (i == commutative ? 1 : -1);
+ operands_match[c][other]
+ = operands_match_p (recog_operand[c], recog_operand[other]);
+ }
+ /* Note that C is supposed to be less than I.
+ No need to consider altering both C and I because in
+ that case we would alter one into the other. */
+ }
+ }
+ }
}
/* Examine each operand that is a memory reference or memory address
and reload parts of the addresses into index registers.
- While we are at it, initialize the array `modified'.
Also here any references to pseudo regs that didn't get hard regs
but are equivalent to constants get replaced in the insn itself
with those constants. Nobody will ever see them again.
for (i = 0; i < noperands; i++)
{
register RTX_CODE code = GET_CODE (recog_operand[i]);
- modified[i] = RELOAD_READ;
+
address_reloaded[i] = 0;
+ operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
+ : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
+ : RELOAD_OTHER);
+ address_type[i]
+ = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
+ : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
+ : RELOAD_OTHER);
if (constraints[i][0] == 'p')
{
- find_reloads_address (VOIDmode, 0,
+ find_reloads_address (VOIDmode, NULL_PTR,
recog_operand[i], recog_operand_loc[i],
- recog_operand[i], ind_levels);
+ i, operand_type[i], ind_levels);
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
else if (code == MEM)
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels))
+ i, address_type[i], ind_levels))
address_reloaded[i] = 1;
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
else if (code == SUBREG)
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], ind_levels,
+ = find_reloads_toplev (recog_operand[i], i, address_type[i],
+ ind_levels,
set != 0
&& &SET_DEST (set) == recog_operand_loc[i]);
else if (code == REG)
address = copy_rtx (address);
/* If this is an output operand, we must output a CLOBBER
- after INSN so find_equiv_reg knows REGNO is being written. */
- if (constraints[i][0] == '='
- || constraints[i][0] == '+')
- emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
- insn);
+ after INSN so find_equiv_reg knows REGNO is being written.
+ Mark this insn specially, do we can put our output reloads
+ after it. */
+
+ if (modified[i] != RELOAD_READ)
+ PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
+ recog_operand[i]),
+ insn),
+ DImode);
*recog_operand_loc[i] = recog_operand[i]
= gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels);
+ i, address_type[i], ind_levels);
substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
}
}
equivalent), get the preferred class to reload it into. */
code = GET_CODE (recog_operand[i]);
preferred_class[i]
- = ((code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER)
+ = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
pref_or_nothing[i]
- = (code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER
- && reg_preferred_or_nothing (REGNO (recog_operand[i])));
+ = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
+ && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
}
/* If this is simply a copy from operand 1 to operand 0, merge the
/* Force reload if this is not a register or if there may may
be a problem accessing the register in the outer mode. */
if (GET_CODE (operand) != REG
-#ifdef BYTE_LOADS_ZERO_EXTEND
+#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
+ /* ??? The comment below clearly does not match the code.
+ What the code below actually does is set force_reload
+ for a paradoxical subreg of a pseudo. rms and kenner
+ can't see the point of doing this. */
/* Nonparadoxical subreg of a pseudoreg.
Don't to load the full width if on this machine
- we expected the fetch to zero-extend. */
+ we expected the fetch to extend. */
|| ((GET_MODE_SIZE (operand_mode[i])
> GET_MODE_SIZE (GET_MODE (operand)))
&& REGNO (operand) >= FIRST_PSEUDO_REGISTER)
-#endif /* BYTE_LOADS_ZERO_EXTEND */
+#endif
/* Subreg of a hard reg which can't handle the subreg's mode
or which would handle that mode in the wrong number of
registers for subregging to work. */
switch (c)
{
case '=':
- modified[i] = RELOAD_WRITE;
- break;
-
case '+':
- modified[i] = RELOAD_READ_WRITE;
- break;
-
case '*':
break;
case '%':
- commutative = i;
+ /* The last operand should not be marked commutative. */
+ if (i != noperands - 1)
+ commutative = i;
break;
case '?':
/* Match any floating double constant, but only if
we can examine the bits of it reliably. */
if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
- || HOST_BITS_PER_INT != BITS_PER_WORD)
+ || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
&& GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
break;
if (GET_CODE (operand) == CONST_DOUBLE)
/* Alternative loses if it requires a type of reload not
permitted for this insn. We can always reload SCRATCH
and objects with a REG_UNUSED note. */
- if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
- && no_output_reloads
+ if (GET_CODE (operand) != SCRATCH
+ && modified[i] != RELOAD_READ && no_output_reloads
&& ! find_reg_note (insn, REG_UNUSED, operand))
bad = 1;
else if (modified[i] != RELOAD_WRITE && no_input_reloads)
Don't bother with this if this alternative will accept this
operand.
+ Don't do this for a multiword operand, if
+ we have to worry about small classes, because making reg groups
+ harder to allocate is asking for trouble.
+
Don't do this if the preferred class has only one register
because we might otherwise exhaust the class. */
if (! win && this_alternative[i] != (int) NO_REGS
+#ifdef SMALL_REGISTER_CLASSES
+ && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
+#endif
&& reg_class_size[(int) preferred_class[i]] > 1)
{
if (! reg_class_subset_p (this_alternative[i],
&& this_alternative_win[i])
{
struct decomposition early_data;
- int j;
early_data = decompose (recog_operand[i]);
goal_alternative_matched[goal_alternative_matches[i]] = i;
/* If the best alternative is with operands 1 and 2 swapped,
- consider them swapped before reporting the reloads. */
+ consider them swapped before reporting the reloads. Update the
+ operand numbers of any reloads already pushed. */
if (goal_alternative_swapped)
{
tem = recog_operand[commutative];
recog_operand[commutative] = recog_operand[commutative + 1];
recog_operand[commutative + 1] = tem;
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ if (reload_opnum[i] == commutative)
+ reload_opnum[i] = commutative + 1;
+ else if (reload_opnum[i] == commutative + 1)
+ reload_opnum[i] = commutative;
+ }
}
/* Perform whatever substitutions on the operands we are supposed
*recog_operand_loc[i] = substed_operand[i];
/* While we are looping on operands, initialize this. */
operand_reloadnum[i] = -1;
+
+ /* If this is an earlyclobber operand, we need to widen the scope.
+ The reload must remain valid from the start of the insn being
+ reloaded until after the operand is stored into its destination.
+ We approximate this with RELOAD_OTHER even though we know that we
+ do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
+
+ One special case that is worth checking is when we have an
+ output that is earlyclobber but isn't used past the insn (typically
+ a SCRATCH). In this case, we only need have the reload live
+ through the insn itself, but not for any of our input or output
+ reloads.
+
+ In any case, anything needed to address this operand can remain
+ however they were previously categorized. */
+
+ if (goal_alternative_earlyclobber[i])
+ operand_type[i]
+ = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
+ ? RELOAD_FOR_INSN : RELOAD_OTHER);
}
/* Any constants that aren't allowed and can't be reloaded
*recog_operand_loc[i] = recog_operand[i]
= find_reloads_toplev (force_const_mem (operand_mode[i],
recog_operand[i]),
- ind_levels, 0);
+ i, address_type[i], ind_levels, 0);
if (alternative_allows_memconst (constraints1[i],
goal_alternative_number))
goal_alternative_win[i] = 1;
&& GET_CODE (recog_operand[i]) == MEM)
{
operand_reloadnum[i]
- = push_reload (XEXP (recog_operand[i], 0), 0,
- &XEXP (recog_operand[i], 0), 0,
+ = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
+ &XEXP (recog_operand[i], 0), NULL_PTR,
BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
- VOIDmode, 0, 0, 0);
+ VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
reload_inc[operand_reloadnum[i]]
= GET_MODE_SIZE (GET_MODE (recog_operand[i]));
+
+ /* If this operand is an output, we will have made any
+ reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
+ now we are treating part of the operand as an input, so
+ we must change these to RELOAD_FOR_INPUT_ADDRESS. */
+
+ if (operand_type[i] == RELOAD_FOR_OUTPUT)
+ for (j = 0; j < n_reloads; j++)
+ if (reload_opnum[j] == i
+ && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
+ reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
}
else if (goal_alternative_matched[i] == -1)
operand_reloadnum[i] =
push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
+ (modified[i] != RELOAD_WRITE ?
+ recog_operand_loc[i] : 0),
modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
(enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_WRITE
+ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_READ
+ ? VOIDmode : operand_mode[i]),
(insn_code_number < 0 ? 0
: insn_operand_strict_low[insn_code_number][i]),
- 0, 0);
+ 0, i, operand_type[i]);
/* In a matching pair of operands, one must be input only
and the other must be output only.
Pass the input operand as IN and the other as OUT. */
(enum reg_class) goal_alternative[i],
operand_mode[i],
operand_mode[goal_alternative_matched[i]],
- 0, 0, 0);
+ 0, 0, i, RELOAD_OTHER);
operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
}
else if (modified[i] == RELOAD_WRITE
(enum reg_class) goal_alternative[i],
operand_mode[goal_alternative_matched[i]],
operand_mode[i],
- 0, 0, 0);
+ 0, 0, i, RELOAD_OTHER);
operand_reloadnum[i] = output_reloadnum;
}
else if (insn_code_number >= 0)
&& goal_alternative_matches[i] < 0
&& optimize)
{
- rtx operand = recog_operand[i];
- /* For each non-matching operand that's a pseudo-register
+ /* For each non-matching operand that's a MEM or a pseudo-register
that didn't get a hard register, make an optional reload.
This may get done even if the insn needs no reloads otherwise. */
- /* (It would be safe to make an optional reload for a matching pair
- of operands, but we don't bother yet.) */
+
+ rtx operand = recog_operand[i];
+
while (GET_CODE (operand) == SUBREG)
operand = XEXP (operand, 0);
- if (GET_CODE (operand) == REG
- && REGNO (operand) >= FIRST_PSEUDO_REGISTER
- && reg_renumber[REGNO (operand)] < 0
+ if ((GET_CODE (operand) == MEM
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
&& (enum reg_class) goal_alternative[i] != NO_REGS
- /* Don't make optional output reloads for jump insns
- (such as aobjeq on the vax). */
+ && ! no_input_reloads
+ /* Optional output reloads don't do anything and we mustn't
+ make in-out reloads on insns that are not permitted output
+ reloads. */
&& (modified[i] == RELOAD_READ
- || GET_CODE (insn) != JUMP_INSN))
- operand_reloadnum[i]
- = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
- (enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
- (insn_code_number < 0 ? 0
- : insn_operand_strict_low[insn_code_number][i]),
- 1, 0);
- /* Make an optional reload for an explicit mem ref. */
- else if (GET_CODE (operand) == MEM
- && (enum reg_class) goal_alternative[i] != NO_REGS
- /* Don't make optional output reloads for jump insns
- (such as aobjeq on the vax). */
- && (modified[i] == RELOAD_READ
- || GET_CODE (insn) != JUMP_INSN))
+ || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
operand_reloadnum[i]
= push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
modified[i] != RELOAD_READ ? recog_operand[i] : 0,
- modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
- modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
+ (modified[i] != RELOAD_WRITE
+ ? recog_operand_loc[i] : 0),
+ (modified[i] != RELOAD_READ
+ ? recog_operand_loc[i] : 0),
(enum reg_class) goal_alternative[i],
- (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
- (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_WRITE
+ ? VOIDmode : operand_mode[i]),
+ (modified[i] == RELOAD_READ
+ ? VOIDmode : operand_mode[i]),
(insn_code_number < 0 ? 0
: insn_operand_strict_low[insn_code_number][i]),
- 1, 0);
- else
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
+ 1, i, operand_type[i]);
}
- else if (goal_alternative_matched[i] < 0
- && goal_alternative_matches[i] < 0)
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
+ else if (goal_alternative_matches[i] >= 0
+ && goal_alternative_win[goal_alternative_matches[i]]
+ && modified[i] == RELOAD_READ
+ && modified[goal_alternative_matches[i]] == RELOAD_WRITE
+ && ! no_input_reloads && ! no_output_reloads
+ && optimize)
+ {
+ /* Similarly, make an optional reload for a pair of matching
+ objects that are in MEM or a pseudo that didn't get a hard reg. */
+
+ rtx operand = recog_operand[i];
+ while (GET_CODE (operand) == SUBREG)
+ operand = XEXP (operand, 0);
+ if ((GET_CODE (operand) == MEM
+ || (GET_CODE (operand) == REG
+ && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
+ && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
+ != NO_REGS))
+ operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
+ = push_reload (recog_operand[goal_alternative_matches[i]],
+ recog_operand[i],
+ recog_operand_loc[goal_alternative_matches[i]],
+ recog_operand_loc[i],
+ (enum reg_class) goal_alternative[goal_alternative_matches[i]],
+ operand_mode[goal_alternative_matches[i]],
+ operand_mode[i],
+ 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
+ }
+
/* Record the values of the earlyclobber operands for the caller. */
if (goal_earlyclobber)
for (i = 0; i < noperands; i++)
}
#endif
+ /* Perhaps an output reload can be combined with another
+ to reduce needs by one. */
+ if (!goal_earlyclobber)
+ combine_reloads ();
+
+ /* If we have a pair of reloads for parts of an address, they are reloading
+ the same object, the operands themselves were not reloaded, and they
+ are for two operands that are supposed to match, merge the reloads and
+ change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ int k;
+
+ for (j = i + 1; j < n_reloads; j++)
+ if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && rtx_equal_p (reload_in[i], reload_in[j])
+ && (operand_reloadnum[reload_opnum[i]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[i]]])
+ && (operand_reloadnum[reload_opnum[j]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[j]]])
+ && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
+ || (goal_alternative_matches[reload_opnum[j]]
+ == reload_opnum[i])))
+ {
+ for (k = 0; k < n_replacements; k++)
+ if (replacements[k].what == j)
+ replacements[k].what = i;
+
+ reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+ reload_in[j] = 0;
+ }
+ }
+
+ /* Scan all the reloads and update their type.
+ If a reload is for the address of an operand and we didn't reload
+ that operand, change the type. Similarly, change the operand number
+ of a reload when two operands match. If a reload is optional, treat it
+ as though the operand isn't reloaded.
+
+ ??? This latter case is somewhat odd because if we do the optional
+ reload, it means the object is hanging around. Thus we need only
+ do the address reload if the optional reload was NOT done.
+
+ Change secondary reloads to be the address type of their operand, not
+ the normal type.
+
+ If an operand's reload is now RELOAD_OTHER, change any
+ RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
+ RELOAD_FOR_OTHER_ADDRESS. */
+
+ for (i = 0; i < n_reloads; i++)
+ {
+ if (reload_secondary_p[i]
+ && reload_when_needed[i] == operand_type[reload_opnum[i]])
+ reload_when_needed[i] = address_type[reload_opnum[i]];
+
+ if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
+ && (operand_reloadnum[reload_opnum[i]] < 0
+ || reload_optional[operand_reloadnum[reload_opnum[i]]]))
+ reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
+
+ if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
+ && operand_reloadnum[reload_opnum[i]] >= 0
+ && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
+ == RELOAD_OTHER))
+ reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
+
+ if (goal_alternative_matches[reload_opnum[i]] >= 0)
+ reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
+ }
+
+ /* See if we have any reloads that are now allowed to be merged
+ because we've changed when the reload is needed to
+ RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
+ check for the most common cases. */
+
+ for (i = 0; i < n_reloads; i++)
+ if (reload_in[i] != 0 && reload_out[i] == 0
+ && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
+ || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
+ for (j = 0; j < n_reloads; j++)
+ if (i != j && reload_in[j] != 0 && reload_out[j] == 0
+ && reload_when_needed[j] == reload_when_needed[i]
+ && MATCHES (reload_in[i], reload_in[j])
+ && reload_reg_class[i] == reload_reg_class[j]
+ && !reload_nocombine[i] && !reload_nocombine[j])
+ {
+ reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
+ transfer_replacements (i, j);
+ reload_in[j] = 0;
+ }
+
#else /* no REGISTER_CONSTRAINTS */
int noperands;
int insn_code_number;
/* Now get the operand values out of the insn. */
- decode_asm_operands (body, recog_operand, recog_operand_loc, 0, 0);
+ decode_asm_operands (body, recog_operand, recog_operand_loc,
+ NULL_PTR, NULL_PTR);
break;
}
if (insn_code_number >= 0)
if (insn_operand_address_p[insn_code_number][i])
- find_reloads_address (VOIDmode, 0,
+ find_reloads_address (VOIDmode, NULL_PTR,
recog_operand[i], recog_operand_loc[i],
- recog_operand[i], ind_levels);
+ i, RELOAD_FOR_INPUT, ind_levels);
+
+ /* In these cases, we can't tell if the operand is an input
+ or an output, so be conservative. In practice it won't be
+ problem. */
+
if (code == MEM)
find_reloads_address (GET_MODE (recog_operand[i]),
recog_operand_loc[i],
XEXP (recog_operand[i], 0),
&XEXP (recog_operand[i], 0),
- recog_operand[i], ind_levels);
+ i, RELOAD_OTHER, ind_levels);
if (code == SUBREG)
recog_operand[i] = *recog_operand_loc[i]
- = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
+ = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
+ ind_levels, is_set_dest);
if (code == REG)
{
register int regno = REGNO (recog_operand[i]);
= reg_equiv_mem[regno];
#endif
}
- /* All operands are non-reloaded. */
- non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
- }
-#endif /* no REGISTER_CONSTRAINTS */
-
- /* Determine which part of the insn each reload is needed for,
- based on which operand the reload is needed for.
- Reloads of entire operands are classified as RELOAD_OTHER.
- So are reloads for which a unique purpose is not known. */
-
- for (i = 0; i < n_reloads; i++)
- {
- reload_when_needed[i] = RELOAD_OTHER;
-
- if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
- {
- int j;
- int output_address = 0;
- int input_address = 0;
- int operand_address = 0;
-
- /* This reload is needed only for the address of something.
- Determine whether it is needed for addressing an operand
- being reloaded for input, whether it is needed for an
- operand being reloaded for output, and whether it is needed
- for addressing an operand that won't really be reloaded.
-
- Note that we know that this reload is needed in only one address,
- but we have not yet checked for the case where that same address
- is used in both input and output reloads.
- The following code detects this case. */
-
- for (j = 0; j < n_reloads; j++)
- if (reload_needed_for[i] == reload_in[j]
- || reload_needed_for[i] == reload_out[j])
- {
- if (reload_optional[j])
- operand_address = 1;
- else
- {
- if (reload_needed_for[i] == reload_in[j])
- input_address = 1;
- if (reload_needed_for[i] == reload_out[j])
- output_address = 1;
- }
- }
- /* Don't ignore memrefs without optional reloads. */
- for (j = 0; j < n_non_reloaded_operands; j++)
- if (reload_needed_for[i] == non_reloaded_operands[j])
- operand_address = 1;
-
- /* If it is needed for only one of those, record which one. */
-
- if (input_address && ! output_address && ! operand_address)
- reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
- if (output_address && ! input_address && ! operand_address)
- reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
- if (operand_address && ! input_address && ! output_address)
- reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
-
- /* Indicate those RELOAD_OTHER reloads which, though they have
- 0 for reload_output, still cannot overlap an output reload. */
-
- if (output_address && reload_when_needed[i] == RELOAD_OTHER)
- reload_needed_for_multiple[i] = 1;
- }
}
/* Perhaps an output reload can be combined with another
to reduce needs by one. */
if (!goal_earlyclobber)
combine_reloads ();
+#endif /* no REGISTER_CONSTRAINTS */
}
/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
/* Scan X for memory references and scan the addresses for reloading.
Also checks for references to "constant" regs that we want to eliminate
and replaces them with the values they stand for.
- We may alter X descructively if it contains a reference to such.
+ We may alter X destructively if it contains a reference to such.
If X is just a constant reg, we return the equivalent value
instead of X.
IND_LEVELS says how many levels of indirect addressing this machine
supports.
+ OPNUM and TYPE identify the purpose of the reload.
+
IS_SET_DEST is true if X is the destination of a SET, which is not
appropriate to be replaced by a constant. */
static rtx
-find_reloads_toplev (x, ind_levels, is_set_dest)
+find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
rtx x;
+ int opnum;
+ enum reload_type type;
int ind_levels;
int is_set_dest;
{
x = gen_rtx (MEM, GET_MODE (x), addr);
RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- find_reloads_address (GET_MODE (x), 0,
+ find_reloads_address (GET_MODE (x), NULL_PTR,
XEXP (x, 0),
- &XEXP (x, 0), x, ind_levels);
+ &XEXP (x, 0), opnum, type, ind_levels);
}
return x;
}
{
rtx tem = x;
find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
- x, ind_levels);
+ opnum, type, ind_levels);
return tem;
}
not offsettable. In that case, alter_subreg would produce an
invalid address on big-endian machines.
- For machines that zero-extend byte loads, we must not reload using
+ For machines that extend byte loads, we must not reload using
a wider mode if we have a paradoxical SUBREG. find_reloads will
force a reload in that case. So we should not do anything here. */
else if (regno >= FIRST_PSEUDO_REGISTER
-#ifdef BYTE_LOADS_ZERO_EXTEND
+#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
&& (GET_MODE_SIZE (GET_MODE (x))
<= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
#endif
&& (reg_equiv_address[regno] != 0
|| (reg_equiv_mem[regno] != 0
- && ! offsettable_memref_p (reg_equiv_mem[regno]))))
+ && (! strict_memory_address_p (GET_MODE (x),
+ XEXP (reg_equiv_mem[regno], 0))
+ || ! offsettable_memref_p (reg_equiv_mem[regno])))))
{
int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
addr = plus_constant (addr, offset);
x = gen_rtx (MEM, GET_MODE (x), addr);
RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
- find_reloads_address (GET_MODE (x), 0,
+ find_reloads_address (GET_MODE (x), NULL_PTR,
XEXP (x, 0),
- &XEXP (x, 0), x, ind_levels);
+ &XEXP (x, 0), opnum, type, ind_levels);
}
}
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
- XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
+ XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
ind_levels, is_set_dest);
}
return x;
}
+/* Return a mem ref for the memory equivalent of reg REGNO.
+ This mem ref is not shared with anything. */
+
static rtx
make_memloc (ad, regno)
rtx ad;
{
register int i;
rtx tem = reg_equiv_address[regno];
+
+#if 0 /* We cannot safely reuse a memloc made here;
+ if the pseudo appears twice, and its mem needs a reload,
+ it gets two separate reloads assigned, but it only
+ gets substituted with the second of them;
+ then it can get used before that reload reg gets loaded up. */
for (i = 0; i < n_memlocs; i++)
if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
return memlocs[i];
+#endif
/* If TEM might contain a pseudo, we must copy it to avoid
modifying it when we do the substitution for the reload. */
Note that we take shortcuts assuming that no multi-reg machine mode
occurs as part of an address.
- OPERAND is the operand of the insn within which this address appears.
+ OPNUM and TYPE specify the purpose of this reload.
IND_LEVELS says how many levels of indirect addressing this machine
supports.
to a hard register, and frame pointer elimination. */
static int
-find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
+find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
enum machine_mode mode;
rtx *memrefloc;
rtx ad;
rtx *loc;
- rtx operand;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
register int regno;
else if (reg_equiv_address[regno] != 0)
{
tem = make_memloc (ad, regno);
- find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
- &XEXP (tem, 0), operand, ind_levels);
- push_reload (tem, 0, loc, 0, BASE_REG_CLASS,
+ find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
+ &XEXP (tem, 0), opnum, type, ind_levels);
+ push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
GET_MODE (ad), VOIDmode, 0, 0,
- operand);
+ opnum, type);
return 1;
}
- else if (reg_equiv_mem[regno] != 0)
- {
- tem = XEXP (reg_equiv_mem[regno], 0);
-
- /* If we can't indirect any more, a pseudo must be reloaded.
- If the pseudo's address in its MEM is a SYMBOL_REF, it
- must be reloaded unless indirect_symref_ok. Otherwise, it
- can be reloaded if the address is REG or REG + CONST_INT. */
-
- if (ind_levels > 0
- && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
- && ((GET_CODE (tem) == REG
- && REGNO (tem) < FIRST_PSEUDO_REGISTER)
- || (GET_CODE (tem) == PLUS
- && GET_CODE (XEXP (tem, 0)) == REG
- && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
- && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
- return 0;
- }
+ /* We can avoid a reload if the register's equivalent memory expression
+ is valid as an indirect memory address.
+ But not all addresses are valid in a mem used as an indirect address:
+ only reg or reg+constant. */
+
+ else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
+ && strict_memory_address_p (mode, reg_equiv_mem[regno])
+ && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
+ || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
+ && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
+ && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
+ return 0;
/* The only remaining case where we can avoid a reload is if this is a
hard register that is valid as a base register and which is not the
return 0;
/* If we do not have one of the cases above, we must do the reload. */
- push_reload (ad, 0, loc, 0, BASE_REG_CLASS,
- GET_MODE (ad), VOIDmode, 0, 0, operand);
+ push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
+ GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
return 1;
}
indirect addresses are valid, reload the MEM into a register. */
tem = ad;
find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
- operand, ind_levels == 0 ? 0 : ind_levels - 1);
+ opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
+
+ /* If tem was changed, then we must create a new memory reference to
+ hold it and store it back into memrefloc. */
+ if (tem != ad && memrefloc)
+ {
+ *memrefloc = copy_rtx (*memrefloc);
+ copy_replacements (tem, XEXP (*memrefloc, 0));
+ loc = &XEXP (*memrefloc, 0);
+ }
+
/* Check similar cases as for indirect addresses as above except
that we can allow pseudos and a MEM since they should have been
taken care of above. */
{
/* Must use TEM here, not AD, since it is the one that will
have any subexpressions reloaded, if needed. */
- push_reload (tem, 0, loc, 0,
+ push_reload (tem, NULL_RTX, loc, NULL_PTR,
BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
- 0, operand);
+ 0, opnum, type);
return 1;
}
else
rtx oldref = *memrefloc;
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
- if (operand == oldref)
- operand = *memrefloc;
}
if (double_reg_address_ok)
{
/* Reload the displacement into an index reg.
We assume the frame pointer or arg pointer is a base reg. */
find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
- INDEX_REG_CLASS, GET_MODE (ad), operand,
- ind_levels);
+ INDEX_REG_CLASS, GET_MODE (ad), opnum,
+ type, ind_levels);
}
else
{
reload the sum into a base reg.
That will at least work. */
find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
- operand, ind_levels);
+ opnum, type, ind_levels);
}
return 1;
}
INTVAL (XEXP (ad, 1))),
XEXP (XEXP (ad, 0), 1));
find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
- GET_MODE (ad), operand, ind_levels);
- find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
+ GET_MODE (ad), opnum, type, ind_levels);
+ find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
return 1;
}
INTVAL (XEXP (ad, 1))),
XEXP (XEXP (ad, 0), 0));
find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
- GET_MODE (ad), operand, ind_levels);
- find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
+ GET_MODE (ad), opnum, type, ind_levels);
+ find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
return 1;
}
/* If constants aren't valid addresses, reload the constant address
into a register. */
- if (CONSTANT_ADDRESS_P (ad) && ! strict_memory_address_p (mode, ad))
+ if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
{
/* If AD is in address in the constant pool, the MEM rtx may be shared.
Unshare it so we can safely alter it. */
rtx oldref = *memrefloc;
*memrefloc = copy_rtx (*memrefloc);
loc = &XEXP (*memrefloc, 0);
- if (operand == oldref)
- operand = *memrefloc;
}
- find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
+ find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
ind_levels);
return 1;
}
- return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
+ return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
}
\f
/* Find all pseudo regs appearing in AD
rtx x, y;
{
rtx tem;
+ enum machine_mode mode = GET_MODE (x);
+
+ if (mode == VOIDmode)
+ mode = GET_MODE (y);
+
+ if (mode == VOIDmode)
+ mode = Pmode;
if (GET_CODE (x) == CONST_INT)
return plus_constant (y, INTVAL (x));
if (GET_CODE (y) == CONST)
y = XEXP (y, 0);
- return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
+ return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
}
- return gen_rtx (PLUS, Pmode, x, y);
+ return gen_rtx (PLUS, mode, x, y);
}
\f
/* If ADDR is a sum containing a pseudo register that should be
CONTEXT = 1 means we are considering regs as index regs,
= 0 means we are considering them as base regs.
- OPERAND is the operand of the insn within which this address appears.
+ OPNUM and TYPE specify the purpose of any reloads made.
IND_LEVELS says how many levels of indirect addressing are
supported at this point in the address.
could have addressing modes that this does not handle right. */
static int
-find_reloads_address_1 (x, context, loc, operand, ind_levels)
+find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
rtx x;
int context;
rtx *loc;
- rtx operand;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
register RTX_CODE code = GET_CODE (x);
register RTX_CODE code1 = GET_CODE (op1);
if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
{
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
+ find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
}
else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
{
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
+ find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
+ ind_levels);
}
else if (code0 == CONST_INT || code0 == CONST
|| code0 == SYMBOL_REF || code0 == LABEL_REF)
- {
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
- }
+ find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
else if (code1 == CONST_INT || code1 == CONST
|| code1 == SYMBOL_REF || code1 == LABEL_REF)
- {
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
- }
+ find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
else if (code0 == REG && code1 == REG)
{
if (REG_OK_FOR_INDEX_P (op0)
&& REG_OK_FOR_BASE_P (op0))
return 0;
else if (REG_OK_FOR_BASE_P (op1))
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
+ find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
else if (REG_OK_FOR_BASE_P (op0))
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
+ find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
+ ind_levels);
else if (REG_OK_FOR_INDEX_P (op1))
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
+ find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
else if (REG_OK_FOR_INDEX_P (op0))
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
+ find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
else
{
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
+ find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
+ find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
ind_levels);
}
}
else if (code0 == REG)
{
- find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
- find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
+ find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
+ ind_levels);
}
else if (code1 == REG)
{
- find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
- find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
+ find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
+ ind_levels);
+ find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
+ ind_levels);
}
}
else if (code == POST_INC || code == POST_DEC
rtx tem = make_memloc (XEXP (x, 0), regno);
/* First reload the memory location's address. */
find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
- &XEXP (tem, 0), operand, ind_levels);
+ &XEXP (tem, 0), opnum, type, ind_levels);
/* Put this inside a new increment-expression. */
x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
/* Proceed to reload that, as if it contained a register. */
register rtx link;
int reloadnum
- = push_reload (x, 0, loc, 0,
+ = push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
+ GET_MODE (x), GET_MODE (x), VOIDmode, 0,
+ opnum, type);
reload_inc[reloadnum]
= find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
reload1.c here. */
find_reloads_address (GET_MODE (x), &XEXP (x, 0),
XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
- operand, ind_levels);
+ opnum, type, ind_levels);
- reloadnum = push_reload (x, 0, loc, 0,
+ reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
reload_inc[reloadnum]
= find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
reload1.c here. */
find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
- operand, ind_levels);
+ opnum, type, ind_levels);
- push_reload (*loc, 0, loc, 0,
+ push_reload (*loc, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
else if (code == REG)
if (reg_equiv_constant[regno] != 0)
{
- push_reload (reg_equiv_constant[regno], 0, loc, 0,
- context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ find_reloads_address_part (reg_equiv_constant[regno], loc,
+ (context ? INDEX_REG_CLASS
+ : BASE_REG_CLASS),
+ GET_MODE (x), opnum, type, ind_levels);
return 1;
}
that feeds this insn. */
if (reg_equiv_mem[regno] != 0)
{
- push_reload (reg_equiv_mem[regno], 0, loc, 0,
+ push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
#endif
{
x = make_memloc (x, regno);
find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
- operand, ind_levels);
+ opnum, type, ind_levels);
}
if (reg_renumber[regno] >= 0)
|| !(context ? REGNO_OK_FOR_INDEX_P (regno)
: REGNO_OK_FOR_BASE_P (regno))))
{
- push_reload (x, 0, loc, 0,
+ push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
from before this insn to after it. */
if (regno_clobbered_p (regno, this_insn))
{
- push_reload (x, 0, loc, 0,
+ push_reload (x, NULL_RTX, loc, NULL_PTR,
context ? INDEX_REG_CLASS : BASE_REG_CLASS,
- GET_MODE (x), VOIDmode, 0, 0, operand);
+ GET_MODE (x), VOIDmode, 0, 0, opnum, type);
return 1;
}
}
{
if (fmt[i] == 'e')
find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
- operand, ind_levels);
+ opnum, type, ind_levels);
}
}
MODE is the mode to use, in case X is an integer constant.
- NEEDED_FOR says which operand this reload is needed for.
+ OPNUM and TYPE describe the purpose of any reloads made.
IND_LEVELS says how many levels of indirect addressing this machine
supports. */
static void
-find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
+find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
rtx x;
rtx *loc;
enum reg_class class;
enum machine_mode mode;
- rtx needed_for;
+ int opnum;
+ enum reload_type type;
int ind_levels;
{
if (CONSTANT_P (x)
{
rtx tem = x = force_const_mem (mode, x);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
- needed_for, ind_levels);
+ opnum, type, ind_levels);
}
else if (GET_CODE (x) == PLUS
x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
- needed_for, ind_levels);
+ opnum, type, ind_levels);
}
- push_reload (x, 0, loc, 0, class, mode, VOIDmode, 0, 0, needed_for);
+ push_reload (x, NULL_RTX, loc, NULL_PTR, class,
+ mode, VOIDmode, 0, 0, opnum, type);
}
\f
-/* Substitute into X the registers into which we have reloaded
+/* Substitute into the current INSN the registers into which we have reloaded
the things that need reloading. The array `replacements'
says contains the locations of all pointers that must be changed
and says what to replace them with.
/* Encapsulate RELOADREG so its machine mode matches what
used to be there. */
if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
- reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
+ reloadreg = gen_lowpart_common (r->mode, reloadreg);
/* If we are putting this into a SUBREG and RELOADREG is a
SUBREG, we would be making nested SUBREGs, so we have to fix
case REG:
i = REGNO (x);
- if (i >= FIRST_PSEUDO_REGISTER && reg_renumber[i] == -1
- && ((reg_equiv_address[i]
- && refers_to_regno_for_reload_p (regno, endregno,
- reg_equiv_address[i], 0))
- || (reg_equiv_mem[i]
- && refers_to_regno_for_reload_p (regno, endregno,
- XEXP (reg_equiv_mem[i], 0),
- 0))))
- return 1;
+ /* If this is a pseudo, a hard register must not have been allocated.
+ X must therefore either be a constant or be in memory. */
+ if (i >= FIRST_PSEUDO_REGISTER)
+ {
+ if (reg_equiv_memory_loc[i])
+ return refers_to_regno_for_reload_p (regno, endregno,
+ reg_equiv_memory_loc[i],
+ NULL_PTR);
+
+ if (reg_equiv_constant[i])
+ return 0;
+
+ abort ();
+ }
return (endregno > i
&& regno < i + (i < FIRST_PSEUDO_REGISTER
}
return 0;
}
-\f
-#if 0
-
-/* [[This function is currently obsolete, now that volatility
- is represented by a special bit `volatil' so VOLATILE is never used;
- and UNCHANGING has never been brought into use.]]
- Alter X by eliminating all VOLATILE and UNCHANGING expressions.
- Each of them is replaced by its operand.
- Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
- becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
+/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
+ we check if any register number in X conflicts with the relevant register
+ numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
+ contains a MEM (we don't bother checking for memory addresses that can't
+ conflict because we expect this to be a rare case.
- If X is itself a VOLATILE expression,
- we return the expression that should replace it
- but we do not modify X. */
+ This function is similar to reg_overlap_mention_p in rtlanal.c except
+ that we look at equivalences for pseudos that didn't get hard registers. */
-static rtx
-forget_volatility (x)
- register rtx x;
+int
+reg_overlap_mentioned_for_reload_p (x, in)
+ rtx x, in;
{
- enum rtx_code code = GET_CODE (x);
- register char *fmt;
- register int i;
- register rtx value = 0;
+ int regno, endregno;
- switch (code)
+ if (GET_CODE (x) == SUBREG)
{
- case LABEL_REF:
- case SYMBOL_REF:
- case CONST_INT:
- case CONST_DOUBLE:
- case CONST:
- case REG:
- case CC0:
- case PC:
- return x;
-
- case VOLATILE:
- case UNCHANGING:
- return XEXP (x, 0);
+ regno = REGNO (SUBREG_REG (x));
+ if (regno < FIRST_PSEUDO_REGISTER)
+ regno += SUBREG_WORD (x);
}
-
- fmt = GET_RTX_FORMAT (code);
- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+ else if (GET_CODE (x) == REG)
{
- if (fmt[i] == 'e')
- XEXP (x, i) = forget_volatility (XEXP (x, i));
- if (fmt[i] == 'E')
+ regno = REGNO (x);
+
+ /* If this is a pseudo, it must not have been assigned a hard register.
+ Therefore, it must either be in memory or be a constant. */
+
+ if (regno >= FIRST_PSEUDO_REGISTER)
{
- register int j;
- for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
+ if (reg_equiv_memory_loc[regno])
+ return refers_to_mem_for_reload_p (in);
+ else if (reg_equiv_constant[regno])
+ return 0;
+ abort ();
}
}
+ else if (CONSTANT_P (x))
+ return 0;
+ else if (GET_CODE (x) == MEM)
+ return refers_to_mem_for_reload_p (in);
+ else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
+ || GET_CODE (x) == CC0)
+ return reg_mentioned_p (x, in);
+ else
+ abort ();
- return x;
+ endregno = regno + (regno < FIRST_PSEUDO_REGISTER
+ ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
+
+ return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
}
-#endif
+/* Return nonzero if anything in X contains a MEM. Look also for pseudo
+ registers. */
+
+int
+refers_to_mem_for_reload_p (x)
+ rtx x;
+{
+ char *fmt;
+ int i;
+
+ if (GET_CODE (x) == MEM)
+ return 1;
+
+ if (GET_CODE (x) == REG)
+ return (REGNO (x) >= FIRST_PSEUDO_REGISTER
+ && reg_equiv_memory_loc[REGNO (x)]);
+
+ fmt = GET_RTX_FORMAT (GET_CODE (x));
+ for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
+ if (fmt[i] == 'e'
+ && (GET_CODE (XEXP (x, i)) == MEM
+ || refers_to_mem_for_reload_p (XEXP (x, i))))
+ return 1;
+
+ return 0;
+}
\f
/* Check the insns before INSN to see if there is a suitable register
containing the same value as GOAL.
enum machine_mode mode;
{
register rtx p = insn;
- rtx valtry, value, where;
+ rtx goaltry, valtry, value, where;
register rtx pat;
register int regno = -1;
int valueno;
return 0;
if (GET_CODE (p) == INSN
/* If we don't want spill regs ... */
- && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
+ && (! (reload_reg_p != 0
+ && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
/* ... then ignore insns introduced by reload; they aren't useful
and can cause results in reload_as_needed to be different
from what they were when calculating the need for spills.
/* If we are looking for a constant,
and something equivalent to that constant was copied
into a reg, we can use that reg. */
- || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
+ || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
+ NULL_RTX))
&& rtx_equal_p (XEXP (tem, 0), goal)
- && (valueno = true_regnum (valtry = SET_DEST (pat))))
- || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
+ && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
+ || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
+ NULL_RTX))
&& GET_CODE (SET_DEST (pat)) == REG
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
&& GET_CODE (goal) == CONST_INT
- && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
+ && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
+ VOIDmode))
+ && rtx_equal_p (goal, goaltry)
&& (valtry = operand_subword (SET_DEST (pat), 0, 0,
VOIDmode))
- && (valueno = true_regnum (valtry)))
- || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 0))
+ && (valueno = true_regnum (valtry)) >= 0)
+ || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
+ NULL_RTX))
&& GET_CODE (SET_DEST (pat)) == REG
&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
&& GET_CODE (goal) == CONST_INT
- && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
+ && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
+ VOIDmode))
+ && rtx_equal_p (goal, goaltry)
&& (valtry
= operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
- && (valueno = true_regnum (valtry)))))
+ && (valueno = true_regnum (valtry)) >= 0)))
if (other >= 0
? valueno == other
: ((unsigned) valueno < FIRST_PSEUDO_REGISTER
/* If we propose to get the value from the stack pointer or if GOAL is
a MEM based on the stack pointer, we need a stable SP. */
if (valueno == STACK_POINTER_REGNUM
- || (goal_mem && reg_overlap_mentioned_p (stack_pointer_rtx, goal)))
+ || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
+ goal)))
need_stable_sp = 1;
/* Reject VALUE if the copy-insn moved the wrong sort of datum. */
and is also a register that appears in the address of GOAL. */
if (goal_mem && value == SET_DEST (PATTERN (where))
- && refers_to_regno_p (valueno,
- valueno + HARD_REGNO_NREGS (valueno, mode),
- goal, 0))
+ && refers_to_regno_for_reload_p (valueno,
+ (valueno
+ + HARD_REGNO_NREGS (valueno, mode)),
+ goal, NULL_PTR))
return 0;
/* Reject registers that overlap GOAL. */
(Now that insns introduced by reload are ignored above,
this case shouldn't happen, but I'm not positive.) */
- if (reload_reg_p != 0 && reload_reg_p != (short *)1
+ if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
&& reload_reg_p[valueno] >= 0)
return 0;
}
if (goal_mem)
- goal_mem_addr_varies = rtx_addr_varies_p (goal);
+ /* We must treat frame pointer as varying here,
+ since it can vary--in a nonlocal goto as generated by expand_goto. */
+ goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
/* Now verify that the values of GOAL and VALUE remain unaltered
until INSN is reached. */
&& xregno + xnregs > valueno)
return 0;
if (goal_mem_addr_varies
- && reg_overlap_mentioned_p (dest, goal))
+ && reg_overlap_mentioned_for_reload_p (dest, goal))
return 0;
}
else if (goal_mem && GET_CODE (dest) == MEM
&& xregno + xnregs > valueno)
return 0;
if (goal_mem_addr_varies
- && reg_overlap_mentioned_p (dest, goal))
+ && reg_overlap_mentioned_for_reload_p (dest,
+ goal))
return 0;
}
else if (goal_mem && GET_CODE (dest) == MEM
if (incno < valueno + valuenregs && incno >= valueno)
return 0;
if (goal_mem_addr_varies
- && reg_overlap_mentioned_p (XEXP (link, 0), goal))
+ && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
+ goal))
return 0;
}
}
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