#include "system.h"
#include "coretypes.h"
#include "tm.h"
-#include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
+#include "rtl.h"
#include "tm_p.h"
#include "insn-config.h"
#include "recog.h"
+#include "target.h"
#include "output.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "expr.h"
#include "basic-block.h"
#include "except.h"
+#include "diagnostic-core.h"
#include "toplev.h"
#include "reload.h"
#include "timevar.h"
/* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
causing too much register allocation problems. */
static int
-regclass_compatible_p (enum reg_class class0, enum reg_class class1)
+regclass_compatible_p (reg_class_t class0, reg_class_t class1)
{
return (class0 == class1
|| (reg_class_subset_p (class0, class1)
- && ! CLASS_LIKELY_SPILLED_P (class0))
+ && ! targetm.class_likely_spilled_p (class0))
|| (reg_class_subset_p (class1, class0)
- && ! CLASS_LIKELY_SPILLED_P (class1)));
+ && ! targetm.class_likely_spilled_p (class1)));
}
\f
/* We don't want to mess with hard regs if register classes are small. */
if (sregno == dregno
- || (SMALL_REGISTER_CLASSES
+ || (targetm.small_register_classes_for_mode_p (GET_MODE (src))
&& (sregno < FIRST_PSEUDO_REGISTER
|| dregno < FIRST_PSEUDO_REGISTER))
/* We don't see all updates to SP if they are in an auto-inc memory
if (sregno < FIRST_PSEUDO_REGISTER
&& reg_mentioned_p (dest, PATTERN (q)))
failed = 1;
-
+
/* Attempt to replace all uses. */
else if (!validate_replace_rtx (src, dest, q))
failed = 1;
for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
if (INSN_P (p) && BLOCK_FOR_INSN (p) != bb)
break;
-
+
if (! p || BLOCK_FOR_INSN (p) != bb)
return;
rtx *p_move_notes;
int src_regno;
int dest_regno;
- int insn_uid;
- int move_uid;
/* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
*p_move_notes = NULL_RTX;
*p_insn_notes = NULL_RTX;
- insn_uid = INSN_UID (insn);
- move_uid = INSN_UID (move_insn);
-
/* Update the various register tables. */
dest_regno = REGNO (dest);
INC_REG_N_SETS (dest_regno, 1);
FOR_EACH_BB_REVERSE (bb)
{
/* ??? Use the safe iterator because fixup_match_2 can remove
- insns via try_auto_increment. */
+ insns via try_auto_increment. */
FOR_BB_INSNS_REVERSE_SAFE (bb, insn, prev)
{
struct match match;
case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
case 'C': case 'D': case 'W': case 'Y': case 'Z':
- if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p) ))
+ if (targetm.class_likely_spilled_p (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p)))
likely_spilled[op_no] = 1;
break;
}