* gcc.dg/march.c: Ignore a note for some targets.

[pf3gnuchains/gcc-fork.git] / gcc / regmove.c

diff --git a/gcc/regmove.c b/gcc/regmove.c
index 18afc5b..afa7ee7 100644 (file)
--- a/gcc/regmove.c
+++ b/gcc/regmove.c
@@ -1,6 +1,6 @@
 /* Move registers around to reduce number of move instructions needed.
-   Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
-   1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+   Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
    Free Software Foundation, Inc.
 
 This file is part of GCC.
@@ -27,10 +27,11 @@ along with GCC; see the file COPYING3.  If not see
 #include "system.h"
 #include "coretypes.h"
 #include "tm.h"
-#include "rtl.h" /* stdio.h must precede rtl.h for FFS.  */
+#include "rtl.h"
 #include "tm_p.h"
 #include "insn-config.h"
 #include "recog.h"
+#include "target.h"
 #include "output.h"
 #include "regs.h"
 #include "hard-reg-set.h"
@@ -39,7 +40,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "expr.h"
 #include "basic-block.h"
 #include "except.h"
-#include "toplev.h"
+#include "diagnostic-core.h"
 #include "reload.h"
 #include "timevar.h"
 #include "tree-pass.h"
@@ -71,13 +72,13 @@ static int fixup_match_2 (rtx, rtx, rtx, rtx);
 /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
    causing too much register allocation problems.  */
 static int
-regclass_compatible_p (enum reg_class class0, enum reg_class class1)
+regclass_compatible_p (reg_class_t class0, reg_class_t class1)
 {
   return (class0 == class1
          || (reg_class_subset_p (class0, class1)
-             && ! CLASS_LIKELY_SPILLED_P (class0))
+             && ! targetm.class_likely_spilled_p (class0))
          || (reg_class_subset_p (class1, class0)
-             && ! CLASS_LIKELY_SPILLED_P (class1)));
+             && ! targetm.class_likely_spilled_p (class1)));
 }
 
 \f
@@ -239,7 +240,7 @@ optimize_reg_copy_1 (rtx insn, rtx dest, rtx src)
 
   /* We don't want to mess with hard regs if register classes are small.  */
   if (sregno == dregno
-      || (SMALL_REGISTER_CLASSES
+      || (targetm.small_register_classes_for_mode_p (GET_MODE (src))
          && (sregno < FIRST_PSEUDO_REGISTER
              || dregno < FIRST_PSEUDO_REGISTER))
       /* We don't see all updates to SP if they are in an auto-inc memory
@@ -513,7 +514,7 @@ optimize_reg_copy_3 (rtx insn, rtx dest, rtx src)
   rtx src_reg = XEXP (src, 0);
   int src_no = REGNO (src_reg);
   int dst_no = REGNO (dest);
-  rtx p, set;
+  rtx p, set, set_insn;
   enum machine_mode old_mode;
   basic_block bb = BLOCK_FOR_INSN (insn);
 
@@ -551,6 +552,7 @@ optimize_reg_copy_3 (rtx insn, rtx dest, rtx src)
                                 GET_MODE_BITSIZE (GET_MODE (src_reg))))
     return;
 
+  set_insn = p;
   old_mode = GET_MODE (src_reg);
   PUT_MODE (src_reg, GET_MODE (src));
   XEXP (src, 0) = SET_SRC (set);
@@ -583,9 +585,19 @@ optimize_reg_copy_3 (rtx insn, rtx dest, rtx src)
     }
   else
     {
-      rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
+      rtx note = find_reg_note (set_insn, REG_EQUAL, NULL_RTX);
       if (note)
-       remove_note (p, note);
+       {
+         if (rtx_equal_p (XEXP (note, 0), XEXP (src, 0)))
+           {
+             XEXP (note, 0)
+               = gen_rtx_fmt_e (GET_CODE (src), GET_MODE (src),
+                                XEXP (note, 0));
+             df_notes_rescan (set_insn);
+           }
+         else
+           remove_note (set_insn, note);
+       }
     }
 }
 
@@ -605,8 +617,6 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest)
   rtx *p_move_notes;
   int src_regno;
   int dest_regno;
-  int insn_uid;
-  int move_uid;
 
   /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
      or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
@@ -662,9 +672,6 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest)
       *p_move_notes = NULL_RTX;
       *p_insn_notes = NULL_RTX;
 
-      insn_uid = INSN_UID (insn);
-      move_uid = INSN_UID (move_insn);
-
       /* Update the various register tables.  */
       dest_regno = REGNO (dest);
       INC_REG_N_SETS (dest_regno, 1);
@@ -1229,12 +1236,12 @@ regmove_optimize (void)
   df_note_add_problem ();
   df_analyze ();
 
-  if (flag_ira_loop_pressure)
-    ira_set_pseudo_classes (dump_file);
-
   regstat_init_n_sets_and_refs ();
   regstat_compute_ri ();
 
+  if (flag_ira_loop_pressure)
+    ira_set_pseudo_classes (dump_file);
+
   regno_src_regno = XNEWVEC (int, nregs);
   for (i = nregs; --i >= 0; )
     regno_src_regno[i] = -1;
@@ -1340,7 +1347,7 @@ find_matches (rtx insn, struct match *matchp)
          case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
          case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
          case 'C': case 'D': case 'W': case 'Y': case 'Z':
-           if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p) ))
+           if (targetm.class_likely_spilled_p (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p)))
              likely_spilled[op_no] = 1;
            break;
          }